From 739ae7d4dc6ab6a0f99ff5ee4d58988c13960eff Mon Sep 17 00:00:00 2001 From: gudae Date: Mon, 12 Jan 2026 12:27:10 +0900 Subject: [PATCH] first commit --- DefaultBuild/cstart.obj | Bin 0 -> 4728 bytes DefaultBuild/multical.abs | Bin 0 -> 24504 bytes DefaultBuild/multical.clnk | 35 + DefaultBuild/multical.lib | Bin 0 -> 468056 bytes DefaultBuild/multical.map | 342 +++ DefaultBuild/multical.mot | 110 + DefaultBuild/r_cg_cgc.obj | Bin 0 -> 2748 bytes DefaultBuild/r_cg_cgc_user.obj | Bin 0 -> 2880 bytes DefaultBuild/r_cg_serial.obj | Bin 0 -> 14016 bytes DefaultBuild/r_cg_serial_user.obj | Bin 0 -> 17576 bytes DefaultBuild/r_cg_wdt.obj | Bin 0 -> 2920 bytes DefaultBuild/r_cg_wdt_user.obj | Bin 0 -> 2536 bytes DefaultBuild/r_main.obj | Bin 0 -> 3028 bytes DefaultBuild/r_systeminit.obj | Bin 0 -> 3636 bytes DefaultBuild/stkinit.obj | Bin 0 -> 2552 bytes cstart.asm | 314 +++ hdwinit.asm | 35 + iodefine.h | 2734 +++++++++++++++++++++++ main.c | 35 + multical.mtpj | 3364 +++++++++++++++++++++++++++++ multical.rcpe | 2184 +++++++++++++++++++ multical.temp.mtud | 367 ++++ r_cg_cgc.c | 82 + r_cg_cgc.h | 227 ++ r_cg_cgc_user.c | 64 + r_cg_macrodriver.h | 89 + r_cg_serial.c | 530 +++++ r_cg_serial.h | 399 ++++ r_cg_serial_user.c | 442 ++++ r_cg_userdefine.h | 38 + r_cg_wdt.c | 78 + r_cg_wdt.h | 52 + r_cg_wdt_user.c | 64 + r_main.c | 84 + r_systeminit.c | 95 + stkinit.asm | 77 + 36 files changed, 11841 insertions(+) create mode 100644 DefaultBuild/cstart.obj create mode 100644 DefaultBuild/multical.abs create mode 100644 DefaultBuild/multical.clnk create mode 100644 DefaultBuild/multical.lib create mode 100644 DefaultBuild/multical.map create mode 100644 DefaultBuild/multical.mot create mode 100644 DefaultBuild/r_cg_cgc.obj create mode 100644 DefaultBuild/r_cg_cgc_user.obj create mode 100644 DefaultBuild/r_cg_serial.obj create mode 100644 DefaultBuild/r_cg_serial_user.obj create mode 100644 DefaultBuild/r_cg_wdt.obj create mode 100644 DefaultBuild/r_cg_wdt_user.obj create mode 100644 DefaultBuild/r_main.obj create mode 100644 DefaultBuild/r_systeminit.obj create mode 100644 DefaultBuild/stkinit.obj create mode 100644 cstart.asm create mode 100644 hdwinit.asm create mode 100644 iodefine.h create mode 100644 main.c create mode 100644 multical.mtpj create mode 100644 multical.rcpe create mode 100644 multical.temp.mtud create mode 100644 r_cg_cgc.c create mode 100644 r_cg_cgc.h create mode 100644 r_cg_cgc_user.c create mode 100644 r_cg_macrodriver.h create mode 100644 r_cg_serial.c create mode 100644 r_cg_serial.h create mode 100644 r_cg_serial_user.c create mode 100644 r_cg_userdefine.h create mode 100644 r_cg_wdt.c create mode 100644 r_cg_wdt.h create mode 100644 r_cg_wdt_user.c create mode 100644 r_main.c create mode 100644 r_systeminit.c create mode 100644 stkinit.asm diff --git a/DefaultBuild/cstart.obj b/DefaultBuild/cstart.obj new file mode 100644 index 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b/cstart.asm @@ -0,0 +1,314 @@ +;/********************************************************************************************************************** +; * DISCLAIMER +; * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No +; * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +; * applicable laws, including copyright laws. +; * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +; * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, +; * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM +; * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES +; * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO +; * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +; * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of +; * this software. By using this software, you agree to the additional terms and conditions found by accessing the +; * following link: +; * http://www.renesas.com/disclaimer +; * +; * Copyright (C) 2020-2022 Renesas Electronics Corporation. All rights reserved. +; *********************************************************************************************************************/ +; NOTE : THIS IS A TYPICAL EXAMPLE. + +$IFNDEF __RENESAS_VERSION__ +__RENESAS_VERSION__ .EQU 0x01000000 +$ENDIF + + .public _start + .public _exit + .public _atexit + +;----------------------------------------------------------------------------- +; RAM section +;----------------------------------------------------------------------------- +.SECTION .dataR, DATA +.SECTION .sdataR, DATA +; .SECTION .datafR, DATAF +; .SECTION .textfR, TEXTF + +$IF (__RENESAS_VERSION__ < 0x01010000) ; for CC-RL V1.00 +;----------------------------------------------------------------------------- +; stack area +;----------------------------------------------------------------------------- +; !!! [CAUTION] !!! +; Set up stack size suitable for a project. +.SECTION .stack_bss, BSS +_stackend: + .DS 0x200 +_stacktop: +$ENDIF + +;----------------------------------------------------------------------------- +; RESET vector +;----------------------------------------------------------------------------- +_start .VECTOR 0 + +;----------------------------------------------------------------------------- +; startup +;----------------------------------------------------------------------------- +.SECTION .text, TEXT +_start: + ;-------------------------------------------------- + ; setting register bank + ;-------------------------------------------------- +; SEL RB0 + + ;-------------------------------------------------- + ; setting mirror area + ;-------------------------------------------------- +; ONEB !PMC ; mirror area = 10000-1FFFFH + + ;-------------------------------------------------- + ; setting the stack pointer + ;-------------------------------------------------- +$IF (__RENESAS_VERSION__ >= 0x01010000) + MOVW SP,#LOWW(__STACK_ADDR_START) +$ELSE ; for CC-RL V1.00 + MOVW SP,#LOWW(_stacktop) +$ENDIF + + ;-------------------------------------------------- + ; initializing stack area + ;-------------------------------------------------- +$IF (__RENESAS_VERSION__ >= 0x01010000) + MOVW AX,#LOWW(__STACK_ADDR_END) +$ELSE ; for CC-RL V1.00 + MOVW AX,#LOWW(_stackend) +$ENDIF + CALL !!_stkinit + + ;-------------------------------------------------- + ; hardware initialization + ;-------------------------------------------------- + CALL !!_hdwinit + +$IFDEF __USE_RAM_INIT_TABLE + ;-------------------------------------------------- + ; initializing RAM + ;-------------------------------------------------- + MOVW AX,#LOWW(STARTOF(.ram_init_table)) + BR $.L5_RAM_INIT_TABLE +.L1_RAM_INIT_TABLE: + PUSH AX ;table pointer + MOVW HL,AX + MOV ES,#HIGHW(STARTOF(.ram_init_table)) + MOVW AX,ES:[HL+6] ;dst + MOVW DE,AX + MOVW AX,ES:[HL+4] ;size + ADDW AX,DE + MOVW BC,AX ;end + MOV A,ES:[HL+2] ;high(src) + CMP A,#0xF + BZ $.L3_RAM_INIT_TABLE_CLEAR + + PUSH AX + MOVW AX,ES:[HL] ;loww(src) + MOVW HL,AX + POP AX + MOV ES,A + BR $.L3_RAM_INIT_TABLE_COPY + +.L2_RAM_INIT_TABLE_COPY: + MOV A,ES:[HL] + INCW HL + MOV [DE],A + INCW DE +.L3_RAM_INIT_TABLE_COPY: + MOVW AX,DE + CMPW AX,BC + BC $.L2_RAM_INIT_TABLE_COPY + BR $.L4_RAM_INIT_TABLE + +.L2_RAM_INIT_TABLE_CLEAR: + MOV [DE],#0 + INCW DE +.L3_RAM_INIT_TABLE_CLEAR: + MOVW AX,DE + CMPW AX,BC + BC $.L2_RAM_INIT_TABLE_CLEAR + +.L4_RAM_INIT_TABLE: + POP AX ;table ponter + ADDW AX,#8 +.L5_RAM_INIT_TABLE: + CMPW AX,#LOWW(STARTOF(.ram_init_table)+SIZEOF(.ram_init_table)) + BC $.L1_RAM_INIT_TABLE + +$ELSE ; __USE_RAM_INIT_TABLE + ;-------------------------------------------------- + ; initializing BSS + ;-------------------------------------------------- + ; clear external variables which doesn't have initial value (near) + MOVW HL,#LOWW(STARTOF(.bss)) + MOVW AX,#LOWW(STARTOF(.bss) + SIZEOF(.bss)) + BR $.L2_BSS +.L1_BSS: + MOV [HL+0],#0 + INCW HL +.L2_BSS: + CMPW AX,HL + BNZ $.L1_BSS + + ; clear saddr variables which doesn't have initial value + MOVW HL,#LOWW(STARTOF(.sbss)) + MOVW AX,#LOWW(STARTOF(.sbss) + SIZEOF(.sbss)) + BR $.L2_SBSS +.L1_SBSS: + MOV [HL+0],#0 + INCW HL +.L2_SBSS: + CMPW AX,HL + BNZ $.L1_SBSS + + ; clear external variables which doesn't have initial value (far) +; MOV ES,#HIGHW(STARTOF(.bssf)) +; MOVW HL,#LOWW(STARTOF(.bssf)) +; MOVW AX,#LOWW(STARTOF(.bssf) + SIZEOF(.bssf)) +; BR $.L2_BSSF +;.L1_BSSF: +; MOV ES:[HL+0],#0 +; INCW HL +;.L2_BSSF: +; CMPW AX,HL +; BNZ $.L1_BSSF + + ;-------------------------------------------------- + ; ROM data copy + ;-------------------------------------------------- + ; copy external variables having initial value (near) + MOV ES,#HIGHW(STARTOF(.data)) + MOVW BC,#LOWW(SIZEOF(.data)) + BR $.L2_DATA +.L1_DATA: + DECW BC + MOV A,ES:LOWW(STARTOF(.data))[BC] + MOV LOWW(STARTOF(.dataR))[BC],A +.L2_DATA: + CLRW AX + CMPW AX,BC + BNZ $.L1_DATA + + ; copy saddr variables having initial value + MOV ES,#HIGHW(STARTOF(.sdata)) + MOVW BC,#LOWW(SIZEOF(.sdata)) + BR $.L2_SDATA +.L1_SDATA: + DECW BC + MOV A,ES:LOWW(STARTOF(.sdata))[BC] + MOV LOWW(STARTOF(.sdataR))[BC],A +.L2_SDATA: + CLRW AX + CMPW AX,BC + BNZ $.L1_SDATA + + ; copy external variables having initial value (far) +; MOVW BC,#LOWW(SIZEOF(.dataf)) +; BR $.L2_DATAF +;.L1_DATAF: +; DECW BC +; MOV ES,#HIGHW(STARTOF(.dataf)) +; MOV A,ES:LOWW(STARTOF(.dataf))[BC] +; MOV ES,#HIGHW(STARTOF(.datafR)) +; MOV ES:LOWW(STARTOF(.datafR))[BC],A +;.L2_DATAF: +; CLRW AX +; CMPW AX,BC +; BNZ $.L1_DATAF + + ; copy .text to RAM +; MOV C,#HIGHW(STARTOF(.textf)) +; MOVW HL,#LOWW(STARTOF(.textf)) +; MOVW DE,#LOWW(STARTOF(.textfR)) +; BR $.L2_TEXT +;.L1_TEXT: +; MOV A,C +; MOV ES,A +; MOV A,ES:[HL] +; MOV [DE],A +; INCW DE +; INCW HL +; CLRW AX +; CMPW AX,HL +; SKNZ +; INC C +;.L2_TEXT: +; MOVW AX,HL +; CMPW AX,#LOWW(STARTOF(.text) + SIZEOF(.text)) +; BNZ $.L1_TEXT + +$ENDIF ; __USE_RAM_INIT_TABLE + + ;-------------------------------------------------- + ; call global constructor (_peace_global_ctor_0) + ;-------------------------------------------------- + MOVW BC,#LOWW(SIZEOF(.init_array)) + BR $.L2_INIT +.L1_INIT: + DECW BC + DECW BC + MOV ES,#HIGHW(STARTOF(.init_array)) + MOVW AX,ES:LOWW(STARTOF(.init_array))[BC] + MOV CS,#0x00 + PUSH BC + CALL AX + POP BC +.L2_INIT: + CLRW AX + CMPW AX,BC + BNZ $.L1_INIT + + ;-------------------------------------------------- + ; call main function + ;-------------------------------------------------- + CALL !!_main ; main(); + + ;-------------------------------------------------- + ; call exit function + ;-------------------------------------------------- + CLRW AX ; exit(0) +_exit: + BR $_exit + +;----------------------------------------------------------------------------- +; atexit (only ret) +;----------------------------------------------------------------------------- +_atexit: + RET + +;----------------------------------------------------------------------------- +; section +;----------------------------------------------------------------------------- +$IF (__RENESAS_VERSION__ >= 0x01010000) +.SECTION .RLIB, TEXTF +.L_section_RLIB: +.SECTION .SLIB, TEXTF +.L_section_SLIB: +$ENDIF +.SECTION .textf, TEXTF +.L_section_textf: +.SECTION .const, CONST +.L_section_const: +.SECTION .constf, CONSTF +.L_section_constf: +.SECTION .data, DATA +.L_section_data: +;.SECTION .dataf, DATAF +;.L_section_dataf: +.SECTION .sdata, SDATA +.L_section_sdata: +.SECTION .bss, BSS +.L_section_bss: +;.SECTION .bssf, BSSF +;.L_section_bssf: +.SECTION .sbss, SBSS +.L_section_sbss: +.SECTION .init_array, CONSTF +.L_section_init_array: diff --git a/hdwinit.asm b/hdwinit.asm new file mode 100644 index 0000000..0b74c68 --- /dev/null +++ b/hdwinit.asm @@ -0,0 +1,35 @@ +;/********************************************************************************************************************** +; * DISCLAIMER +; * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No +; * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +; * applicable laws, including copyright laws. +; * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +; * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, +; * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM +; * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES +; * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO +; * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +; * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of +; * this software. By using this software, you agree to the additional terms and conditions found by accessing the +; * following link: +; * http://www.renesas.com/disclaimer +; * +; * Copyright (C) 2020 Renesas Electronics Corporation. All rights reserved. +; *********************************************************************************************************************/;--------------------------------------------------------------------- +; _hdwinit +; +; void _hdwinit(void); +; +; input: +; NONE +; output: +; NONE +;--------------------------------------------------------------------- + +; NOTE : THIS IS A TYPICAL EXAMPLE. + + .PUBLIC _hdwinit + +.textf .CSEG TEXTF +_hdwinit: + RET diff --git a/iodefine.h b/iodefine.h new file mode 100644 index 0000000..95f1d40 --- /dev/null +++ b/iodefine.h @@ -0,0 +1,2734 @@ +/******************************************************************************/ +/* DISCLAIMER */ +/* This software is supplied by Renesas Electronics Corporation and is only */ +/* intended for use with Renesas products. No other uses are authorized.This */ +/* software is owned by Renesas Electronics Corporation and is protected */ +/* under all applicable laws, including copyright laws. */ +/* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES */ +/* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING */ +/* BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR */ +/* PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY */ +/* DISCLAIMED. */ +/* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS */ +/* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE */ +/* LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL */ +/* DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS */ +/* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. */ +/* Renesas reserves the right, without notice, to make changes to this */ +/* software and to discontinue the availability of this software. */ +/* By using this software, you agree to the additional terms and conditions */ +/* found by accessing the following link: */ +/* www.renesas.com/disclaimer */ +/* */ +/* Device : RL78/R5F10PPJ */ +/* File Name : iodefine.h */ +/* Abstract : Definition of Special Function Register (SFR) */ +/* History : V1.11 [Device File version] */ +/* Options : -df=C:\Program Files (x86)\Renesas Electronics\CS+\CC\Device\ */ +/* RL78\Devicefile\DR5F10PPJ.DVF -o=C:\Users\temp\Desktop\multic */ +/* al\iodefine.h -f */ +/* Date : 2026-01-12 */ +/* Version : V1.19.00.01 [df2iodef.exe version] */ +/* This is a typical example. */ +/* */ +/******************************************************************************/ +#ifndef __R5F10PPJIODEFINE_HEADER__ +#define __R5F10PPJIODEFINE_HEADER__ + +typedef struct +{ + unsigned char no0:1; + unsigned char no1:1; + unsigned char no2:1; + unsigned char no3:1; + unsigned char no4:1; + unsigned char no5:1; + unsigned char no6:1; + unsigned char no7:1; +} __bitf_T; + +typedef struct +{ + unsigned char no0:1; + unsigned char no1:1; + unsigned char no2:1; + unsigned char no3:1; + unsigned char no4:1; + unsigned char no5:1; + unsigned char no6:1; + unsigned char no7:1; + unsigned char no8:1; + unsigned char no9:1; + unsigned char no10:1; + unsigned char no11:1; + unsigned char no12:1; + unsigned char no13:1; + unsigned char no14:1; + unsigned char no15:1; +} __bitf_T2; + + + +#define ADM2 (*(volatile __near unsigned char *)0x10) +#define ADM2_bit (*(volatile __near __bitf_T *)0x10) +#define ADTYP (((volatile __near __bitf_T *)0x10)->no0) +#define AWC (((volatile __near __bitf_T *)0x10)->no2) +#define ADRCK (((volatile __near __bitf_T *)0x10)->no3) +#define ADUL (*(volatile __near unsigned char *)0x11) +#define ADLL (*(volatile __near unsigned char *)0x12) +#define ADTES (*(volatile __near unsigned char *)0x13) +#define PIOR0 (*(volatile __near unsigned char *)0x16) +#define PIOR1 (*(volatile __near unsigned char *)0x17) +#define PIOR2 (*(volatile __near unsigned char *)0x18) +#define PIOR3 (*(volatile __near unsigned char *)0x19) +#define PIOR4 (*(volatile __near unsigned char *)0x1A) +#define PIOR5 (*(volatile __near unsigned char *)0x1B) +#define PIOR6 (*(volatile __near unsigned char *)0x1C) +#define PIOR7 (*(volatile __near unsigned char *)0x1D) +#define PIOR8 (*(volatile __near unsigned char *)0x1E) +#define PITHL1 (*(volatile __near unsigned char *)0x21) +#define PITHL1_bit (*(volatile __near __bitf_T *)0x21) +#define PITHL3 (*(volatile __near unsigned char *)0x23) +#define PITHL3_bit (*(volatile __near __bitf_T *)0x23) +#define PITHL4 (*(volatile __near unsigned char *)0x24) +#define PITHL4_bit (*(volatile __near __bitf_T *)0x24) +#define PITHL5 (*(volatile __near unsigned char *)0x25) +#define PITHL5_bit (*(volatile __near __bitf_T *)0x25) +#define PITHL6 (*(volatile __near unsigned char *)0x26) +#define PITHL6_bit (*(volatile __near __bitf_T *)0x26) +#define PITHL7 (*(volatile __near unsigned char *)0x27) +#define PITHL7_bit (*(volatile __near __bitf_T *)0x27) +#define PITHL10 (*(volatile __near unsigned char *)0x2A) +#define PITHL10_bit (*(volatile __near __bitf_T *)0x2A) +#define PITHL12 (*(volatile __near unsigned char *)0x2C) +#define PITHL12_bit (*(volatile __near __bitf_T *)0x2C) +#define PITHL15 (*(volatile __near unsigned char *)0x2F) +#define PITHL15_bit (*(volatile __near __bitf_T *)0x2F) +#define PU0 (*(volatile __near unsigned char *)0x30) +#define PU0_bit (*(volatile __near __bitf_T *)0x30) +#define PU1 (*(volatile __near unsigned char *)0x31) +#define PU1_bit (*(volatile __near __bitf_T *)0x31) +#define PU3 (*(volatile __near unsigned char *)0x33) +#define PU3_bit (*(volatile __near __bitf_T *)0x33) +#define PU4 (*(volatile __near unsigned char *)0x34) +#define PU4_bit (*(volatile __near __bitf_T *)0x34) +#define PU5 (*(volatile __near unsigned char *)0x35) +#define PU5_bit (*(volatile __near __bitf_T *)0x35) +#define PU6 (*(volatile __near unsigned char *)0x36) +#define PU6_bit (*(volatile __near __bitf_T *)0x36) +#define PU7 (*(volatile __near unsigned char *)0x37) +#define PU7_bit (*(volatile __near __bitf_T *)0x37) +#define PU10 (*(volatile __near unsigned char *)0x3A) +#define PU10_bit (*(volatile __near __bitf_T *)0x3A) +#define PU12 (*(volatile __near unsigned char *)0x3C) +#define PU12_bit (*(volatile __near __bitf_T *)0x3C) +#define PU14 (*(volatile __near unsigned char *)0x3E) +#define PU14_bit (*(volatile __near __bitf_T *)0x3E) +#define PU15 (*(volatile __near unsigned char *)0x3F) +#define PU15_bit (*(volatile __near __bitf_T *)0x3F) +#define PIM1 (*(volatile __near unsigned char *)0x41) +#define PIM1_bit (*(volatile __near __bitf_T *)0x41) +#define PIM3 (*(volatile __near unsigned char *)0x43) +#define PIM3_bit (*(volatile __near __bitf_T *)0x43) +#define PIM5 (*(volatile __near unsigned char *)0x45) +#define PIM5_bit (*(volatile __near __bitf_T *)0x45) +#define PIM6 (*(volatile __near unsigned char *)0x46) +#define PIM6_bit (*(volatile __near __bitf_T *)0x46) +#define PIM7 (*(volatile __near unsigned char *)0x47) +#define PIM7_bit (*(volatile __near __bitf_T *)0x47) +#define PIM12 (*(volatile __near unsigned char *)0x4C) +#define PIM12_bit (*(volatile __near __bitf_T *)0x4C) +#define POM1 (*(volatile __near unsigned char *)0x51) +#define POM1_bit (*(volatile __near __bitf_T *)0x51) +#define POM6 (*(volatile __near unsigned char *)0x56) +#define POM6_bit (*(volatile __near __bitf_T *)0x56) +#define POM7 (*(volatile __near unsigned char *)0x57) +#define POM7_bit (*(volatile __near __bitf_T *)0x57) +#define POM12 (*(volatile __near unsigned char *)0x5C) +#define POM12_bit (*(volatile __near __bitf_T *)0x5C) +#define PMC7 (*(volatile __near unsigned char *)0x67) +#define PMC7_bit (*(volatile __near __bitf_T *)0x67) +#define PMC12 (*(volatile __near unsigned char *)0x6C) +#define PMC12_bit (*(volatile __near __bitf_T *)0x6C) +#define NFEN0 (*(volatile __near unsigned char *)0x70) +#define NFEN0_bit (*(volatile __near __bitf_T *)0x70) +#define NFEN1 (*(volatile __near unsigned char *)0x71) +#define NFEN1_bit (*(volatile __near __bitf_T *)0x71) +#define NFEN2 (*(volatile __near unsigned char *)0x72) +#define NFEN2_bit (*(volatile __near __bitf_T *)0x72) +#define ISC (*(volatile __near unsigned char *)0x73) +#define ISC_bit (*(volatile __near __bitf_T *)0x73) +#define TIS0 (*(volatile __near unsigned char *)0x74) +#define TIS1 (*(volatile __near unsigned char *)0x75) +#define ADPC (*(volatile __near unsigned char *)0x76) +#define PMS (*(volatile __near unsigned char *)0x77) +#define PMS_bit (*(volatile __near __bitf_T *)0x77) +#define IAWCTL (*(volatile __near unsigned char *)0x78) +#define INTFLG0 (*(volatile __near unsigned char *)0x79) +#define TIS2 (*(volatile __near unsigned char *)0x7A) +#define LCHSEL (*(volatile __near unsigned char *)0x7B) +#define INTMSK (*(volatile __near unsigned char *)0x7C) +#define DFLCTL (*(volatile __near unsigned char *)0x90) +#define DFLCTL_bit (*(volatile __near __bitf_T *)0x90) +#define DFLEN (((volatile __near __bitf_T *)0x90)->no0) +#define HIOTRM (*(volatile __near unsigned char *)0xA0) +#define HOCODIV (*(volatile __near unsigned char *)0xA8) +#define SPMCTRL (*(volatile __near unsigned char *)0xD8) +#define SPOFR (*(volatile __near unsigned short *)0xDA) +#define SPUFR (*(volatile __near unsigned short *)0xDC) +#define PER0 (*(volatile __near unsigned char *)0xF0) +#define PER0_bit (*(volatile __near __bitf_T *)0xF0) +#define TAU0EN (((volatile __near __bitf_T *)0xF0)->no0) +#define TAU1EN (((volatile __near __bitf_T *)0xF0)->no1) +#define SAU0EN (((volatile __near __bitf_T *)0xF0)->no2) +#define SAU1EN (((volatile __near __bitf_T *)0xF0)->no3) +#define IICA0EN (((volatile __near __bitf_T *)0xF0)->no4) +#define ADCEN (((volatile __near __bitf_T *)0xF0)->no5) +#define RTCEN (((volatile __near __bitf_T *)0xF0)->no7) +#define OSMC (*(volatile __near unsigned char *)0xF3) +#define BCDADJ (*(volatile __near unsigned char *)0xFE) +#define SSR00 (*(volatile __near unsigned short *)0x100) +#define SSR00L (*(volatile __near unsigned char *)0x100) +#define SSR01 (*(volatile __near unsigned short *)0x102) +#define SSR01L (*(volatile __near unsigned char *)0x102) +#define SIR00 (*(volatile __near unsigned short *)0x104) +#define SIR00L (*(volatile __near unsigned char *)0x104) +#define SIR01 (*(volatile __near unsigned short *)0x106) +#define SIR01L (*(volatile __near unsigned char *)0x106) +#define SMR00 (*(volatile __near unsigned short *)0x108) +#define SMR01 (*(volatile __near unsigned short *)0x10A) +#define SCR00 (*(volatile __near unsigned short *)0x10C) +#define SCR01 (*(volatile __near unsigned short *)0x10E) +#define SE0 (*(volatile __near unsigned short *)0x110) +#define SE0L (*(volatile __near unsigned char *)0x110) +#define SE0L_bit (*(volatile __near __bitf_T *)0x110) +#define SS0 (*(volatile __near unsigned short *)0x112) +#define SS0L (*(volatile __near unsigned char *)0x112) +#define SS0L_bit (*(volatile __near __bitf_T *)0x112) +#define ST0 (*(volatile __near unsigned short *)0x114) +#define ST0L (*(volatile __near unsigned char *)0x114) +#define ST0L_bit (*(volatile __near __bitf_T *)0x114) +#define SPS0 (*(volatile __near unsigned short *)0x116) +#define SPS0L (*(volatile __near unsigned char *)0x116) +#define SO0 (*(volatile __near unsigned short *)0x118) +#define SOE0 (*(volatile __near unsigned short *)0x11A) +#define SOE0L (*(volatile __near unsigned char *)0x11A) +#define SOE0L_bit (*(volatile __near __bitf_T *)0x11A) +#define SOL0 (*(volatile __near unsigned short *)0x120) +#define SOL0L (*(volatile __near unsigned char *)0x120) +#define SSE0 (*(volatile __near unsigned short *)0x122) +#define SSE0L (*(volatile __near unsigned char *)0x122) +#define SSR10 (*(volatile __near unsigned short *)0x140) +#define SSR10L (*(volatile __near unsigned char *)0x140) +#define SSR11 (*(volatile __near unsigned short *)0x142) +#define SSR11L (*(volatile __near unsigned char *)0x142) +#define SIR10 (*(volatile __near unsigned short *)0x144) +#define SIR10L (*(volatile __near unsigned char *)0x144) +#define SIR11 (*(volatile __near unsigned short *)0x146) +#define SIR11L (*(volatile __near unsigned char *)0x146) +#define SMR10 (*(volatile __near unsigned short *)0x148) +#define SMR11 (*(volatile __near unsigned short *)0x14A) +#define SCR10 (*(volatile __near unsigned short *)0x14C) +#define SCR11 (*(volatile __near unsigned short *)0x14E) +#define SE1 (*(volatile __near unsigned short *)0x150) +#define SE1L (*(volatile __near unsigned char *)0x150) +#define SE1L_bit (*(volatile __near __bitf_T *)0x150) +#define SS1 (*(volatile __near unsigned short *)0x152) +#define SS1L (*(volatile __near unsigned char *)0x152) +#define SS1L_bit (*(volatile __near __bitf_T *)0x152) +#define ST1 (*(volatile __near unsigned short *)0x154) +#define ST1L (*(volatile __near unsigned char *)0x154) +#define ST1L_bit (*(volatile __near __bitf_T *)0x154) +#define SPS1 (*(volatile __near unsigned short *)0x156) +#define SPS1L (*(volatile __near unsigned char *)0x156) +#define SO1 (*(volatile __near unsigned short *)0x158) +#define SOE1 (*(volatile __near unsigned short *)0x15A) +#define SOE1L (*(volatile __near unsigned char *)0x15A) +#define SOE1L_bit (*(volatile __near __bitf_T *)0x15A) +#define SOL1 (*(volatile __near unsigned short *)0x160) +#define SOL1L (*(volatile __near unsigned char *)0x160) +#define SSE1 (*(volatile __near unsigned short *)0x162) +#define SSE1L (*(volatile __near unsigned char *)0x162) +#define TCR00 (*(volatile __near unsigned short *)0x180) +#define TCR01 (*(volatile __near unsigned short *)0x182) +#define TCR02 (*(volatile __near unsigned short *)0x184) +#define TCR03 (*(volatile __near unsigned short *)0x186) +#define TCR04 (*(volatile __near unsigned short *)0x188) +#define TCR05 (*(volatile __near unsigned short *)0x18A) +#define TCR06 (*(volatile __near unsigned short *)0x18C) +#define TCR07 (*(volatile __near unsigned short *)0x18E) +#define TMR00 (*(volatile __near unsigned short *)0x190) +#define TMR01 (*(volatile __near unsigned short *)0x192) +#define TMR02 (*(volatile __near unsigned short *)0x194) +#define TMR03 (*(volatile __near unsigned short *)0x196) +#define TMR04 (*(volatile __near unsigned short *)0x198) +#define TMR05 (*(volatile __near unsigned short *)0x19A) +#define TMR06 (*(volatile __near unsigned short *)0x19C) +#define TMR07 (*(volatile __near unsigned short *)0x19E) +#define TSR00 (*(volatile __near unsigned short *)0x1A0) +#define TSR00L (*(volatile __near unsigned char *)0x1A0) +#define TSR01 (*(volatile __near unsigned short *)0x1A2) +#define TSR01L (*(volatile __near unsigned char *)0x1A2) +#define TSR02 (*(volatile __near unsigned short *)0x1A4) +#define TSR02L (*(volatile __near unsigned char *)0x1A4) +#define TSR03 (*(volatile __near unsigned short *)0x1A6) +#define TSR03L (*(volatile __near unsigned char *)0x1A6) +#define TSR04 (*(volatile __near unsigned short *)0x1A8) +#define TSR04L (*(volatile __near unsigned char *)0x1A8) +#define TSR05 (*(volatile __near unsigned short *)0x1AA) +#define TSR05L (*(volatile __near unsigned char *)0x1AA) +#define TSR06 (*(volatile __near unsigned short *)0x1AC) +#define TSR06L (*(volatile __near unsigned char *)0x1AC) +#define TSR07 (*(volatile __near unsigned short *)0x1AE) +#define TSR07L (*(volatile __near unsigned char *)0x1AE) +#define TE0 (*(volatile __near unsigned short *)0x1B0) +#define TE0L (*(volatile __near unsigned char *)0x1B0) +#define TE0L_bit (*(volatile __near __bitf_T *)0x1B0) +#define TS0 (*(volatile __near unsigned short *)0x1B2) +#define TS0L (*(volatile __near unsigned char *)0x1B2) +#define TS0L_bit (*(volatile __near __bitf_T *)0x1B2) +#define TT0 (*(volatile __near unsigned short *)0x1B4) +#define TT0L (*(volatile __near unsigned char *)0x1B4) +#define TT0L_bit (*(volatile __near __bitf_T *)0x1B4) +#define TPS0 (*(volatile __near unsigned short *)0x1B6) +#define TO0 (*(volatile __near unsigned short *)0x1B8) +#define TO0L (*(volatile __near unsigned char *)0x1B8) +#define TOE0 (*(volatile __near unsigned short *)0x1BA) +#define TOE0L (*(volatile __near unsigned char *)0x1BA) +#define TOE0L_bit (*(volatile __near __bitf_T *)0x1BA) +#define TOL0 (*(volatile __near unsigned short *)0x1BC) +#define TOL0L (*(volatile __near unsigned char *)0x1BC) +#define TOM0 (*(volatile __near unsigned short *)0x1BE) +#define TOM0L (*(volatile __near unsigned char *)0x1BE) +#define TCR10 (*(volatile __near unsigned short *)0x1C0) +#define TCR11 (*(volatile __near unsigned short *)0x1C2) +#define TCR12 (*(volatile __near unsigned short *)0x1C4) +#define TCR13 (*(volatile __near unsigned short *)0x1C6) +#define TCR14 (*(volatile __near unsigned short *)0x1C8) +#define TCR15 (*(volatile __near unsigned short *)0x1CA) +#define TCR16 (*(volatile __near unsigned short *)0x1CC) +#define TCR17 (*(volatile __near unsigned short *)0x1CE) +#define TMR10 (*(volatile __near unsigned short *)0x1D0) +#define TMR11 (*(volatile __near unsigned short *)0x1D2) +#define TMR12 (*(volatile __near unsigned short *)0x1D4) +#define TMR13 (*(volatile __near unsigned short *)0x1D6) +#define TMR14 (*(volatile __near unsigned short *)0x1D8) +#define TMR15 (*(volatile __near unsigned short *)0x1DA) +#define TMR16 (*(volatile __near unsigned short *)0x1DC) +#define TMR17 (*(volatile __near unsigned short *)0x1DE) +#define TSR10 (*(volatile __near unsigned short *)0x1E0) +#define TSR10L (*(volatile __near unsigned char *)0x1E0) +#define TSR11 (*(volatile __near unsigned short *)0x1E2) +#define TSR11L (*(volatile __near unsigned char *)0x1E2) +#define TSR12 (*(volatile __near unsigned short *)0x1E4) +#define TSR12L (*(volatile __near unsigned char *)0x1E4) +#define TSR13 (*(volatile __near unsigned short *)0x1E6) +#define TSR13L (*(volatile __near unsigned char *)0x1E6) +#define TSR14 (*(volatile __near unsigned short *)0x1E8) +#define TSR14L (*(volatile __near unsigned char *)0x1E8) +#define TSR15 (*(volatile __near unsigned short *)0x1EA) +#define TSR15L (*(volatile __near unsigned char *)0x1EA) +#define TSR16 (*(volatile __near unsigned short *)0x1EC) +#define TSR16L (*(volatile __near unsigned char *)0x1EC) +#define TSR17 (*(volatile __near unsigned short *)0x1EE) +#define TSR17L (*(volatile __near unsigned char *)0x1EE) +#define TE1 (*(volatile __near unsigned short *)0x1F0) +#define TE1L (*(volatile __near unsigned char *)0x1F0) +#define TE1L_bit (*(volatile __near __bitf_T *)0x1F0) +#define TS1 (*(volatile __near unsigned short *)0x1F2) +#define TS1L (*(volatile __near unsigned char *)0x1F2) +#define TS1L_bit (*(volatile __near __bitf_T *)0x1F2) +#define TT1 (*(volatile __near unsigned short *)0x1F4) +#define TT1L (*(volatile __near unsigned char *)0x1F4) +#define TT1L_bit (*(volatile __near __bitf_T *)0x1F4) +#define TPS1 (*(volatile __near unsigned short *)0x1F6) +#define TO1 (*(volatile __near unsigned short *)0x1F8) +#define TO1L (*(volatile __near unsigned char *)0x1F8) +#define TOE1 (*(volatile __near unsigned short *)0x1FA) +#define TOE1L (*(volatile __near unsigned char *)0x1FA) +#define TOE1L_bit (*(volatile __near __bitf_T *)0x1FA) +#define TOL1 (*(volatile __near unsigned short *)0x1FC) +#define TOL1L (*(volatile __near unsigned char *)0x1FC) +#define TOM1 (*(volatile __near unsigned short *)0x1FE) +#define TOM1L (*(volatile __near unsigned char *)0x1FE) +#define ERADR (*(volatile __near unsigned short *)0x200) +#define ECCIER (*(volatile __near unsigned char *)0x202) +#define ECCER (*(volatile __near unsigned char *)0x203) +#define ECCTPR (*(volatile __near unsigned char *)0x204) +#define ECCTMDR (*(volatile __near unsigned char *)0x205) +#define ECCDWRVR (*(volatile __near unsigned short *)0x206) +#define PSRSEL (*(volatile __near unsigned char *)0x220) +#define PSRSEL_bit (*(volatile __near __bitf_T *)0x220) +#define PSNZCNT0 (*(volatile __near unsigned char *)0x222) +#define PSNZCNT0_bit (*(volatile __near __bitf_T *)0x222) +#define PSNZCNT1 (*(volatile __near unsigned char *)0x223) +#define PSNZCNT1_bit (*(volatile __near __bitf_T *)0x223) +#define PSNZCNT2 (*(volatile __near unsigned char *)0x224) +#define PSNZCNT2_bit (*(volatile __near __bitf_T *)0x224) +#define PSNZCNT3 (*(volatile __near unsigned char *)0x225) +#define PSNZCNT3_bit (*(volatile __near __bitf_T *)0x225) +#define DAM2 (*(volatile __near unsigned char *)0x227) +#define DAM2_bit (*(volatile __near __bitf_T *)0x227) +#define ANO0EN (((volatile __near __bitf_T *)0x227)->no0) +#define PWMDLY0 (*(volatile __near unsigned short *)0x228) +#define PWMDLY1 (*(volatile __near unsigned short *)0x22A) +#define PWMDLY2 (*(volatile __near unsigned short *)0x22C) +#define IICCTL00 (*(volatile __near unsigned char *)0x230) +#define IICCTL00_bit (*(volatile __near __bitf_T *)0x230) +#define SPT0 (((volatile __near __bitf_T *)0x230)->no0) +#define STT0 (((volatile __near __bitf_T *)0x230)->no1) +#define ACKE0 (((volatile __near __bitf_T *)0x230)->no2) +#define WTIM0 (((volatile __near __bitf_T *)0x230)->no3) +#define SPIE0 (((volatile __near __bitf_T *)0x230)->no4) +#define WREL0 (((volatile __near __bitf_T *)0x230)->no5) +#define LREL0 (((volatile __near __bitf_T *)0x230)->no6) +#define IICE0 (((volatile __near __bitf_T *)0x230)->no7) +#define IICCTL01 (*(volatile __near unsigned char *)0x231) +#define IICCTL01_bit (*(volatile __near __bitf_T *)0x231) +#define PRS0 (((volatile __near __bitf_T *)0x231)->no0) +#define DFC0 (((volatile __near __bitf_T *)0x231)->no2) +#define SMC0 (((volatile __near __bitf_T *)0x231)->no3) +#define DAD0 (((volatile __near __bitf_T *)0x231)->no4) +#define CLD0 (((volatile __near __bitf_T *)0x231)->no5) +#define WUP0 (((volatile __near __bitf_T *)0x231)->no7) +#define IICWL0 (*(volatile __near unsigned char *)0x232) +#define IICWH0 (*(volatile __near unsigned char *)0x233) +#define SVA0 (*(volatile __near unsigned char *)0x234) +#define TRJCR0 (*(volatile __near unsigned char *)0x240) +#define TRJIOC0 (*(volatile __near unsigned char *)0x241) +#define TRJIOC0_bit (*(volatile __near __bitf_T *)0x241) +#define TRJMR0 (*(volatile __near unsigned char *)0x242) +#define TRJMR0_bit (*(volatile __near __bitf_T *)0x242) +#define TRJISR0 (*(volatile __near unsigned char *)0x243) +#define TRJISR0_bit (*(volatile __near __bitf_T *)0x243) +#define TRDELC (*(volatile __near unsigned char *)0x260) +#define TRDELC_bit (*(volatile __near __bitf_T *)0x260) +#define TRDSTR (*(volatile __near unsigned char *)0x263) +#define TRDMR (*(volatile __near unsigned char *)0x264) +#define TRDMR_bit (*(volatile __near __bitf_T *)0x264) +#define TRDSYNC (((volatile __near __bitf_T *)0x264)->no0) +#define TRDBFC0 (((volatile __near __bitf_T *)0x264)->no4) +#define TRDBFD0 (((volatile __near __bitf_T *)0x264)->no5) +#define TRDBFC1 (((volatile __near __bitf_T *)0x264)->no6) +#define TRDBFD1 (((volatile __near __bitf_T *)0x264)->no7) +#define TRDPMR (*(volatile __near unsigned char *)0x265) +#define TRDPMR_bit (*(volatile __near __bitf_T *)0x265) +#define TRDPWMB0 (((volatile __near __bitf_T *)0x265)->no0) +#define TRDPWMC0 (((volatile __near __bitf_T *)0x265)->no1) +#define TRDPWMD0 (((volatile __near __bitf_T *)0x265)->no2) +#define TRDPWMB1 (((volatile __near __bitf_T *)0x265)->no4) +#define TRDPWMC1 (((volatile __near __bitf_T *)0x265)->no5) +#define TRDPWMD1 (((volatile __near __bitf_T *)0x265)->no6) +#define TRDFCR (*(volatile __near unsigned char *)0x266) +#define TRDFCR_bit (*(volatile __near __bitf_T *)0x266) +#define TRDOER1 (*(volatile __near unsigned char *)0x267) +#define TRDOER1_bit (*(volatile __near __bitf_T *)0x267) +#define TRDOER2 (*(volatile __near unsigned char *)0x268) +#define TRDOER2_bit (*(volatile __near __bitf_T *)0x268) +#define TRDSHUTS (((volatile __near __bitf_T *)0x268)->no0) +#define TRDPTO (((volatile __near __bitf_T *)0x268)->no7) +#define TRDOCR (*(volatile __near unsigned char *)0x269) +#define TRDOCR_bit (*(volatile __near __bitf_T *)0x269) +#define TRDDF0 (*(volatile __near unsigned char *)0x26A) +#define TRDDF0_bit (*(volatile __near __bitf_T *)0x26A) +#define TRDDF1 (*(volatile __near unsigned char *)0x26B) +#define TRDDF1_bit (*(volatile __near __bitf_T *)0x26B) +#define TRDCR0 (*(volatile __near unsigned char *)0x270) +#define TRDCR0_bit (*(volatile __near __bitf_T *)0x270) +#define TRDIORA0 (*(volatile __near unsigned char *)0x271) +#define TRDIORA0_bit (*(volatile __near __bitf_T *)0x271) +#define TRDIORC0 (*(volatile __near unsigned char *)0x272) +#define TRDIORC0_bit (*(volatile __near __bitf_T *)0x272) +#define TRDSR0 (*(volatile __near unsigned char *)0x273) +#define TRDSR0_bit (*(volatile __near __bitf_T *)0x273) +#define TRDIER0 (*(volatile __near unsigned char *)0x274) +#define TRDIER0_bit (*(volatile __near __bitf_T *)0x274) +#define TRDPOCR0 (*(volatile __near unsigned char *)0x275) +#define TRDPOCR0_bit (*(volatile __near __bitf_T *)0x275) +#define TRD0 (*(volatile __near unsigned short *)0x276) +#define TRDGRA0 (*(volatile __near unsigned short *)0x278) +#define TRDGRB0 (*(volatile __near unsigned short *)0x27A) +#define TRDCR1 (*(volatile __near unsigned char *)0x280) +#define TRDCR1_bit (*(volatile __near __bitf_T *)0x280) +#define TRDIORA1 (*(volatile __near unsigned char *)0x281) +#define TRDIORA1_bit (*(volatile __near __bitf_T *)0x281) +#define TRDIORC1 (*(volatile __near unsigned char *)0x282) +#define TRDIORC1_bit (*(volatile __near __bitf_T *)0x282) +#define TRDSR1 (*(volatile __near unsigned char *)0x283) +#define TRDSR1_bit (*(volatile __near __bitf_T *)0x283) +#define TRDIER1 (*(volatile __near unsigned char *)0x284) +#define TRDIER1_bit (*(volatile __near __bitf_T *)0x284) +#define TRDPOCR1 (*(volatile __near unsigned char *)0x285) +#define TRDPOCR1_bit (*(volatile __near __bitf_T *)0x285) +#define TRD1 (*(volatile __near unsigned short *)0x286) +#define TRDGRA1 (*(volatile __near unsigned short *)0x288) +#define TRDGRB1 (*(volatile __near unsigned short *)0x28A) +#define CMPCTL (*(volatile __near unsigned char *)0x2A0) +#define CMPCTL_bit (*(volatile __near __bitf_T *)0x2A0) +#define COE (((volatile __near __bitf_T *)0x2A0)->no1) +#define HCMPON (((volatile __near __bitf_T *)0x2A0)->no7) +#define CMPSEL (*(volatile __near unsigned char *)0x2A1) +#define CMPSEL_bit (*(volatile __near __bitf_T *)0x2A1) +#define CPOE (((volatile __near __bitf_T *)0x2A1)->no6) +#define CMPMON (*(volatile __near unsigned char *)0x2A2) +#define CMPMON_bit (*(volatile __near __bitf_T *)0x2A2) +#define PER1 (*(volatile __near unsigned char *)0x2C0) +#define PER1_bit (*(volatile __near __bitf_T *)0x2C0) +#define TRJ0EN (((volatile __near __bitf_T *)0x2C0)->no0) +#define DTCEN (((volatile __near __bitf_T *)0x2C0)->no3) +#define TRD0EN (((volatile __near __bitf_T *)0x2C0)->no4) +#define CMPEN (((volatile __near __bitf_T *)0x2C0)->no5) +#define DACEN (((volatile __near __bitf_T *)0x2C0)->no7) +#define PER2 (*(volatile __near unsigned char *)0x2C1) +#define PER2_bit (*(volatile __near __bitf_T *)0x2C1) +#define CAN0EN (((volatile __near __bitf_T *)0x2C1)->no0) +#define LIN0EN (((volatile __near __bitf_T *)0x2C1)->no2) +#define LIN1EN (((volatile __near __bitf_T *)0x2C1)->no3) +#define CANCKSEL (*(volatile __near unsigned char *)0x2C2) +#define CANCKSEL_bit (*(volatile __near __bitf_T *)0x2C2) +#define CAN0MCKE (((volatile __near __bitf_T *)0x2C2)->no0) +#define LINCKSEL (*(volatile __near unsigned char *)0x2C3) +#define LINCKSEL_bit (*(volatile __near __bitf_T *)0x2C3) +#define LIN0MCK (((volatile __near __bitf_T *)0x2C3)->no0) +#define LIN1MCK (((volatile __near __bitf_T *)0x2C3)->no1) +#define LIN0MCKE (((volatile __near __bitf_T *)0x2C3)->no4) +#define LIN1MCKE (((volatile __near __bitf_T *)0x2C3)->no5) +#define CKSEL (*(volatile __near unsigned char *)0x2C4) +#define CKSEL_bit (*(volatile __near __bitf_T *)0x2C4) +#define SELLOSC (((volatile __near __bitf_T *)0x2C4)->no0) +#define TRD_CKSEL (((volatile __near __bitf_T *)0x2C4)->no2) +#define PLLCTL (*(volatile __near unsigned char *)0x2C5) +#define PLLCTL_bit (*(volatile __near __bitf_T *)0x2C5) +#define PLLON (((volatile __near __bitf_T *)0x2C5)->no0) +#define PLLMUL (((volatile __near __bitf_T *)0x2C5)->no1) +#define SELPLL (((volatile __near __bitf_T *)0x2C5)->no2) +#define PLLDIV0 (((volatile __near __bitf_T *)0x2C5)->no4) +#define PLLDIV1 (((volatile __near __bitf_T *)0x2C5)->no5) +#define LCKSEL0 (((volatile __near __bitf_T *)0x2C5)->no6) +#define LCKSEL1 (((volatile __near __bitf_T *)0x2C5)->no7) +#define PLLSTS (*(volatile __near unsigned char *)0x2C6) +#define PLLSTS_bit (*(volatile __near __bitf_T *)0x2C6) +#define SELPLLS (((volatile __near __bitf_T *)0x2C6)->no3) +#define LOCK (((volatile __near __bitf_T *)0x2C6)->no7) +#define MDIV (*(volatile __near unsigned char *)0x2C7) +#define RTCCL (*(volatile __near unsigned char *)0x2C8) +#define RTCCL_bit (*(volatile __near __bitf_T *)0x2C8) +#define POCRES (*(volatile __near unsigned char *)0x2C9) +#define POCRES_bit (*(volatile __near __bitf_T *)0x2C9) +#define POCRES0 (((volatile __near __bitf_T *)0x2C9)->no0) +#define CLKRF (((volatile __near __bitf_T *)0x2C9)->no4) +#define STPSTC (*(volatile __near unsigned char *)0x2CA) +#define STPSTC_bit (*(volatile __near __bitf_T *)0x2CA) +#define STPSEL (((volatile __near __bitf_T *)0x2CA)->no0) +#define STPLV (((volatile __near __bitf_T *)0x2CA)->no4) +#define STPOEN (((volatile __near __bitf_T *)0x2CA)->no7) +#define HDTCCR0 (*(volatile __near unsigned char *)0x2D0) +#define HDTCCR0_bit (*(volatile __near __bitf_T *)0x2D0) +#define HMODE0 (((volatile __near __bitf_T *)0x2D0)->no0) +#define HRPTSEL0 (((volatile __near __bitf_T *)0x2D0)->no1) +#define HSAMOD0 (((volatile __near __bitf_T *)0x2D0)->no2) +#define HDAMOD0 (((volatile __near __bitf_T *)0x2D0)->no3) +#define HCHNE0 (((volatile __near __bitf_T *)0x2D0)->no4) +#define HRPTINT0 (((volatile __near __bitf_T *)0x2D0)->no5) +#define HSZ0 (((volatile __near __bitf_T *)0x2D0)->no6) +#define HDTCCT0 (*(volatile __near unsigned char *)0x2D2) +#define HDTCCT0_bit (*(volatile __near __bitf_T *)0x2D2) +#define HDTRLD0 (*(volatile __near unsigned char *)0x2D3) +#define HDTRLD0_bit (*(volatile __near __bitf_T *)0x2D3) +#define HDTSAR0 (*(volatile __near unsigned short *)0x2D4) +#define HDTDAR0 (*(volatile __near unsigned short *)0x2D6) +#define HDTCCR1 (*(volatile __near unsigned char *)0x2D8) +#define HDTCCR1_bit (*(volatile __near __bitf_T *)0x2D8) +#define HMODE1 (((volatile __near __bitf_T *)0x2D8)->no0) +#define HRPTSEL1 (((volatile __near __bitf_T *)0x2D8)->no1) +#define HSAMOD1 (((volatile __near __bitf_T *)0x2D8)->no2) +#define HDAMOD1 (((volatile __near __bitf_T *)0x2D8)->no3) +#define HCHNE1 (((volatile __near __bitf_T *)0x2D8)->no4) +#define HRPTINT1 (((volatile __near __bitf_T *)0x2D8)->no5) +#define HSZ1 (((volatile __near __bitf_T *)0x2D8)->no6) +#define HDTCCT1 (*(volatile __near unsigned char *)0x2DA) +#define HDTCCT1_bit (*(volatile __near __bitf_T *)0x2DA) +#define HDTRLD1 (*(volatile __near unsigned char *)0x2DB) +#define HDTRLD1_bit (*(volatile __near __bitf_T *)0x2DB) +#define HDTSAR1 (*(volatile __near unsigned short *)0x2DC) +#define HDTDAR1 (*(volatile __near unsigned short *)0x2DE) +#define DTCBAR (*(volatile __near unsigned char *)0x2E0) +#define SELHS0 (*(volatile __near unsigned char *)0x2E1) +#define SELHS0_bit (*(volatile __near __bitf_T *)0x2E1) +#define SELHS1 (*(volatile __near unsigned char *)0x2E2) +#define SELHS1_bit (*(volatile __near __bitf_T *)0x2E2) +#define DTCEN0 (*(volatile __near unsigned char *)0x2E8) +#define DTCEN0_bit (*(volatile __near __bitf_T *)0x2E8) +#define DTCEN00 (((volatile __near __bitf_T *)0x2E8)->no0) +#define DTCEN01 (((volatile __near __bitf_T *)0x2E8)->no1) +#define DTCEN02 (((volatile __near __bitf_T *)0x2E8)->no2) +#define DTCEN03 (((volatile __near __bitf_T *)0x2E8)->no3) +#define DTCEN04 (((volatile __near __bitf_T *)0x2E8)->no4) +#define DTCEN05 (((volatile __near __bitf_T *)0x2E8)->no5) +#define DTCEN06 (((volatile __near __bitf_T *)0x2E8)->no6) +#define DTCEN1 (*(volatile __near unsigned char *)0x2E9) +#define DTCEN1_bit (*(volatile __near __bitf_T *)0x2E9) +#define DTCEN10 (((volatile __near __bitf_T *)0x2E9)->no0) +#define DTCEN11 (((volatile __near __bitf_T *)0x2E9)->no1) +#define DTCEN12 (((volatile __near __bitf_T *)0x2E9)->no2) +#define DTCEN13 (((volatile __near __bitf_T *)0x2E9)->no3) +#define DTCEN14 (((volatile __near __bitf_T *)0x2E9)->no4) +#define DTCEN15 (((volatile __near __bitf_T *)0x2E9)->no5) +#define DTCEN16 (((volatile __near __bitf_T *)0x2E9)->no6) +#define DTCEN17 (((volatile __near __bitf_T *)0x2E9)->no7) +#define DTCEN2 (*(volatile __near unsigned char *)0x2EA) +#define DTCEN2_bit (*(volatile __near __bitf_T *)0x2EA) +#define DTCEN20 (((volatile __near __bitf_T *)0x2EA)->no0) +#define DTCEN21 (((volatile __near __bitf_T *)0x2EA)->no1) +#define DTCEN22 (((volatile __near __bitf_T *)0x2EA)->no2) +#define DTCEN23 (((volatile __near __bitf_T *)0x2EA)->no3) +#define DTCEN24 (((volatile __near __bitf_T *)0x2EA)->no4) +#define DTCEN25 (((volatile __near __bitf_T *)0x2EA)->no5) +#define DTCEN27 (((volatile __near __bitf_T *)0x2EA)->no7) +#define DTCEN3 (*(volatile __near unsigned char *)0x2EB) +#define DTCEN3_bit (*(volatile __near __bitf_T *)0x2EB) +#define DTCEN30 (((volatile __near __bitf_T *)0x2EB)->no0) +#define DTCEN31 (((volatile __near __bitf_T *)0x2EB)->no1) +#define DTCEN32 (((volatile __near __bitf_T *)0x2EB)->no2) +#define DTCEN33 (((volatile __near __bitf_T *)0x2EB)->no3) +#define DTCEN34 (((volatile __near __bitf_T *)0x2EB)->no4) +#define DTCEN35 (((volatile __near __bitf_T *)0x2EB)->no5) +#define DTCEN36 (((volatile __near __bitf_T *)0x2EB)->no6) +#define DTCEN37 (((volatile __near __bitf_T *)0x2EB)->no7) +#define DTCEN4 (*(volatile __near unsigned char *)0x2EC) +#define DTCEN4_bit (*(volatile __near __bitf_T *)0x2EC) +#define DTCEN40 (((volatile __near __bitf_T *)0x2EC)->no0) +#define DTCEN41 (((volatile __near __bitf_T *)0x2EC)->no1) +#define DTCEN42 (((volatile __near __bitf_T *)0x2EC)->no2) +#define DTCEN43 (((volatile __near __bitf_T *)0x2EC)->no3) +#define DTCEN44 (((volatile __near __bitf_T *)0x2EC)->no4) +#define DTCEN45 (((volatile __near __bitf_T *)0x2EC)->no5) +#define DTCEN46 (((volatile __near __bitf_T *)0x2EC)->no6) +#define DTCEN47 (((volatile __near __bitf_T *)0x2EC)->no7) +#define DTCEN5 (*(volatile __near unsigned char *)0x2ED) +#define DTCEN5_bit (*(volatile __near __bitf_T *)0x2ED) +#define DTCEN52 (((volatile __near __bitf_T *)0x2ED)->no2) +#define DTCEN53 (((volatile __near __bitf_T *)0x2ED)->no3) +#define DTCEN54 (((volatile __near __bitf_T *)0x2ED)->no4) +#define DTCEN55 (((volatile __near __bitf_T *)0x2ED)->no5) +#define DTCEN56 (((volatile __near __bitf_T *)0x2ED)->no6) +#define DTCEN57 (((volatile __near __bitf_T *)0x2ED)->no7) +#define CRC0CTL (*(volatile __near unsigned char *)0x2F0) +#define CRC0CTL_bit (*(volatile __near __bitf_T *)0x2F0) +#define CRC0EN (((volatile __near __bitf_T *)0x2F0)->no7) +#define PGCRCL (*(volatile __near unsigned short *)0x2F2) +#define CRCMD (*(volatile __near unsigned char *)0x2F9) +#define CRCD (*(volatile __near unsigned short *)0x2FA) +#define C0CFGL (*(volatile __near unsigned short *)0x300) +#define C0CFGLL (*(volatile __near unsigned char *)0x300) +#define C0CFGLH (*(volatile __near unsigned char *)0x301) +#define C0CFGH (*(volatile __near unsigned short *)0x302) +#define C0CFGHL (*(volatile __near unsigned char *)0x302) +#define C0CFGHH (*(volatile __near unsigned char *)0x303) +#define C0CTRL (*(volatile __near unsigned short *)0x304) +#define C0CTRLL (*(volatile __near unsigned char *)0x304) +#define C0CTRLH (*(volatile __near unsigned char *)0x305) +#define C0CTRH (*(volatile __near unsigned short *)0x306) +#define C0CTRHL (*(volatile __near unsigned char *)0x306) +#define C0CTRHH (*(volatile __near unsigned char *)0x307) +#define C0STSL (*(volatile __near unsigned short *)0x308) +#define C0STSLL (*(volatile __near unsigned char *)0x308) +#define C0STSLH (*(volatile __near unsigned char *)0x309) +#define C0STSH (*(volatile __near unsigned short *)0x30A) +#define C0STSHL (*(volatile __near unsigned char *)0x30A) +#define C0STSHH (*(volatile __near unsigned char *)0x30B) +#define C0ERFLL (*(volatile __near unsigned short *)0x30C) +#define C0ERFLLL (*(volatile __near unsigned char *)0x30C) +#define C0ERFLLH (*(volatile __near unsigned char *)0x30D) +#define C0ERFLH (*(volatile __near unsigned short *)0x30E) +#define C0ERFLHL (*(volatile __near unsigned char *)0x30E) +#define C0ERFLHH (*(volatile __near unsigned char *)0x30F) +#define GCFGL (*(volatile __near unsigned short *)0x322) +#define GCFGLL (*(volatile __near unsigned char *)0x322) +#define GCFGLH (*(volatile __near unsigned char *)0x323) +#define GCFGH (*(volatile __near unsigned short *)0x324) +#define GCFGHL (*(volatile __near unsigned char *)0x324) +#define GCFGHH (*(volatile __near unsigned char *)0x325) +#define GCTRL (*(volatile __near unsigned short *)0x326) +#define GCTRLL (*(volatile __near unsigned char *)0x326) +#define GCTRLH (*(volatile __near unsigned char *)0x327) +#define GCTRH (*(volatile __near unsigned short *)0x328) +#define GCTRHL (*(volatile __near unsigned char *)0x328) +#define GCTRHH (*(volatile __near unsigned char *)0x329) +#define GSTS (*(volatile __near unsigned short *)0x32A) +#define GSTSL (*(volatile __near unsigned char *)0x32A) +#define GSTSH (*(volatile __near unsigned char *)0x32B) +#define GERFLL (*(volatile __near unsigned char *)0x32C) +#define GTSC (*(volatile __near unsigned short *)0x32E) +#define GAFLCFG (*(volatile __near unsigned short *)0x330) +#define GAFLCFGL (*(volatile __near unsigned char *)0x330) +#define GAFLCFGH (*(volatile __near unsigned char *)0x331) +#define RMNB (*(volatile __near unsigned short *)0x332) +#define RMNBL (*(volatile __near unsigned char *)0x332) +#define RMND0 (*(volatile __near unsigned short *)0x334) +#define RMND0L (*(volatile __near unsigned char *)0x334) +#define RMND0H (*(volatile __near unsigned char *)0x335) +#define RFCC0 (*(volatile __near unsigned short *)0x338) +#define RFCC0L (*(volatile __near unsigned char *)0x338) +#define RFCC0H (*(volatile __near unsigned char *)0x339) +#define RFCC1 (*(volatile __near unsigned short *)0x33A) +#define RFCC1L (*(volatile __near unsigned char *)0x33A) +#define RFCC1H (*(volatile __near unsigned char *)0x33B) +#define RFSTS0 (*(volatile __near unsigned short *)0x340) +#define RFSTS0L (*(volatile __near unsigned char *)0x340) +#define RFSTS0H (*(volatile __near unsigned char *)0x341) +#define RFSTS1 (*(volatile __near unsigned short *)0x342) +#define RFSTS1L (*(volatile __near unsigned char *)0x342) +#define RFSTS1H (*(volatile __near unsigned char *)0x343) +#define RFPCTR0 (*(volatile __near unsigned short *)0x348) +#define RFPCTR0L (*(volatile __near unsigned char *)0x348) +#define RFPCTR0H (*(volatile __near unsigned char *)0x349) +#define RFPCTR1 (*(volatile __near unsigned short *)0x34A) +#define RFPCTR1L (*(volatile __near unsigned char *)0x34A) +#define RFPCTR1H (*(volatile __near unsigned char *)0x34B) +#define CFCCL0 (*(volatile __near unsigned short *)0x350) +#define CFCCL0L (*(volatile __near unsigned char *)0x350) +#define CFCCL0H (*(volatile __near unsigned char *)0x351) +#define CFCCH0 (*(volatile __near unsigned short *)0x352) +#define CFCCH0L (*(volatile __near unsigned char *)0x352) +#define CFCCH0H (*(volatile __near unsigned char *)0x353) +#define CFSTS0 (*(volatile __near unsigned short *)0x358) +#define CFSTS0L (*(volatile __near unsigned char *)0x358) +#define CFSTS0H (*(volatile __near unsigned char *)0x359) +#define CFPCTR0 (*(volatile __near unsigned short *)0x35C) +#define CFPCTR0L (*(volatile __near unsigned char *)0x35C) +#define RFMSTS (*(volatile __near unsigned char *)0x360) +#define CFMSTS (*(volatile __near unsigned char *)0x361) +#define RFISTS (*(volatile __near unsigned char *)0x362) +#define CFISTS (*(volatile __near unsigned char *)0x363) +#define TMC0 (*(volatile __near unsigned char *)0x364) +#define TMC1 (*(volatile __near unsigned char *)0x365) +#define TMC2 (*(volatile __near unsigned char *)0x366) +#define TMC3 (*(volatile __near unsigned char *)0x367) +#define TMSTS0 (*(volatile __near unsigned char *)0x36C) +#define TMSTS1 (*(volatile __near unsigned char *)0x36D) +#define TMSTS2 (*(volatile __near unsigned char *)0x36E) +#define TMSTS3 (*(volatile __near unsigned char *)0x36F) +#define TMTRSTS (*(volatile __near unsigned short *)0x374) +#define TMTRSTSL (*(volatile __near unsigned char *)0x374) +#define TMTRSTSH (*(volatile __near unsigned char *)0x375) +#define TMTCSTS (*(volatile __near unsigned short *)0x376) +#define TMTCSTSL (*(volatile __near unsigned char *)0x376) +#define TMTCSTSH (*(volatile __near unsigned char *)0x377) +#define TMTASTS (*(volatile __near unsigned short *)0x378) +#define TMTASTSL (*(volatile __near unsigned char *)0x378) +#define TMTASTSH (*(volatile __near unsigned char *)0x379) +#define TMIEC (*(volatile __near unsigned short *)0x37A) +#define TMIECL (*(volatile __near unsigned char *)0x37A) +#define TMIECH (*(volatile __near unsigned char *)0x37B) +#define THLCC0 (*(volatile __near unsigned short *)0x37C) +#define THLCC0L (*(volatile __near unsigned char *)0x37C) +#define THLCC0H (*(volatile __near unsigned char *)0x37D) +#define THLSTS0 (*(volatile __near unsigned short *)0x380) +#define THLSTS0L (*(volatile __near unsigned char *)0x380) +#define THLSTS0H (*(volatile __near unsigned char *)0x381) +#define THLPCTR0 (*(volatile __near unsigned short *)0x384) +#define THLPCTR0L (*(volatile __near unsigned char *)0x384) +#define THLPCTR0H (*(volatile __near unsigned char *)0x385) +#define GTINTSTS (*(volatile __near unsigned short *)0x388) +#define GTINTSTSL (*(volatile __near unsigned char *)0x388) +#define GTINTSTSH (*(volatile __near unsigned char *)0x389) +#define GRWCR (*(volatile __near unsigned short *)0x38A) +#define GRWCRL (*(volatile __near unsigned char *)0x38A) +#define GRWCRH (*(volatile __near unsigned char *)0x38B) +#define GTSTCFG (*(volatile __near unsigned short *)0x38C) +#define GTSTCFGL (*(volatile __near unsigned char *)0x38C) +#define GTSTCFGH (*(volatile __near unsigned char *)0x38D) +#define GTSTCTRL (*(volatile __near unsigned char *)0x38E) +#define GLOCKK (*(volatile __near unsigned short *)0x394) +#define GAFLIDL0 (*(volatile __near unsigned short *)0x3A0) +#define RMIDL0 (*(volatile __near unsigned short *)0x3A0) +#define GAFLIDL0L (*(volatile __near unsigned char *)0x3A0) +#define RMIDL0L (*(volatile __near unsigned char *)0x3A0) +#define GAFLIDL0H (*(volatile __near unsigned char *)0x3A1) +#define RMIDL0H (*(volatile __near unsigned char *)0x3A1) +#define GAFLIDH0 (*(volatile __near unsigned short *)0x3A2) +#define RMIDH0 (*(volatile __near unsigned short *)0x3A2) +#define GAFLIDH0L (*(volatile __near unsigned char *)0x3A2) +#define RMIDH0L (*(volatile __near unsigned char *)0x3A2) +#define GAFLIDH0H (*(volatile __near unsigned char *)0x3A3) +#define RMIDH0H (*(volatile __near unsigned char *)0x3A3) +#define GAFLML0 (*(volatile __near unsigned short *)0x3A4) +#define RMTS0 (*(volatile __near unsigned short *)0x3A4) +#define GAFLML0L (*(volatile __near unsigned char *)0x3A4) +#define RMTS0L (*(volatile __near unsigned char *)0x3A4) +#define GAFLML0H (*(volatile __near unsigned char *)0x3A5) +#define RMTS0H (*(volatile __near unsigned char *)0x3A5) +#define GAFLMH0 (*(volatile __near unsigned short *)0x3A6) +#define RMPTR0 (*(volatile __near unsigned short *)0x3A6) +#define GAFLMH0L (*(volatile __near unsigned char *)0x3A6) +#define RMPTR0L (*(volatile __near unsigned char *)0x3A6) +#define GAFLMH0H (*(volatile __near unsigned char *)0x3A7) +#define RMPTR0H (*(volatile __near unsigned char *)0x3A7) +#define GAFLPL0 (*(volatile __near unsigned short *)0x3A8) +#define RMDF00 (*(volatile __near unsigned short *)0x3A8) +#define GAFLPL0L (*(volatile __near unsigned char *)0x3A8) +#define RMDF00L (*(volatile __near unsigned char *)0x3A8) +#define GAFLPL0H (*(volatile __near unsigned char *)0x3A9) +#define RMDF00H (*(volatile __near unsigned char *)0x3A9) +#define GAFLPH0 (*(volatile __near unsigned short *)0x3AA) +#define RMDF10 (*(volatile __near unsigned short *)0x3AA) +#define GAFLPH0L (*(volatile __near unsigned char *)0x3AA) +#define RMDF10L (*(volatile __near unsigned char *)0x3AA) +#define GAFLPH0H (*(volatile __near unsigned char *)0x3AB) +#define RMDF10H (*(volatile __near unsigned char *)0x3AB) +#define GAFLIDL1 (*(volatile __near unsigned short *)0x3AC) +#define RMDF20 (*(volatile __near unsigned short *)0x3AC) +#define GAFLIDL1L (*(volatile __near unsigned char *)0x3AC) +#define RMDF20L (*(volatile __near unsigned char *)0x3AC) +#define GAFLIDL1H (*(volatile __near unsigned char *)0x3AD) +#define RMDF20H (*(volatile __near unsigned char *)0x3AD) +#define GAFLIDH1 (*(volatile __near unsigned short *)0x3AE) +#define RMDF30 (*(volatile __near unsigned short *)0x3AE) +#define GAFLIDH1L (*(volatile __near unsigned char *)0x3AE) +#define RMDF30L (*(volatile __near unsigned char *)0x3AE) +#define GAFLIDH1H (*(volatile __near unsigned char *)0x3AF) +#define RMDF30H (*(volatile __near unsigned char *)0x3AF) +#define GAFLML1 (*(volatile __near unsigned short *)0x3B0) +#define RMIDL1 (*(volatile __near unsigned short *)0x3B0) +#define GAFLML1L (*(volatile __near unsigned char *)0x3B0) +#define RMIDL1L (*(volatile __near unsigned char *)0x3B0) +#define GAFLML1H (*(volatile __near unsigned char *)0x3B1) +#define RMIDL1H (*(volatile __near unsigned char *)0x3B1) +#define GAFLMH1 (*(volatile __near unsigned short *)0x3B2) +#define RMIDH1 (*(volatile __near unsigned short *)0x3B2) +#define GAFLMH1L (*(volatile __near unsigned char *)0x3B2) +#define RMIDH1L (*(volatile __near unsigned char *)0x3B2) +#define GAFLMH1H (*(volatile __near unsigned char *)0x3B3) +#define RMIDH1H (*(volatile __near unsigned char *)0x3B3) +#define GAFLPL1 (*(volatile __near unsigned short *)0x3B4) +#define RMTS1 (*(volatile __near unsigned short *)0x3B4) +#define GAFLPL1L (*(volatile __near unsigned char *)0x3B4) +#define RMTS1L (*(volatile __near unsigned char *)0x3B4) +#define GAFLPL1H (*(volatile __near unsigned char *)0x3B5) +#define RMTS1H (*(volatile __near unsigned char *)0x3B5) +#define GAFLPH1 (*(volatile __near unsigned short *)0x3B6) +#define RMPTR1 (*(volatile __near unsigned short *)0x3B6) +#define GAFLPH1L (*(volatile __near unsigned char *)0x3B6) +#define RMPTR1L (*(volatile __near unsigned char *)0x3B6) +#define GAFLPH1H (*(volatile __near unsigned char *)0x3B7) +#define RMPTR1H (*(volatile __near unsigned char *)0x3B7) +#define GAFLIDL2 (*(volatile __near unsigned short *)0x3B8) +#define RMDF01 (*(volatile __near unsigned short *)0x3B8) +#define GAFLIDL2L (*(volatile __near unsigned char *)0x3B8) +#define RMDF01L (*(volatile __near unsigned char *)0x3B8) +#define GAFLIDL2H (*(volatile __near unsigned char *)0x3B9) +#define RMDF01H (*(volatile __near unsigned char *)0x3B9) +#define GAFLIDH2 (*(volatile __near unsigned short *)0x3BA) +#define RMDF11 (*(volatile __near unsigned short *)0x3BA) +#define GAFLIDH2L (*(volatile __near unsigned char *)0x3BA) +#define RMDF11L (*(volatile __near unsigned char *)0x3BA) +#define GAFLIDH2H (*(volatile __near unsigned char *)0x3BB) +#define RMDF11H (*(volatile __near unsigned char *)0x3BB) +#define GAFLML2 (*(volatile __near unsigned short *)0x3BC) +#define RMDF21 (*(volatile __near unsigned short *)0x3BC) +#define GAFLML2L (*(volatile __near unsigned char *)0x3BC) +#define RMDF21L (*(volatile __near unsigned char *)0x3BC) +#define GAFLML2H (*(volatile __near unsigned char *)0x3BD) +#define RMDF21H (*(volatile __near unsigned char *)0x3BD) +#define GAFLMH2 (*(volatile __near unsigned short *)0x3BE) +#define RMDF31 (*(volatile __near unsigned short *)0x3BE) +#define GAFLMH2L (*(volatile __near unsigned char *)0x3BE) +#define RMDF31L (*(volatile __near unsigned char *)0x3BE) +#define GAFLMH2H (*(volatile __near unsigned char *)0x3BF) +#define RMDF31H (*(volatile __near unsigned char *)0x3BF) +#define GAFLPL2 (*(volatile __near unsigned short *)0x3C0) +#define RMIDL2 (*(volatile __near unsigned short *)0x3C0) +#define GAFLPL2L (*(volatile __near unsigned char *)0x3C0) +#define RMIDL2L (*(volatile __near unsigned char *)0x3C0) +#define GAFLPL2H (*(volatile __near unsigned char *)0x3C1) +#define RMIDL2H (*(volatile __near unsigned char *)0x3C1) +#define GAFLPH2 (*(volatile __near unsigned short *)0x3C2) +#define RMIDH2 (*(volatile __near unsigned short *)0x3C2) +#define GAFLPH2L (*(volatile __near unsigned char *)0x3C2) +#define RMIDH2L (*(volatile __near unsigned char *)0x3C2) +#define GAFLPH2H (*(volatile __near unsigned char *)0x3C3) +#define RMIDH2H (*(volatile __near unsigned char *)0x3C3) +#define GAFLIDL3 (*(volatile __near unsigned short *)0x3C4) +#define RMTS2 (*(volatile __near unsigned short *)0x3C4) +#define GAFLIDL3L (*(volatile __near unsigned char *)0x3C4) +#define RMTS2L (*(volatile __near unsigned char *)0x3C4) +#define GAFLIDL3H (*(volatile __near unsigned char *)0x3C5) +#define RMTS2H (*(volatile __near unsigned char *)0x3C5) +#define GAFLIDH3 (*(volatile __near unsigned short *)0x3C6) +#define RMPTR2 (*(volatile __near unsigned short *)0x3C6) +#define GAFLIDH3L (*(volatile __near unsigned char *)0x3C6) +#define RMPTR2L (*(volatile __near unsigned char *)0x3C6) +#define GAFLIDH3H (*(volatile __near unsigned char *)0x3C7) +#define RMPTR2H (*(volatile __near unsigned char *)0x3C7) +#define GAFLML3 (*(volatile __near unsigned short *)0x3C8) +#define RMDF02 (*(volatile __near unsigned short *)0x3C8) +#define GAFLML3L (*(volatile __near unsigned char *)0x3C8) +#define RMDF02L (*(volatile __near unsigned char *)0x3C8) +#define GAFLML3H (*(volatile __near unsigned char *)0x3C9) +#define RMDF02H (*(volatile __near unsigned char *)0x3C9) +#define GAFLMH3 (*(volatile __near unsigned short *)0x3CA) +#define RMDF12 (*(volatile __near unsigned short *)0x3CA) +#define GAFLMH3L (*(volatile __near unsigned char *)0x3CA) +#define RMDF12L (*(volatile __near unsigned char *)0x3CA) +#define GAFLMH3H (*(volatile __near unsigned char *)0x3CB) +#define RMDF12H (*(volatile __near unsigned char *)0x3CB) +#define GAFLPL3 (*(volatile __near unsigned short *)0x3CC) +#define RMDF22 (*(volatile __near unsigned short *)0x3CC) +#define GAFLPL3L (*(volatile __near unsigned char *)0x3CC) +#define RMDF22L (*(volatile __near unsigned char *)0x3CC) +#define GAFLPL3H (*(volatile __near unsigned char *)0x3CD) +#define RMDF22H (*(volatile __near unsigned char *)0x3CD) +#define GAFLPH3 (*(volatile __near unsigned short *)0x3CE) +#define RMDF32 (*(volatile __near unsigned short *)0x3CE) +#define GAFLPH3L (*(volatile __near unsigned char *)0x3CE) +#define RMDF32L (*(volatile __near unsigned char *)0x3CE) +#define GAFLPH3H (*(volatile __near unsigned char *)0x3CF) +#define RMDF32H (*(volatile __near unsigned char *)0x3CF) +#define GAFLIDL4 (*(volatile __near unsigned short *)0x3D0) +#define RMIDL3 (*(volatile __near unsigned short *)0x3D0) +#define GAFLIDL4L (*(volatile __near unsigned char *)0x3D0) +#define RMIDL3L (*(volatile __near unsigned char *)0x3D0) +#define GAFLIDL4H (*(volatile __near unsigned char *)0x3D1) +#define RMIDL3H (*(volatile __near unsigned char *)0x3D1) +#define GAFLIDH4 (*(volatile __near unsigned short *)0x3D2) +#define RMIDH3 (*(volatile __near unsigned short *)0x3D2) +#define GAFLIDH4L (*(volatile __near unsigned char *)0x3D2) +#define RMIDH3L (*(volatile __near unsigned char *)0x3D2) +#define GAFLIDH4H (*(volatile __near unsigned char *)0x3D3) +#define RMIDH3H (*(volatile __near unsigned char *)0x3D3) +#define GAFLML4 (*(volatile __near unsigned short *)0x3D4) +#define RMTS3 (*(volatile __near unsigned short *)0x3D4) +#define GAFLML4L (*(volatile __near unsigned char *)0x3D4) +#define RMTS3L (*(volatile __near unsigned char *)0x3D4) +#define GAFLML4H (*(volatile __near unsigned char *)0x3D5) +#define RMTS3H (*(volatile __near unsigned char *)0x3D5) +#define GAFLMH4 (*(volatile __near unsigned short *)0x3D6) +#define RMPTR3 (*(volatile __near unsigned short *)0x3D6) +#define GAFLMH4L (*(volatile __near unsigned char *)0x3D6) +#define RMPTR3L (*(volatile __near unsigned char *)0x3D6) +#define GAFLMH4H (*(volatile __near unsigned char *)0x3D7) +#define RMPTR3H (*(volatile __near unsigned char *)0x3D7) +#define GAFLPL4 (*(volatile __near unsigned short *)0x3D8) +#define RMDF03 (*(volatile __near unsigned short *)0x3D8) +#define GAFLPL4L (*(volatile __near unsigned char *)0x3D8) +#define RMDF03L (*(volatile __near unsigned char *)0x3D8) +#define GAFLPL4H (*(volatile __near unsigned char *)0x3D9) +#define RMDF03H (*(volatile __near unsigned char *)0x3D9) +#define GAFLPH4 (*(volatile __near unsigned short *)0x3DA) +#define RMDF13 (*(volatile __near unsigned short *)0x3DA) +#define GAFLPH4L (*(volatile __near unsigned char *)0x3DA) +#define RMDF13L (*(volatile __near unsigned char *)0x3DA) +#define GAFLPH4H (*(volatile __near unsigned char *)0x3DB) +#define RMDF13H (*(volatile __near unsigned char *)0x3DB) +#define GAFLIDL5 (*(volatile __near unsigned short *)0x3DC) +#define RMDF23 (*(volatile __near unsigned short *)0x3DC) +#define GAFLIDL5L (*(volatile __near unsigned char *)0x3DC) +#define RMDF23L (*(volatile __near unsigned char *)0x3DC) +#define GAFLIDL5H (*(volatile __near unsigned char *)0x3DD) +#define RMDF23H (*(volatile __near unsigned char *)0x3DD) +#define GAFLIDH5 (*(volatile __near unsigned short *)0x3DE) +#define RMDF33 (*(volatile __near unsigned short *)0x3DE) +#define GAFLIDH5L (*(volatile __near unsigned char *)0x3DE) +#define RMDF33L (*(volatile __near unsigned char *)0x3DE) +#define GAFLIDH5H (*(volatile __near unsigned char *)0x3DF) +#define RMDF33H (*(volatile __near unsigned char *)0x3DF) +#define GAFLML5 (*(volatile __near unsigned short *)0x3E0) +#define RMIDL4 (*(volatile __near unsigned short *)0x3E0) +#define GAFLML5L (*(volatile __near unsigned char *)0x3E0) +#define RMIDL4L (*(volatile __near unsigned char *)0x3E0) +#define GAFLML5H (*(volatile __near unsigned char *)0x3E1) +#define RMIDL4H (*(volatile __near unsigned char *)0x3E1) +#define GAFLMH5 (*(volatile __near unsigned short *)0x3E2) +#define RMIDH4 (*(volatile __near unsigned short *)0x3E2) +#define GAFLMH5L (*(volatile __near unsigned char *)0x3E2) +#define RMIDH4L (*(volatile __near unsigned char *)0x3E2) +#define GAFLMH5H (*(volatile __near unsigned char *)0x3E3) +#define RMIDH4H (*(volatile __near unsigned char *)0x3E3) +#define GAFLPL5 (*(volatile __near unsigned short *)0x3E4) +#define RMTS4 (*(volatile __near unsigned short *)0x3E4) +#define GAFLPL5L (*(volatile __near unsigned char *)0x3E4) +#define RMTS4L (*(volatile __near unsigned char *)0x3E4) +#define GAFLPL5H (*(volatile __near unsigned char *)0x3E5) +#define RMTS4H (*(volatile __near unsigned char *)0x3E5) +#define GAFLPH5 (*(volatile __near unsigned short *)0x3E6) +#define RMPTR4 (*(volatile __near unsigned short *)0x3E6) +#define GAFLPH5L (*(volatile __near unsigned char *)0x3E6) +#define RMPTR4L (*(volatile __near unsigned char *)0x3E6) +#define GAFLPH5H (*(volatile __near unsigned char *)0x3E7) +#define RMPTR4H (*(volatile __near unsigned char *)0x3E7) +#define GAFLIDL6 (*(volatile __near unsigned short *)0x3E8) +#define RMDF04 (*(volatile __near unsigned short *)0x3E8) +#define GAFLIDL6L (*(volatile __near unsigned char *)0x3E8) +#define RMDF04L (*(volatile __near unsigned char *)0x3E8) +#define GAFLIDL6H (*(volatile __near unsigned char *)0x3E9) +#define RMDF04H (*(volatile __near unsigned char *)0x3E9) +#define GAFLIDH6 (*(volatile __near unsigned short *)0x3EA) +#define RMDF14 (*(volatile __near unsigned short *)0x3EA) +#define GAFLIDH6L (*(volatile __near unsigned char *)0x3EA) +#define RMDF14L (*(volatile __near unsigned char *)0x3EA) +#define GAFLIDH6H (*(volatile __near unsigned char *)0x3EB) +#define RMDF14H (*(volatile __near unsigned char *)0x3EB) +#define GAFLML6 (*(volatile __near unsigned short *)0x3EC) +#define RMDF24 (*(volatile __near unsigned short *)0x3EC) +#define GAFLML6L (*(volatile __near unsigned char *)0x3EC) +#define RMDF24L (*(volatile __near unsigned char *)0x3EC) +#define GAFLML6H (*(volatile __near unsigned char *)0x3ED) +#define RMDF24H (*(volatile __near unsigned char *)0x3ED) +#define GAFLMH6 (*(volatile __near unsigned short *)0x3EE) +#define RMDF34 (*(volatile __near unsigned short *)0x3EE) +#define GAFLMH6L (*(volatile __near unsigned char *)0x3EE) +#define RMDF34L (*(volatile __near unsigned char *)0x3EE) +#define GAFLMH6H (*(volatile __near unsigned char *)0x3EF) +#define RMDF34H (*(volatile __near unsigned char *)0x3EF) +#define GAFLPL6 (*(volatile __near unsigned short *)0x3F0) +#define RMIDL5 (*(volatile __near unsigned short *)0x3F0) +#define GAFLPL6L (*(volatile __near unsigned char *)0x3F0) +#define RMIDL5L (*(volatile __near unsigned char *)0x3F0) +#define GAFLPL6H (*(volatile __near unsigned char *)0x3F1) +#define RMIDL5H (*(volatile __near unsigned char *)0x3F1) +#define GAFLPH6 (*(volatile __near unsigned short *)0x3F2) +#define RMIDH5 (*(volatile __near unsigned short *)0x3F2) +#define GAFLPH6L (*(volatile __near unsigned char *)0x3F2) +#define RMIDH5L (*(volatile __near unsigned char *)0x3F2) +#define GAFLPH6H (*(volatile __near unsigned char *)0x3F3) +#define RMIDH5H (*(volatile __near unsigned char *)0x3F3) +#define GAFLIDL7 (*(volatile __near unsigned short *)0x3F4) +#define RMTS5 (*(volatile __near unsigned short *)0x3F4) +#define GAFLIDL7L (*(volatile __near unsigned char *)0x3F4) +#define RMTS5L (*(volatile __near unsigned char *)0x3F4) +#define GAFLIDL7H (*(volatile __near unsigned char *)0x3F5) +#define RMTS5H (*(volatile __near unsigned char *)0x3F5) +#define GAFLIDH7 (*(volatile __near unsigned short *)0x3F6) +#define RMPTR5 (*(volatile __near unsigned short *)0x3F6) +#define GAFLIDH7L (*(volatile __near unsigned char *)0x3F6) +#define RMPTR5L (*(volatile __near unsigned char *)0x3F6) +#define GAFLIDH7H (*(volatile __near unsigned char *)0x3F7) +#define RMPTR5H (*(volatile __near unsigned char *)0x3F7) +#define GAFLML7 (*(volatile __near unsigned short *)0x3F8) +#define RMDF05 (*(volatile __near unsigned short *)0x3F8) +#define GAFLML7L (*(volatile __near unsigned char *)0x3F8) +#define RMDF05L (*(volatile __near unsigned char *)0x3F8) +#define GAFLML7H (*(volatile __near unsigned char *)0x3F9) +#define RMDF05H (*(volatile __near unsigned char *)0x3F9) +#define GAFLMH7 (*(volatile __near unsigned short *)0x3FA) +#define RMDF15 (*(volatile __near unsigned short *)0x3FA) +#define GAFLMH7L (*(volatile __near unsigned char *)0x3FA) +#define RMDF15L (*(volatile __near unsigned char *)0x3FA) +#define GAFLMH7H (*(volatile __near unsigned char *)0x3FB) +#define RMDF15H (*(volatile __near unsigned char *)0x3FB) +#define GAFLPL7 (*(volatile __near unsigned short *)0x3FC) +#define RMDF25 (*(volatile __near unsigned short *)0x3FC) +#define GAFLPL7L (*(volatile __near unsigned char *)0x3FC) +#define RMDF25L (*(volatile __near unsigned char *)0x3FC) +#define GAFLPL7H (*(volatile __near unsigned char *)0x3FD) +#define RMDF25H (*(volatile __near unsigned char *)0x3FD) +#define GAFLPH7 (*(volatile __near unsigned short *)0x3FE) +#define RMDF35 (*(volatile __near unsigned short *)0x3FE) +#define GAFLPH7L (*(volatile __near unsigned char *)0x3FE) +#define RMDF35L (*(volatile __near unsigned char *)0x3FE) +#define GAFLPH7H (*(volatile __near unsigned char *)0x3FF) +#define RMDF35H (*(volatile __near unsigned char *)0x3FF) +#define GAFLIDL8 (*(volatile __near unsigned short *)0x400) +#define RMIDL6 (*(volatile __near unsigned short *)0x400) +#define GAFLIDL8L (*(volatile __near unsigned char *)0x400) +#define RMIDL6L (*(volatile __near unsigned char *)0x400) +#define GAFLIDL8H (*(volatile __near unsigned char *)0x401) +#define RMIDL6H (*(volatile __near unsigned char *)0x401) +#define GAFLIDH8 (*(volatile __near unsigned short *)0x402) +#define RMIDH6 (*(volatile __near unsigned short *)0x402) +#define GAFLIDH8L (*(volatile __near unsigned char *)0x402) +#define RMIDH6L (*(volatile __near unsigned char *)0x402) +#define GAFLIDH8H (*(volatile __near unsigned char *)0x403) +#define RMIDH6H (*(volatile __near unsigned char *)0x403) +#define GAFLML8 (*(volatile __near unsigned short *)0x404) +#define RMTS6 (*(volatile __near unsigned short *)0x404) +#define GAFLML8L (*(volatile __near unsigned char *)0x404) +#define RMTS6L (*(volatile __near unsigned char *)0x404) +#define GAFLML8H (*(volatile __near unsigned char *)0x405) +#define RMTS6H (*(volatile __near unsigned char *)0x405) +#define GAFLMH8 (*(volatile __near unsigned short *)0x406) +#define RMPTR6 (*(volatile __near unsigned short *)0x406) +#define GAFLMH8L (*(volatile __near unsigned char *)0x406) +#define RMPTR6L (*(volatile __near unsigned char *)0x406) +#define GAFLMH8H (*(volatile __near unsigned char *)0x407) +#define RMPTR6H (*(volatile __near unsigned char *)0x407) +#define GAFLPL8 (*(volatile __near unsigned short *)0x408) +#define RMDF06 (*(volatile __near unsigned short *)0x408) +#define GAFLPL8L (*(volatile __near unsigned char *)0x408) +#define RMDF06L (*(volatile __near unsigned char *)0x408) +#define GAFLPL8H (*(volatile __near unsigned char *)0x409) +#define RMDF06H (*(volatile __near unsigned char *)0x409) +#define GAFLPH8 (*(volatile __near unsigned short *)0x40A) +#define RMDF16 (*(volatile __near unsigned short *)0x40A) +#define GAFLPH8L (*(volatile __near unsigned char *)0x40A) +#define RMDF16L (*(volatile __near unsigned char *)0x40A) +#define GAFLPH8H (*(volatile __near unsigned char *)0x40B) +#define RMDF16H (*(volatile __near unsigned char *)0x40B) +#define GAFLIDL9 (*(volatile __near unsigned short *)0x40C) +#define RMDF26 (*(volatile __near unsigned short *)0x40C) +#define GAFLIDL9L (*(volatile __near unsigned char *)0x40C) +#define RMDF26L (*(volatile __near unsigned char *)0x40C) +#define GAFLIDL9H (*(volatile __near unsigned char *)0x40D) +#define RMDF26H (*(volatile __near unsigned char *)0x40D) +#define GAFLIDH9 (*(volatile __near unsigned short *)0x40E) +#define RMDF36 (*(volatile __near unsigned short *)0x40E) +#define GAFLIDH9L (*(volatile __near unsigned char *)0x40E) +#define RMDF36L (*(volatile __near unsigned char *)0x40E) +#define GAFLIDH9H (*(volatile __near unsigned char *)0x40F) +#define RMDF36H (*(volatile __near unsigned char *)0x40F) +#define GAFLML9 (*(volatile __near unsigned short *)0x410) +#define RMIDL7 (*(volatile __near unsigned short *)0x410) +#define GAFLML9L (*(volatile __near unsigned char *)0x410) +#define RMIDL7L (*(volatile __near unsigned char *)0x410) +#define GAFLML9H (*(volatile __near unsigned char *)0x411) +#define RMIDL7H (*(volatile __near unsigned char *)0x411) +#define GAFLMH9 (*(volatile __near unsigned short *)0x412) +#define RMIDH7 (*(volatile __near unsigned short *)0x412) +#define GAFLMH9L (*(volatile __near unsigned char *)0x412) +#define RMIDH7L (*(volatile __near unsigned char *)0x412) +#define GAFLMH9H (*(volatile __near unsigned char *)0x413) +#define RMIDH7H (*(volatile __near unsigned char *)0x413) +#define GAFLPL9 (*(volatile __near unsigned short *)0x414) +#define RMTS7 (*(volatile __near unsigned short *)0x414) +#define GAFLPL9L (*(volatile __near unsigned char *)0x414) +#define RMTS7L (*(volatile __near unsigned char *)0x414) +#define GAFLPL9H (*(volatile __near unsigned char *)0x415) +#define RMTS7H (*(volatile __near unsigned char *)0x415) +#define GAFLPH9 (*(volatile __near unsigned short *)0x416) +#define RMPTR7 (*(volatile __near unsigned short *)0x416) +#define GAFLPH9L (*(volatile __near unsigned char *)0x416) +#define RMPTR7L (*(volatile __near unsigned char *)0x416) +#define GAFLPH9H (*(volatile __near unsigned char *)0x417) +#define RMPTR7H (*(volatile __near unsigned char *)0x417) +#define GAFLIDL10 (*(volatile __near unsigned short *)0x418) +#define RMDF07 (*(volatile __near unsigned short *)0x418) +#define GAFLIDL10L (*(volatile __near unsigned char *)0x418) +#define RMDF07L (*(volatile __near unsigned char *)0x418) +#define GAFLIDL10H (*(volatile __near unsigned char *)0x419) +#define RMDF07H (*(volatile __near unsigned char *)0x419) +#define GAFLIDH10 (*(volatile __near unsigned short *)0x41A) +#define RMDF17 (*(volatile __near unsigned short *)0x41A) +#define GAFLIDH10L (*(volatile __near unsigned char *)0x41A) +#define RMDF17L (*(volatile __near unsigned char *)0x41A) +#define GAFLIDH10H (*(volatile __near unsigned char *)0x41B) +#define RMDF17H (*(volatile __near unsigned char *)0x41B) +#define GAFLML10 (*(volatile __near unsigned short *)0x41C) +#define RMDF27 (*(volatile __near unsigned short *)0x41C) +#define GAFLML10L (*(volatile __near unsigned char *)0x41C) +#define RMDF27L (*(volatile __near unsigned char *)0x41C) +#define GAFLML10H (*(volatile __near unsigned char *)0x41D) +#define RMDF27H (*(volatile __near unsigned char *)0x41D) +#define GAFLMH10 (*(volatile __near unsigned short *)0x41E) +#define RMDF37 (*(volatile __near unsigned short *)0x41E) +#define GAFLMH10L (*(volatile __near unsigned char *)0x41E) +#define RMDF37L (*(volatile __near unsigned char *)0x41E) +#define GAFLMH10H (*(volatile __near unsigned char *)0x41F) +#define RMDF37H (*(volatile __near unsigned char *)0x41F) +#define GAFLPL10 (*(volatile __near unsigned short *)0x420) +#define RMIDL8 (*(volatile __near unsigned short *)0x420) +#define GAFLPL10L (*(volatile __near unsigned char *)0x420) +#define RMIDL8L (*(volatile __near unsigned char *)0x420) +#define GAFLPL10H (*(volatile __near unsigned char *)0x421) +#define RMIDL8H (*(volatile __near unsigned char *)0x421) +#define GAFLPH10 (*(volatile __near unsigned short *)0x422) +#define RMIDH8 (*(volatile __near unsigned short *)0x422) +#define GAFLPH10L (*(volatile __near unsigned char *)0x422) +#define RMIDH8L (*(volatile __near unsigned char *)0x422) +#define GAFLPH10H (*(volatile __near unsigned char *)0x423) +#define RMIDH8H (*(volatile __near unsigned char *)0x423) +#define GAFLIDL11 (*(volatile __near unsigned short *)0x424) +#define RMTS8 (*(volatile __near unsigned short *)0x424) +#define GAFLIDL11L (*(volatile __near unsigned char *)0x424) +#define RMTS8L (*(volatile __near unsigned char *)0x424) +#define GAFLIDL11H (*(volatile __near unsigned char *)0x425) +#define RMTS8H (*(volatile __near unsigned char *)0x425) +#define GAFLIDH11 (*(volatile __near unsigned short *)0x426) +#define RMPTR8 (*(volatile __near unsigned short *)0x426) +#define GAFLIDH11L (*(volatile __near unsigned char *)0x426) +#define RMPTR8L (*(volatile __near unsigned char *)0x426) +#define GAFLIDH11H (*(volatile __near unsigned char *)0x427) +#define RMPTR8H (*(volatile __near unsigned char *)0x427) +#define GAFLML11 (*(volatile __near unsigned short *)0x428) +#define RMDF08 (*(volatile __near unsigned short *)0x428) +#define GAFLML11L (*(volatile __near unsigned char *)0x428) +#define RMDF08L (*(volatile __near unsigned char *)0x428) +#define GAFLML11H (*(volatile __near unsigned char *)0x429) +#define RMDF08H (*(volatile __near unsigned char *)0x429) +#define GAFLMH11 (*(volatile __near unsigned short *)0x42A) +#define RMDF18 (*(volatile __near unsigned short *)0x42A) +#define GAFLMH11L (*(volatile __near unsigned char *)0x42A) +#define RMDF18L (*(volatile __near unsigned char *)0x42A) +#define GAFLMH11H (*(volatile __near unsigned char *)0x42B) +#define RMDF18H (*(volatile __near unsigned char *)0x42B) +#define GAFLPL11 (*(volatile __near unsigned short *)0x42C) +#define RMDF28 (*(volatile __near unsigned short *)0x42C) +#define GAFLPL11L (*(volatile __near unsigned char *)0x42C) +#define RMDF28L (*(volatile __near unsigned char *)0x42C) +#define GAFLPL11H (*(volatile __near unsigned char *)0x42D) +#define RMDF28H (*(volatile __near unsigned char *)0x42D) +#define GAFLPH11 (*(volatile __near unsigned short *)0x42E) +#define RMDF38 (*(volatile __near unsigned short *)0x42E) +#define GAFLPH11L (*(volatile __near unsigned char *)0x42E) +#define RMDF38L (*(volatile __near unsigned char *)0x42E) +#define GAFLPH11H (*(volatile __near unsigned char *)0x42F) +#define RMDF38H (*(volatile __near unsigned char *)0x42F) +#define GAFLIDL12 (*(volatile __near unsigned short *)0x430) +#define RMIDL9 (*(volatile __near unsigned short *)0x430) +#define GAFLIDL12L (*(volatile __near unsigned char *)0x430) +#define RMIDL9L (*(volatile __near unsigned char *)0x430) +#define GAFLIDL12H (*(volatile __near unsigned char *)0x431) +#define RMIDL9H (*(volatile __near unsigned char *)0x431) +#define GAFLIDH12 (*(volatile __near unsigned short *)0x432) +#define RMIDH9 (*(volatile __near unsigned short *)0x432) +#define GAFLIDH12L (*(volatile __near unsigned char *)0x432) +#define RMIDH9L (*(volatile __near unsigned char *)0x432) +#define GAFLIDH12H (*(volatile __near unsigned char *)0x433) +#define RMIDH9H (*(volatile __near unsigned char *)0x433) +#define GAFLML12 (*(volatile __near unsigned short *)0x434) +#define RMTS9 (*(volatile __near unsigned short *)0x434) +#define GAFLML12L (*(volatile __near unsigned char *)0x434) +#define RMTS9L (*(volatile __near unsigned char *)0x434) +#define GAFLML12H (*(volatile __near unsigned char *)0x435) +#define RMTS9H (*(volatile __near unsigned char *)0x435) +#define GAFLMH12 (*(volatile __near unsigned short *)0x436) +#define RMPTR9 (*(volatile __near unsigned short *)0x436) +#define GAFLMH12L (*(volatile __near unsigned char *)0x436) +#define RMPTR9L (*(volatile __near unsigned char *)0x436) +#define GAFLMH12H (*(volatile __near unsigned char *)0x437) +#define RMPTR9H (*(volatile __near unsigned char *)0x437) +#define GAFLPL12 (*(volatile __near unsigned short *)0x438) +#define RMDF09 (*(volatile __near unsigned short *)0x438) +#define GAFLPL12L (*(volatile __near unsigned char *)0x438) +#define RMDF09L (*(volatile __near unsigned char *)0x438) +#define GAFLPL12H (*(volatile __near unsigned char *)0x439) +#define RMDF09H (*(volatile __near unsigned char *)0x439) +#define GAFLPH12 (*(volatile __near unsigned short *)0x43A) +#define RMDF19 (*(volatile __near unsigned short *)0x43A) +#define GAFLPH12L (*(volatile __near unsigned char *)0x43A) +#define RMDF19L (*(volatile __near unsigned char *)0x43A) +#define GAFLPH12H (*(volatile __near unsigned char *)0x43B) +#define RMDF19H (*(volatile __near unsigned char *)0x43B) +#define GAFLIDL13 (*(volatile __near unsigned short *)0x43C) +#define RMDF29 (*(volatile __near unsigned short *)0x43C) +#define GAFLIDL13L (*(volatile __near unsigned char *)0x43C) +#define RMDF29L (*(volatile __near unsigned char *)0x43C) +#define GAFLIDL13H (*(volatile __near unsigned char *)0x43D) +#define RMDF29H (*(volatile __near unsigned char *)0x43D) +#define GAFLIDH13 (*(volatile __near unsigned short *)0x43E) +#define RMDF39 (*(volatile __near unsigned short *)0x43E) +#define GAFLIDH13L (*(volatile __near unsigned char *)0x43E) +#define RMDF39L (*(volatile __near unsigned char *)0x43E) +#define GAFLIDH13H (*(volatile __near unsigned char *)0x43F) +#define RMDF39H (*(volatile __near unsigned char *)0x43F) +#define GAFLML13 (*(volatile __near unsigned short *)0x440) +#define RMIDL10 (*(volatile __near unsigned short *)0x440) +#define GAFLML13L (*(volatile __near unsigned char *)0x440) +#define RMIDL10L (*(volatile __near unsigned char *)0x440) +#define GAFLML13H (*(volatile __near unsigned char *)0x441) +#define RMIDL10H (*(volatile __near unsigned char *)0x441) +#define GAFLMH13 (*(volatile __near unsigned short *)0x442) +#define RMIDH10 (*(volatile __near unsigned short *)0x442) +#define GAFLMH13L (*(volatile __near unsigned char *)0x442) +#define RMIDH10L (*(volatile __near unsigned char *)0x442) +#define GAFLMH13H (*(volatile __near unsigned char *)0x443) +#define RMIDH10H (*(volatile __near unsigned char *)0x443) +#define GAFLPL13 (*(volatile __near unsigned short *)0x444) +#define RMTS10 (*(volatile __near unsigned short *)0x444) +#define GAFLPL13L (*(volatile __near unsigned char *)0x444) +#define RMTS10L (*(volatile __near unsigned char *)0x444) +#define GAFLPL13H (*(volatile __near unsigned char *)0x445) +#define RMTS10H (*(volatile __near unsigned char *)0x445) +#define GAFLPH13 (*(volatile __near unsigned short *)0x446) +#define RMPTR10 (*(volatile __near unsigned short *)0x446) +#define GAFLPH13L (*(volatile __near unsigned char *)0x446) +#define RMPTR10L (*(volatile __near unsigned char *)0x446) +#define GAFLPH13H (*(volatile __near unsigned char *)0x447) +#define RMPTR10H (*(volatile __near unsigned char *)0x447) +#define GAFLIDL14 (*(volatile __near unsigned short *)0x448) +#define RMDF010 (*(volatile __near unsigned short *)0x448) +#define GAFLIDL14L (*(volatile __near unsigned char *)0x448) +#define RMDF010L (*(volatile __near unsigned char *)0x448) +#define GAFLIDL14H (*(volatile __near unsigned char *)0x449) +#define RMDF010H (*(volatile __near unsigned char *)0x449) +#define GAFLIDH14 (*(volatile __near unsigned short *)0x44A) +#define RMDF110 (*(volatile __near unsigned short *)0x44A) +#define GAFLIDH14L (*(volatile __near unsigned char *)0x44A) +#define RMDF110L (*(volatile __near unsigned char *)0x44A) +#define GAFLIDH14H (*(volatile __near unsigned char *)0x44B) +#define RMDF110H (*(volatile __near unsigned char *)0x44B) +#define GAFLML14 (*(volatile __near unsigned short *)0x44C) +#define RMDF210 (*(volatile __near unsigned short *)0x44C) +#define GAFLML14L (*(volatile __near unsigned char *)0x44C) +#define RMDF210L (*(volatile __near unsigned char *)0x44C) +#define GAFLML14H (*(volatile __near unsigned char *)0x44D) +#define RMDF210H (*(volatile __near unsigned char *)0x44D) +#define GAFLMH14 (*(volatile __near unsigned short *)0x44E) +#define RMDF310 (*(volatile __near unsigned short *)0x44E) +#define GAFLMH14L (*(volatile __near unsigned char *)0x44E) +#define RMDF310L (*(volatile __near unsigned char *)0x44E) +#define GAFLMH14H (*(volatile __near unsigned char *)0x44F) +#define RMDF310H (*(volatile __near unsigned char *)0x44F) +#define GAFLPL14 (*(volatile __near unsigned short *)0x450) +#define RMIDL11 (*(volatile __near unsigned short *)0x450) +#define GAFLPL14L (*(volatile __near unsigned char *)0x450) +#define RMIDL11L (*(volatile __near unsigned char *)0x450) +#define GAFLPL14H (*(volatile __near unsigned char *)0x451) +#define RMIDL11H (*(volatile __near unsigned char *)0x451) +#define GAFLPH14 (*(volatile __near unsigned short *)0x452) +#define RMIDH11 (*(volatile __near unsigned short *)0x452) +#define GAFLPH14L (*(volatile __near unsigned char *)0x452) +#define RMIDH11L (*(volatile __near unsigned char *)0x452) +#define GAFLPH14H (*(volatile __near unsigned char *)0x453) +#define RMIDH11H (*(volatile __near unsigned char *)0x453) +#define GAFLIDL15 (*(volatile __near unsigned short *)0x454) +#define RMTS11 (*(volatile __near unsigned short *)0x454) +#define GAFLIDL15L (*(volatile __near unsigned char *)0x454) +#define RMTS11L (*(volatile __near unsigned char *)0x454) +#define GAFLIDL15H (*(volatile __near unsigned char *)0x455) +#define RMTS11H (*(volatile __near unsigned char *)0x455) +#define GAFLIDH15 (*(volatile __near unsigned short *)0x456) +#define RMPTR11 (*(volatile __near unsigned short *)0x456) +#define GAFLIDH15L (*(volatile __near unsigned char *)0x456) +#define RMPTR11L (*(volatile __near unsigned char *)0x456) +#define GAFLIDH15H (*(volatile __near unsigned char *)0x457) +#define RMPTR11H (*(volatile __near unsigned char *)0x457) +#define GAFLML15 (*(volatile __near unsigned short *)0x458) +#define RMDF011 (*(volatile __near unsigned short *)0x458) +#define GAFLML15L (*(volatile __near unsigned char *)0x458) +#define RMDF011L (*(volatile __near unsigned char *)0x458) +#define GAFLML15H (*(volatile __near unsigned char *)0x459) +#define RMDF011H (*(volatile __near unsigned char *)0x459) +#define GAFLMH15 (*(volatile __near unsigned short *)0x45A) +#define RMDF111 (*(volatile __near unsigned short *)0x45A) +#define GAFLMH15L (*(volatile __near unsigned char *)0x45A) +#define RMDF111L (*(volatile __near unsigned char *)0x45A) +#define GAFLMH15H (*(volatile __near unsigned char *)0x45B) +#define RMDF111H (*(volatile __near unsigned char *)0x45B) +#define GAFLPL15 (*(volatile __near unsigned short *)0x45C) +#define RMDF211 (*(volatile __near unsigned short *)0x45C) +#define GAFLPL15L (*(volatile __near unsigned char *)0x45C) +#define RMDF211L (*(volatile __near unsigned char *)0x45C) +#define GAFLPL15H (*(volatile __near unsigned char *)0x45D) +#define RMDF211H (*(volatile __near unsigned char *)0x45D) +#define GAFLPH15 (*(volatile __near unsigned short *)0x45E) +#define RMDF311 (*(volatile __near unsigned short *)0x45E) +#define GAFLPH15L (*(volatile __near unsigned char *)0x45E) +#define RMDF311L (*(volatile __near unsigned char *)0x45E) +#define GAFLPH15H (*(volatile __near unsigned char *)0x45F) +#define RMDF311H (*(volatile __near unsigned char *)0x45F) +#define RMIDL12 (*(volatile __near unsigned short *)0x460) +#define RMIDL12L (*(volatile __near unsigned char *)0x460) +#define RMIDL12H (*(volatile __near unsigned char *)0x461) +#define RMIDH12 (*(volatile __near unsigned short *)0x462) +#define RMIDH12L (*(volatile __near unsigned char *)0x462) +#define RMIDH12H (*(volatile __near unsigned char *)0x463) +#define RMTS12 (*(volatile __near unsigned short *)0x464) +#define RMTS12L (*(volatile __near unsigned char *)0x464) +#define RMTS12H (*(volatile __near unsigned char *)0x465) +#define RMPTR12 (*(volatile __near unsigned short *)0x466) +#define RMPTR12L (*(volatile __near unsigned char *)0x466) +#define RMPTR12H (*(volatile __near unsigned char *)0x467) +#define RMDF012 (*(volatile __near unsigned short *)0x468) +#define RMDF012L (*(volatile __near unsigned char *)0x468) +#define RMDF012H (*(volatile __near unsigned char *)0x469) +#define RMDF112 (*(volatile __near unsigned short *)0x46A) +#define RMDF112L (*(volatile __near unsigned char *)0x46A) +#define RMDF112H (*(volatile __near unsigned char *)0x46B) +#define RMDF212 (*(volatile __near unsigned short *)0x46C) +#define RMDF212L (*(volatile __near unsigned char *)0x46C) +#define RMDF212H (*(volatile __near unsigned char *)0x46D) +#define RMDF312 (*(volatile __near unsigned short *)0x46E) +#define RMDF312L (*(volatile __near unsigned char *)0x46E) +#define RMDF312H (*(volatile __near unsigned char *)0x46F) +#define RMIDL13 (*(volatile __near unsigned short *)0x470) +#define RMIDL13L (*(volatile __near unsigned char *)0x470) +#define RMIDL13H (*(volatile __near unsigned char *)0x471) +#define RMIDH13 (*(volatile __near unsigned short *)0x472) +#define RMIDH13L (*(volatile __near unsigned char *)0x472) +#define RMIDH13H (*(volatile __near unsigned char *)0x473) +#define RMTS13 (*(volatile __near unsigned short *)0x474) +#define RMTS13L (*(volatile __near unsigned char *)0x474) +#define RMTS13H (*(volatile __near unsigned char *)0x475) +#define RMPTR13 (*(volatile __near unsigned short *)0x476) +#define RMPTR13L (*(volatile __near unsigned char *)0x476) +#define RMPTR13H (*(volatile __near unsigned char *)0x477) +#define RMDF013 (*(volatile __near unsigned short *)0x478) +#define RMDF013L (*(volatile __near unsigned char *)0x478) +#define RMDF013H (*(volatile __near unsigned char *)0x479) +#define RMDF113 (*(volatile __near unsigned short *)0x47A) +#define RMDF113L (*(volatile __near unsigned char *)0x47A) +#define RMDF113H (*(volatile __near unsigned char *)0x47B) +#define RMDF213 (*(volatile __near unsigned short *)0x47C) +#define RMDF213L (*(volatile __near unsigned char *)0x47C) +#define RMDF213H (*(volatile __near unsigned char *)0x47D) +#define RMDF313 (*(volatile __near unsigned short *)0x47E) +#define RMDF313L (*(volatile __near unsigned char *)0x47E) +#define RMDF313H (*(volatile __near unsigned char *)0x47F) +#define RMIDL14 (*(volatile __near unsigned short *)0x480) +#define RMIDL14L (*(volatile __near unsigned char *)0x480) +#define RMIDL14H (*(volatile __near unsigned char *)0x481) +#define RMIDH14 (*(volatile __near unsigned short *)0x482) +#define RMIDH14L (*(volatile __near unsigned char *)0x482) +#define RMIDH14H (*(volatile __near unsigned char *)0x483) +#define RMTS14 (*(volatile __near unsigned short *)0x484) +#define RMTS14L (*(volatile __near unsigned char *)0x484) +#define RMTS14H (*(volatile __near unsigned char *)0x485) +#define RMPTR14 (*(volatile __near unsigned short *)0x486) +#define RMPTR14L (*(volatile __near unsigned char *)0x486) +#define RMPTR14H (*(volatile __near unsigned char *)0x487) +#define RMDF014 (*(volatile __near unsigned short *)0x488) +#define RMDF014L (*(volatile __near unsigned char *)0x488) +#define RMDF014H (*(volatile __near unsigned char *)0x489) +#define RMDF114 (*(volatile __near unsigned short *)0x48A) +#define RMDF114L (*(volatile __near unsigned char *)0x48A) +#define RMDF114H (*(volatile __near unsigned char *)0x48B) +#define RMDF214 (*(volatile __near unsigned short *)0x48C) +#define RMDF214L (*(volatile __near unsigned char *)0x48C) +#define RMDF214H (*(volatile __near unsigned char *)0x48D) +#define RMDF314 (*(volatile __near unsigned short *)0x48E) +#define RMDF314L (*(volatile __near unsigned char *)0x48E) +#define RMDF314H (*(volatile __near unsigned char *)0x48F) +#define RMIDL15 (*(volatile __near unsigned short *)0x490) +#define RMIDL15L (*(volatile __near unsigned char *)0x490) +#define RMIDL15H (*(volatile __near unsigned char *)0x491) +#define RMIDH15 (*(volatile __near unsigned short *)0x492) +#define RMIDH15L (*(volatile __near unsigned char *)0x492) +#define RMIDH15H (*(volatile __near unsigned char *)0x493) +#define RMTS15 (*(volatile __near unsigned short *)0x494) +#define RMTS15L (*(volatile __near unsigned char *)0x494) +#define RMTS15H (*(volatile __near unsigned char *)0x495) +#define RMPTR15 (*(volatile __near unsigned short *)0x496) +#define RMPTR15L (*(volatile __near unsigned char *)0x496) +#define RMPTR15H (*(volatile __near unsigned char *)0x497) +#define RMDF015 (*(volatile __near unsigned short *)0x498) +#define RMDF015L (*(volatile __near unsigned char *)0x498) +#define RMDF015H (*(volatile __near unsigned char *)0x499) +#define RMDF115 (*(volatile __near unsigned short *)0x49A) +#define RMDF115L (*(volatile __near unsigned char *)0x49A) +#define RMDF115H (*(volatile __near unsigned char *)0x49B) +#define RMDF215 (*(volatile __near unsigned short *)0x49C) +#define RMDF215L (*(volatile __near unsigned char *)0x49C) +#define RMDF215H (*(volatile __near unsigned char *)0x49D) +#define RMDF315 (*(volatile __near unsigned short *)0x49E) +#define RMDF315L (*(volatile __near unsigned char *)0x49E) +#define RMDF315H (*(volatile __near unsigned char *)0x49F) +#define RPGACC0 (*(volatile __near unsigned short *)0x580) +#define RPGACC0L (*(volatile __near unsigned char *)0x580) +#define RPGACC0H (*(volatile __near unsigned char *)0x581) +#define RPGACC1 (*(volatile __near unsigned short *)0x582) +#define RPGACC1L (*(volatile __near unsigned char *)0x582) +#define RPGACC1H (*(volatile __near unsigned char *)0x583) +#define RPGACC2 (*(volatile __near unsigned short *)0x584) +#define RPGACC2L (*(volatile __near unsigned char *)0x584) +#define RPGACC2H (*(volatile __near unsigned char *)0x585) +#define RPGACC3 (*(volatile __near unsigned short *)0x586) +#define RPGACC3L (*(volatile __near unsigned char *)0x586) +#define RPGACC3H (*(volatile __near unsigned char *)0x587) +#define RPGACC4 (*(volatile __near unsigned short *)0x588) +#define RPGACC4L (*(volatile __near unsigned char *)0x588) +#define RPGACC4H (*(volatile __near unsigned char *)0x589) +#define RPGACC5 (*(volatile __near unsigned short *)0x58A) +#define RPGACC5L (*(volatile __near unsigned char *)0x58A) +#define RPGACC5H (*(volatile __near unsigned char *)0x58B) +#define RPGACC6 (*(volatile __near unsigned short *)0x58C) +#define RPGACC6L (*(volatile __near unsigned char *)0x58C) +#define RPGACC6H (*(volatile __near unsigned char *)0x58D) +#define RPGACC7 (*(volatile __near unsigned short *)0x58E) +#define RPGACC7L (*(volatile __near unsigned char *)0x58E) +#define RPGACC7H (*(volatile __near unsigned char *)0x58F) +#define RPGACC8 (*(volatile __near unsigned short *)0x590) +#define RPGACC8L (*(volatile __near unsigned char *)0x590) +#define RPGACC8H (*(volatile __near unsigned char *)0x591) +#define RPGACC9 (*(volatile __near unsigned short *)0x592) +#define RPGACC9L (*(volatile __near unsigned char *)0x592) +#define RPGACC9H (*(volatile __near unsigned char *)0x593) +#define RPGACC10 (*(volatile __near unsigned short *)0x594) +#define RPGACC10L (*(volatile __near unsigned char *)0x594) +#define RPGACC10H (*(volatile __near unsigned char *)0x595) +#define RPGACC11 (*(volatile __near unsigned short *)0x596) +#define RPGACC11L (*(volatile __near unsigned char *)0x596) +#define RPGACC11H (*(volatile __near unsigned char *)0x597) +#define RPGACC12 (*(volatile __near unsigned short *)0x598) +#define RPGACC12L (*(volatile __near unsigned char *)0x598) +#define RPGACC12H (*(volatile __near unsigned char *)0x599) +#define RPGACC13 (*(volatile __near unsigned short *)0x59A) +#define RPGACC13L (*(volatile __near unsigned char *)0x59A) +#define RPGACC13H (*(volatile __near unsigned char *)0x59B) +#define RPGACC14 (*(volatile __near unsigned short *)0x59C) +#define RPGACC14L (*(volatile __near unsigned char *)0x59C) +#define RPGACC14H (*(volatile __near unsigned char *)0x59D) +#define RPGACC15 (*(volatile __near unsigned short *)0x59E) +#define RPGACC15L (*(volatile __near unsigned char *)0x59E) +#define RPGACC15H (*(volatile __near unsigned char *)0x59F) +#define RFIDL0 (*(volatile __near unsigned short *)0x5A0) +#define RPGACC16 (*(volatile __near unsigned short *)0x5A0) +#define RFIDL0L (*(volatile __near unsigned char *)0x5A0) +#define RPGACC16L (*(volatile __near unsigned char *)0x5A0) +#define RFIDL0H (*(volatile __near unsigned char *)0x5A1) +#define RPGACC16H (*(volatile __near unsigned char *)0x5A1) +#define RFIDH0 (*(volatile __near unsigned short *)0x5A2) +#define RPGACC17 (*(volatile __near unsigned short *)0x5A2) +#define RFIDH0L (*(volatile __near unsigned char *)0x5A2) +#define RPGACC17L (*(volatile __near unsigned char *)0x5A2) +#define RFIDH0H (*(volatile __near unsigned char *)0x5A3) +#define RPGACC17H (*(volatile __near unsigned char *)0x5A3) +#define RFTS0 (*(volatile __near unsigned short *)0x5A4) +#define RPGACC18 (*(volatile __near unsigned short *)0x5A4) +#define RFTS0L (*(volatile __near unsigned char *)0x5A4) +#define RPGACC18L (*(volatile __near unsigned char *)0x5A4) +#define RFTS0H (*(volatile __near unsigned char *)0x5A5) +#define RPGACC18H (*(volatile __near unsigned char *)0x5A5) +#define RFPTR0 (*(volatile __near unsigned short *)0x5A6) +#define RPGACC19 (*(volatile __near unsigned short *)0x5A6) +#define RFPTR0L (*(volatile __near unsigned char *)0x5A6) +#define RPGACC19L (*(volatile __near unsigned char *)0x5A6) +#define RFPTR0H (*(volatile __near unsigned char *)0x5A7) +#define RPGACC19H (*(volatile __near unsigned char *)0x5A7) +#define RFDF00 (*(volatile __near unsigned short *)0x5A8) +#define RPGACC20 (*(volatile __near unsigned short *)0x5A8) +#define RFDF00L (*(volatile __near unsigned char *)0x5A8) +#define RPGACC20L (*(volatile __near unsigned char *)0x5A8) +#define RFDF00H (*(volatile __near unsigned char *)0x5A9) +#define RPGACC20H (*(volatile __near unsigned char *)0x5A9) +#define RFDF10 (*(volatile __near unsigned short *)0x5AA) +#define RPGACC21 (*(volatile __near unsigned short *)0x5AA) +#define RFDF10L (*(volatile __near unsigned char *)0x5AA) +#define RPGACC21L (*(volatile __near unsigned char *)0x5AA) +#define RFDF10H (*(volatile __near unsigned char *)0x5AB) +#define RPGACC21H (*(volatile __near unsigned char *)0x5AB) +#define RFDF20 (*(volatile __near unsigned short *)0x5AC) +#define RPGACC22 (*(volatile __near unsigned short *)0x5AC) +#define RFDF20L (*(volatile __near unsigned char *)0x5AC) +#define RPGACC22L (*(volatile __near unsigned char *)0x5AC) +#define RFDF20H (*(volatile __near unsigned char *)0x5AD) +#define RPGACC22H (*(volatile __near unsigned char *)0x5AD) +#define RFDF30 (*(volatile __near unsigned short *)0x5AE) +#define RPGACC23 (*(volatile __near unsigned short *)0x5AE) +#define RFDF30L (*(volatile __near unsigned char *)0x5AE) +#define RPGACC23L (*(volatile __near unsigned char *)0x5AE) +#define RFDF30H (*(volatile __near unsigned char *)0x5AF) +#define RPGACC23H (*(volatile __near unsigned char *)0x5AF) +#define RFIDL1 (*(volatile __near unsigned short *)0x5B0) +#define RPGACC24 (*(volatile __near unsigned short *)0x5B0) +#define RFIDL1L (*(volatile __near unsigned char *)0x5B0) +#define RPGACC24L (*(volatile __near unsigned char *)0x5B0) +#define RFIDL1H (*(volatile __near unsigned char *)0x5B1) +#define RPGACC24H (*(volatile __near unsigned char *)0x5B1) +#define RFIDH1 (*(volatile __near unsigned short *)0x5B2) +#define RPGACC25 (*(volatile __near unsigned short *)0x5B2) +#define RFIDH1L (*(volatile __near unsigned char *)0x5B2) +#define RPGACC25L (*(volatile __near unsigned char *)0x5B2) +#define RFIDH1H (*(volatile __near unsigned char *)0x5B3) +#define RPGACC25H (*(volatile __near unsigned char *)0x5B3) +#define RFTS1 (*(volatile __near unsigned short *)0x5B4) +#define RPGACC26 (*(volatile __near unsigned short *)0x5B4) +#define RFTS1L (*(volatile __near unsigned char *)0x5B4) +#define RPGACC26L (*(volatile __near unsigned char *)0x5B4) +#define RFTS1H (*(volatile __near unsigned char *)0x5B5) +#define RPGACC26H (*(volatile __near unsigned char *)0x5B5) +#define RFPTR1 (*(volatile __near unsigned short *)0x5B6) +#define RPGACC27 (*(volatile __near unsigned short *)0x5B6) +#define RFPTR1L (*(volatile __near unsigned char *)0x5B6) +#define RPGACC27L (*(volatile __near unsigned char *)0x5B6) +#define RFPTR1H (*(volatile __near unsigned char *)0x5B7) +#define RPGACC27H (*(volatile __near unsigned char *)0x5B7) +#define RFDF01 (*(volatile __near unsigned short *)0x5B8) +#define RPGACC28 (*(volatile __near unsigned short *)0x5B8) +#define RFDF01L (*(volatile __near unsigned char *)0x5B8) +#define RPGACC28L (*(volatile __near unsigned char *)0x5B8) +#define RFDF01H (*(volatile __near unsigned char *)0x5B9) +#define RPGACC28H (*(volatile __near unsigned char *)0x5B9) +#define RFDF11 (*(volatile __near unsigned short *)0x5BA) +#define RPGACC29 (*(volatile __near unsigned short *)0x5BA) +#define RFDF11L (*(volatile __near unsigned char *)0x5BA) +#define RPGACC29L (*(volatile __near unsigned char *)0x5BA) +#define RFDF11H (*(volatile __near unsigned char *)0x5BB) +#define RPGACC29H (*(volatile __near unsigned char *)0x5BB) +#define RFDF21 (*(volatile __near unsigned short *)0x5BC) +#define RPGACC30 (*(volatile __near unsigned short *)0x5BC) +#define RFDF21L (*(volatile __near unsigned char *)0x5BC) +#define RPGACC30L (*(volatile __near unsigned char *)0x5BC) +#define RFDF21H (*(volatile __near unsigned char *)0x5BD) +#define RPGACC30H (*(volatile __near unsigned char *)0x5BD) +#define RFDF31 (*(volatile __near unsigned short *)0x5BE) +#define RPGACC31 (*(volatile __near unsigned short *)0x5BE) +#define RFDF31L (*(volatile __near unsigned char *)0x5BE) +#define RPGACC31L (*(volatile __near unsigned char *)0x5BE) +#define RFDF31H (*(volatile __near unsigned char *)0x5BF) +#define RPGACC31H (*(volatile __near unsigned char *)0x5BF) +#define RPGACC32 (*(volatile __near unsigned short *)0x5C0) +#define RPGACC32L (*(volatile __near unsigned char *)0x5C0) +#define RPGACC32H (*(volatile __near unsigned char *)0x5C1) +#define RPGACC33 (*(volatile __near unsigned short *)0x5C2) +#define RPGACC33L (*(volatile __near unsigned char *)0x5C2) +#define RPGACC33H (*(volatile __near unsigned char *)0x5C3) +#define RPGACC34 (*(volatile __near unsigned short *)0x5C4) +#define RPGACC34L (*(volatile __near unsigned char *)0x5C4) +#define RPGACC34H (*(volatile __near unsigned char *)0x5C5) +#define RPGACC35 (*(volatile __near unsigned short *)0x5C6) +#define RPGACC35L (*(volatile __near unsigned char *)0x5C6) +#define RPGACC35H (*(volatile __near unsigned char *)0x5C7) +#define RPGACC36 (*(volatile __near unsigned short *)0x5C8) +#define RPGACC36L (*(volatile __near unsigned char *)0x5C8) +#define RPGACC36H (*(volatile __near unsigned char *)0x5C9) +#define RPGACC37 (*(volatile __near unsigned short *)0x5CA) +#define RPGACC37L (*(volatile __near unsigned char *)0x5CA) +#define RPGACC37H (*(volatile __near unsigned char *)0x5CB) +#define RPGACC38 (*(volatile __near unsigned short *)0x5CC) +#define RPGACC38L (*(volatile __near unsigned char *)0x5CC) +#define RPGACC38H (*(volatile __near unsigned char *)0x5CD) +#define RPGACC39 (*(volatile __near unsigned short *)0x5CE) +#define RPGACC39L (*(volatile __near unsigned char *)0x5CE) +#define RPGACC39H (*(volatile __near unsigned char *)0x5CF) +#define RPGACC40 (*(volatile __near unsigned short *)0x5D0) +#define RPGACC40L (*(volatile __near unsigned char *)0x5D0) +#define RPGACC40H (*(volatile __near unsigned char *)0x5D1) +#define RPGACC41 (*(volatile __near unsigned short *)0x5D2) +#define RPGACC41L (*(volatile __near unsigned char *)0x5D2) +#define RPGACC41H (*(volatile __near unsigned char *)0x5D3) +#define RPGACC42 (*(volatile __near unsigned short *)0x5D4) +#define RPGACC42L (*(volatile __near unsigned char *)0x5D4) +#define RPGACC42H (*(volatile __near unsigned char *)0x5D5) +#define RPGACC43 (*(volatile __near unsigned short *)0x5D6) +#define RPGACC43L (*(volatile __near unsigned char *)0x5D6) +#define RPGACC43H (*(volatile __near unsigned char *)0x5D7) +#define RPGACC44 (*(volatile __near unsigned short *)0x5D8) +#define RPGACC44L (*(volatile __near unsigned char *)0x5D8) +#define RPGACC44H (*(volatile __near unsigned char *)0x5D9) +#define RPGACC45 (*(volatile __near unsigned short *)0x5DA) +#define RPGACC45L (*(volatile __near unsigned char *)0x5DA) +#define RPGACC45H (*(volatile __near unsigned char *)0x5DB) +#define RPGACC46 (*(volatile __near unsigned short *)0x5DC) +#define RPGACC46L (*(volatile __near unsigned char *)0x5DC) +#define RPGACC46H (*(volatile __near unsigned char *)0x5DD) +#define RPGACC47 (*(volatile __near unsigned short *)0x5DE) +#define RPGACC47L (*(volatile __near unsigned char *)0x5DE) +#define RPGACC47H (*(volatile __near unsigned char *)0x5DF) +#define CFIDL0 (*(volatile __near unsigned short *)0x5E0) +#define RPGACC48 (*(volatile __near unsigned short *)0x5E0) +#define CFIDL0L (*(volatile __near unsigned char *)0x5E0) +#define RPGACC48L (*(volatile __near unsigned char *)0x5E0) +#define CFIDL0H (*(volatile __near unsigned char *)0x5E1) +#define RPGACC48H (*(volatile __near unsigned char *)0x5E1) +#define CFIDH0 (*(volatile __near unsigned short *)0x5E2) +#define RPGACC49 (*(volatile __near unsigned short *)0x5E2) +#define CFIDH0L (*(volatile __near unsigned char *)0x5E2) +#define RPGACC49L (*(volatile __near unsigned char *)0x5E2) +#define CFIDH0H (*(volatile __near unsigned char *)0x5E3) +#define RPGACC49H (*(volatile __near unsigned char *)0x5E3) +#define CFTS0 (*(volatile __near unsigned short *)0x5E4) +#define RPGACC50 (*(volatile __near unsigned short *)0x5E4) +#define CFTS0L (*(volatile __near unsigned char *)0x5E4) +#define RPGACC50L (*(volatile __near unsigned char *)0x5E4) +#define CFTS0H (*(volatile __near unsigned char *)0x5E5) +#define RPGACC50H (*(volatile __near unsigned char *)0x5E5) +#define CFPTR0 (*(volatile __near unsigned short *)0x5E6) +#define RPGACC51 (*(volatile __near unsigned short *)0x5E6) +#define CFPTR0L (*(volatile __near unsigned char *)0x5E6) +#define RPGACC51L (*(volatile __near unsigned char *)0x5E6) +#define CFPTR0H (*(volatile __near unsigned char *)0x5E7) +#define RPGACC51H (*(volatile __near unsigned char *)0x5E7) +#define CFDF00 (*(volatile __near unsigned short *)0x5E8) +#define RPGACC52 (*(volatile __near unsigned short *)0x5E8) +#define CFDF00L (*(volatile __near unsigned char *)0x5E8) +#define RPGACC52L (*(volatile __near unsigned char *)0x5E8) +#define CFDF00H (*(volatile __near unsigned char *)0x5E9) +#define RPGACC52H (*(volatile __near unsigned char *)0x5E9) +#define CFDF10 (*(volatile __near unsigned short *)0x5EA) +#define RPGACC53 (*(volatile __near unsigned short *)0x5EA) +#define CFDF10L (*(volatile __near unsigned char *)0x5EA) +#define RPGACC53L (*(volatile __near unsigned char *)0x5EA) +#define CFDF10H (*(volatile __near unsigned char *)0x5EB) +#define RPGACC53H (*(volatile __near unsigned char *)0x5EB) +#define CFDF20 (*(volatile __near unsigned short *)0x5EC) +#define RPGACC54 (*(volatile __near unsigned short *)0x5EC) +#define CFDF20L (*(volatile __near unsigned char *)0x5EC) +#define RPGACC54L (*(volatile __near unsigned char *)0x5EC) +#define CFDF20H (*(volatile __near unsigned char *)0x5ED) +#define RPGACC54H (*(volatile __near unsigned char *)0x5ED) +#define CFDF30 (*(volatile __near unsigned short *)0x5EE) +#define RPGACC55 (*(volatile __near unsigned short *)0x5EE) +#define CFDF30L (*(volatile __near unsigned char *)0x5EE) +#define RPGACC55L (*(volatile __near unsigned char *)0x5EE) +#define CFDF30H (*(volatile __near unsigned char *)0x5EF) +#define RPGACC55H (*(volatile __near unsigned char *)0x5EF) +#define RPGACC56 (*(volatile __near unsigned short *)0x5F0) +#define RPGACC56L (*(volatile __near unsigned char *)0x5F0) +#define RPGACC56H (*(volatile __near unsigned char *)0x5F1) +#define RPGACC57 (*(volatile __near unsigned short *)0x5F2) +#define RPGACC57L (*(volatile __near unsigned char *)0x5F2) +#define RPGACC57H (*(volatile __near unsigned char *)0x5F3) +#define RPGACC58 (*(volatile __near unsigned short *)0x5F4) +#define RPGACC58L (*(volatile __near unsigned char *)0x5F4) +#define RPGACC58H (*(volatile __near unsigned char *)0x5F5) +#define RPGACC59 (*(volatile __near unsigned short *)0x5F6) +#define RPGACC59L (*(volatile __near unsigned char *)0x5F6) +#define RPGACC59H (*(volatile __near unsigned char *)0x5F7) +#define RPGACC60 (*(volatile __near unsigned short *)0x5F8) +#define RPGACC60L (*(volatile __near unsigned char *)0x5F8) +#define RPGACC60H (*(volatile __near unsigned char *)0x5F9) +#define RPGACC61 (*(volatile __near unsigned short *)0x5FA) +#define RPGACC61L (*(volatile __near unsigned char *)0x5FA) +#define RPGACC61H (*(volatile __near unsigned char *)0x5FB) +#define RPGACC62 (*(volatile __near unsigned short *)0x5FC) +#define RPGACC62L (*(volatile __near unsigned char *)0x5FC) +#define RPGACC62H (*(volatile __near unsigned char *)0x5FD) +#define RPGACC63 (*(volatile __near unsigned short *)0x5FE) +#define RPGACC63L (*(volatile __near unsigned char *)0x5FE) +#define RPGACC63H (*(volatile __near unsigned char *)0x5FF) +#define RPGACC64 (*(volatile __near unsigned short *)0x600) +#define TMIDL0 (*(volatile __near unsigned short *)0x600) +#define RPGACC64L (*(volatile __near unsigned char *)0x600) +#define TMIDL0L (*(volatile __near unsigned char *)0x600) +#define RPGACC64H (*(volatile __near unsigned char *)0x601) +#define TMIDL0H (*(volatile __near unsigned char *)0x601) +#define RPGACC65 (*(volatile __near unsigned short *)0x602) +#define TMIDH0 (*(volatile __near unsigned short *)0x602) +#define RPGACC65L (*(volatile __near unsigned char *)0x602) +#define TMIDH0L (*(volatile __near unsigned char *)0x602) +#define RPGACC65H (*(volatile __near unsigned char *)0x603) +#define TMIDH0H (*(volatile __near unsigned char *)0x603) +#define RPGACC66 (*(volatile __near unsigned short *)0x604) +#define RPGACC66L (*(volatile __near unsigned char *)0x604) +#define RPGACC66H (*(volatile __near unsigned char *)0x605) +#define RPGACC67 (*(volatile __near unsigned short *)0x606) +#define TMPTR0 (*(volatile __near unsigned short *)0x606) +#define RPGACC67L (*(volatile __near unsigned char *)0x606) +#define TMPTR0L (*(volatile __near unsigned char *)0x606) +#define RPGACC67H (*(volatile __near unsigned char *)0x607) +#define TMPTR0H (*(volatile __near unsigned char *)0x607) +#define RPGACC68 (*(volatile __near unsigned short *)0x608) +#define TMDF00 (*(volatile __near unsigned short *)0x608) +#define RPGACC68L (*(volatile __near unsigned char *)0x608) +#define TMDF00L (*(volatile __near unsigned char *)0x608) +#define RPGACC68H (*(volatile __near unsigned char *)0x609) +#define TMDF00H (*(volatile __near unsigned char *)0x609) +#define RPGACC69 (*(volatile __near unsigned short *)0x60A) +#define TMDF10 (*(volatile __near unsigned short *)0x60A) +#define RPGACC69L (*(volatile __near unsigned char *)0x60A) +#define TMDF10L (*(volatile __near unsigned char *)0x60A) +#define RPGACC69H (*(volatile __near unsigned char *)0x60B) +#define TMDF10H (*(volatile __near unsigned char *)0x60B) +#define RPGACC70 (*(volatile __near unsigned short *)0x60C) +#define TMDF20 (*(volatile __near unsigned short *)0x60C) +#define RPGACC70L (*(volatile __near unsigned char *)0x60C) +#define TMDF20L (*(volatile __near unsigned char *)0x60C) +#define RPGACC70H (*(volatile __near unsigned char *)0x60D) +#define TMDF20H (*(volatile __near unsigned char *)0x60D) +#define RPGACC71 (*(volatile __near unsigned short *)0x60E) +#define TMDF30 (*(volatile __near unsigned short *)0x60E) +#define RPGACC71L (*(volatile __near unsigned char *)0x60E) +#define TMDF30L (*(volatile __near unsigned char *)0x60E) +#define RPGACC71H (*(volatile __near unsigned char *)0x60F) +#define TMDF30H (*(volatile __near unsigned char *)0x60F) +#define RPGACC72 (*(volatile __near unsigned short *)0x610) +#define TMIDL1 (*(volatile __near unsigned short *)0x610) +#define RPGACC72L (*(volatile __near unsigned char *)0x610) +#define TMIDL1L (*(volatile __near unsigned char *)0x610) +#define RPGACC72H (*(volatile __near unsigned char *)0x611) +#define TMIDL1H (*(volatile __near unsigned char *)0x611) +#define RPGACC73 (*(volatile __near unsigned short *)0x612) +#define TMIDH1 (*(volatile __near unsigned short *)0x612) +#define RPGACC73L (*(volatile __near unsigned char *)0x612) +#define TMIDH1L (*(volatile __near unsigned char *)0x612) +#define RPGACC73H (*(volatile __near unsigned char *)0x613) +#define TMIDH1H (*(volatile __near unsigned char *)0x613) +#define RPGACC74 (*(volatile __near unsigned short *)0x614) +#define RPGACC74L (*(volatile __near unsigned char *)0x614) +#define RPGACC74H (*(volatile __near unsigned char *)0x615) +#define RPGACC75 (*(volatile __near unsigned short *)0x616) +#define TMPTR1 (*(volatile __near unsigned short *)0x616) +#define RPGACC75L (*(volatile __near unsigned char *)0x616) +#define TMPTR1L (*(volatile __near unsigned char *)0x616) +#define RPGACC75H (*(volatile __near unsigned char *)0x617) +#define TMPTR1H (*(volatile __near unsigned char *)0x617) +#define RPGACC76 (*(volatile __near unsigned short *)0x618) +#define TMDF01 (*(volatile __near unsigned short *)0x618) +#define RPGACC76L (*(volatile __near unsigned char *)0x618) +#define TMDF01L (*(volatile __near unsigned char *)0x618) +#define RPGACC76H (*(volatile __near unsigned char *)0x619) +#define TMDF01H (*(volatile __near unsigned char *)0x619) +#define RPGACC77 (*(volatile __near unsigned short *)0x61A) +#define TMDF11 (*(volatile __near unsigned short *)0x61A) +#define RPGACC77L (*(volatile __near unsigned char *)0x61A) +#define TMDF11L (*(volatile __near unsigned char *)0x61A) +#define RPGACC77H (*(volatile __near unsigned char *)0x61B) +#define TMDF11H (*(volatile __near unsigned char *)0x61B) +#define RPGACC78 (*(volatile __near unsigned short *)0x61C) +#define TMDF21 (*(volatile __near unsigned short *)0x61C) +#define RPGACC78L (*(volatile __near unsigned char *)0x61C) +#define TMDF21L (*(volatile __near unsigned char *)0x61C) +#define RPGACC78H (*(volatile __near unsigned char *)0x61D) +#define TMDF21H (*(volatile __near unsigned char *)0x61D) +#define RPGACC79 (*(volatile __near unsigned short *)0x61E) +#define TMDF31 (*(volatile __near unsigned short *)0x61E) +#define RPGACC79L (*(volatile __near unsigned char *)0x61E) +#define TMDF31L (*(volatile __near unsigned char *)0x61E) +#define RPGACC79H (*(volatile __near unsigned char *)0x61F) +#define TMDF31H (*(volatile __near unsigned char *)0x61F) +#define RPGACC80 (*(volatile __near unsigned short *)0x620) +#define TMIDL2 (*(volatile __near unsigned short *)0x620) +#define RPGACC80L (*(volatile __near unsigned char *)0x620) +#define TMIDL2L (*(volatile __near unsigned char *)0x620) +#define RPGACC80H (*(volatile __near unsigned char *)0x621) +#define TMIDL2H (*(volatile __near unsigned char *)0x621) +#define RPGACC81 (*(volatile __near unsigned short *)0x622) +#define TMIDH2 (*(volatile __near unsigned short *)0x622) +#define RPGACC81L (*(volatile __near unsigned char *)0x622) +#define TMIDH2L (*(volatile __near unsigned char *)0x622) +#define RPGACC81H (*(volatile __near unsigned char *)0x623) +#define TMIDH2H (*(volatile __near unsigned char *)0x623) +#define RPGACC82 (*(volatile __near unsigned short *)0x624) +#define RPGACC82L (*(volatile __near unsigned char *)0x624) +#define RPGACC82H (*(volatile __near unsigned char *)0x625) +#define RPGACC83 (*(volatile __near unsigned short *)0x626) +#define TMPTR2 (*(volatile __near unsigned short *)0x626) +#define RPGACC83L (*(volatile __near unsigned char *)0x626) +#define TMPTR2L (*(volatile __near unsigned char *)0x626) +#define RPGACC83H (*(volatile __near unsigned char *)0x627) +#define TMPTR2H (*(volatile __near unsigned char *)0x627) +#define RPGACC84 (*(volatile __near unsigned short *)0x628) +#define TMDF02 (*(volatile __near unsigned short *)0x628) +#define RPGACC84L (*(volatile __near unsigned char *)0x628) +#define TMDF02L (*(volatile __near unsigned char *)0x628) +#define RPGACC84H (*(volatile __near unsigned char *)0x629) +#define TMDF02H (*(volatile __near unsigned char *)0x629) +#define RPGACC85 (*(volatile __near unsigned short *)0x62A) +#define TMDF12 (*(volatile __near unsigned short *)0x62A) +#define RPGACC85L (*(volatile __near unsigned char *)0x62A) +#define TMDF12L (*(volatile __near unsigned char *)0x62A) +#define RPGACC85H (*(volatile __near unsigned char *)0x62B) +#define TMDF12H (*(volatile __near unsigned char *)0x62B) +#define RPGACC86 (*(volatile __near unsigned short *)0x62C) +#define TMDF22 (*(volatile __near unsigned short *)0x62C) +#define RPGACC86L (*(volatile __near unsigned char *)0x62C) +#define TMDF22L (*(volatile __near unsigned char *)0x62C) +#define RPGACC86H (*(volatile __near unsigned char *)0x62D) +#define TMDF22H (*(volatile __near unsigned char *)0x62D) +#define RPGACC87 (*(volatile __near unsigned short *)0x62E) +#define TMDF32 (*(volatile __near unsigned short *)0x62E) +#define RPGACC87L (*(volatile __near unsigned char *)0x62E) +#define TMDF32L (*(volatile __near unsigned char *)0x62E) +#define RPGACC87H (*(volatile __near unsigned char *)0x62F) +#define TMDF32H (*(volatile __near unsigned char *)0x62F) +#define RPGACC88 (*(volatile __near unsigned short *)0x630) +#define TMIDL3 (*(volatile __near unsigned short *)0x630) +#define RPGACC88L (*(volatile __near unsigned char *)0x630) +#define TMIDL3L (*(volatile __near unsigned char *)0x630) +#define RPGACC88H (*(volatile __near unsigned char *)0x631) +#define TMIDL3H (*(volatile __near unsigned char *)0x631) +#define RPGACC89 (*(volatile __near unsigned short *)0x632) +#define TMIDH3 (*(volatile __near unsigned short *)0x632) +#define RPGACC89L (*(volatile __near unsigned char *)0x632) +#define TMIDH3L (*(volatile __near unsigned char *)0x632) +#define RPGACC89H (*(volatile __near unsigned char *)0x633) +#define TMIDH3H (*(volatile __near unsigned char *)0x633) +#define RPGACC90 (*(volatile __near unsigned short *)0x634) +#define RPGACC90L (*(volatile __near unsigned char *)0x634) +#define RPGACC90H (*(volatile __near unsigned char *)0x635) +#define RPGACC91 (*(volatile __near unsigned short *)0x636) +#define TMPTR3 (*(volatile __near unsigned short *)0x636) +#define RPGACC91L (*(volatile __near unsigned char *)0x636) +#define TMPTR3L (*(volatile __near unsigned char *)0x636) +#define RPGACC91H (*(volatile __near unsigned char *)0x637) +#define TMPTR3H (*(volatile __near unsigned char *)0x637) +#define RPGACC92 (*(volatile __near unsigned short *)0x638) +#define TMDF03 (*(volatile __near unsigned short *)0x638) +#define RPGACC92L (*(volatile __near unsigned char *)0x638) +#define TMDF03L (*(volatile __near unsigned char *)0x638) +#define RPGACC92H (*(volatile __near unsigned char *)0x639) +#define TMDF03H (*(volatile __near unsigned char *)0x639) +#define RPGACC93 (*(volatile __near unsigned short *)0x63A) +#define TMDF13 (*(volatile __near unsigned short *)0x63A) +#define RPGACC93L (*(volatile __near unsigned char *)0x63A) +#define TMDF13L (*(volatile __near unsigned char *)0x63A) +#define RPGACC93H (*(volatile __near unsigned char *)0x63B) +#define TMDF13H (*(volatile __near unsigned char *)0x63B) +#define RPGACC94 (*(volatile __near unsigned short *)0x63C) +#define TMDF23 (*(volatile __near unsigned short *)0x63C) +#define RPGACC94L (*(volatile __near unsigned char *)0x63C) +#define TMDF23L (*(volatile __near unsigned char *)0x63C) +#define RPGACC94H (*(volatile __near unsigned char *)0x63D) +#define TMDF23H (*(volatile __near unsigned char *)0x63D) +#define RPGACC95 (*(volatile __near unsigned short *)0x63E) +#define TMDF33 (*(volatile __near unsigned short *)0x63E) +#define RPGACC95L (*(volatile __near unsigned char *)0x63E) +#define TMDF33L (*(volatile __near unsigned char *)0x63E) +#define RPGACC95H (*(volatile __near unsigned char *)0x63F) +#define TMDF33H (*(volatile __near unsigned char *)0x63F) +#define RPGACC96 (*(volatile __near unsigned short *)0x640) +#define RPGACC96L (*(volatile __near unsigned char *)0x640) +#define RPGACC96H (*(volatile __near unsigned char *)0x641) +#define RPGACC97 (*(volatile __near unsigned short *)0x642) +#define RPGACC97L (*(volatile __near unsigned char *)0x642) +#define RPGACC97H (*(volatile __near unsigned char *)0x643) +#define RPGACC98 (*(volatile __near unsigned short *)0x644) +#define RPGACC98L (*(volatile __near unsigned char *)0x644) +#define RPGACC98H (*(volatile __near unsigned char *)0x645) +#define RPGACC99 (*(volatile __near unsigned short *)0x646) +#define RPGACC99L (*(volatile __near unsigned char *)0x646) +#define RPGACC99H (*(volatile __near unsigned char *)0x647) +#define RPGACC100 (*(volatile __near unsigned short *)0x648) +#define RPGACC100L (*(volatile __near unsigned char *)0x648) +#define RPGACC100H (*(volatile __near unsigned char *)0x649) +#define RPGACC101 (*(volatile __near unsigned short *)0x64A) +#define RPGACC101L (*(volatile __near unsigned char *)0x64A) +#define RPGACC101H (*(volatile __near unsigned char *)0x64B) +#define RPGACC102 (*(volatile __near unsigned short *)0x64C) +#define RPGACC102L (*(volatile __near unsigned char *)0x64C) +#define RPGACC102H (*(volatile __near unsigned char *)0x64D) +#define RPGACC103 (*(volatile __near unsigned short *)0x64E) +#define RPGACC103L (*(volatile __near unsigned char *)0x64E) +#define RPGACC103H (*(volatile __near unsigned char *)0x64F) +#define RPGACC104 (*(volatile __near unsigned short *)0x650) +#define RPGACC104L (*(volatile __near unsigned char *)0x650) +#define RPGACC104H (*(volatile __near unsigned char *)0x651) +#define RPGACC105 (*(volatile __near unsigned short *)0x652) +#define RPGACC105L (*(volatile __near unsigned char *)0x652) +#define RPGACC105H (*(volatile __near unsigned char *)0x653) +#define RPGACC106 (*(volatile __near unsigned short *)0x654) +#define RPGACC106L (*(volatile __near unsigned char *)0x654) +#define RPGACC106H (*(volatile __near unsigned char *)0x655) +#define RPGACC107 (*(volatile __near unsigned short *)0x656) +#define RPGACC107L (*(volatile __near unsigned char *)0x656) +#define RPGACC107H (*(volatile __near unsigned char *)0x657) +#define RPGACC108 (*(volatile __near unsigned short *)0x658) +#define RPGACC108L (*(volatile __near unsigned char *)0x658) +#define RPGACC108H (*(volatile __near unsigned char *)0x659) +#define RPGACC109 (*(volatile __near unsigned short *)0x65A) +#define RPGACC109L (*(volatile __near unsigned char *)0x65A) +#define RPGACC109H (*(volatile __near unsigned char *)0x65B) +#define RPGACC110 (*(volatile __near unsigned short *)0x65C) +#define RPGACC110L (*(volatile __near unsigned char *)0x65C) +#define RPGACC110H (*(volatile __near unsigned char *)0x65D) +#define RPGACC111 (*(volatile __near unsigned short *)0x65E) +#define RPGACC111L (*(volatile __near unsigned char *)0x65E) +#define RPGACC111H (*(volatile __near unsigned char *)0x65F) +#define RPGACC112 (*(volatile __near unsigned short *)0x660) +#define RPGACC112L (*(volatile __near unsigned char *)0x660) +#define RPGACC112H (*(volatile __near unsigned char *)0x661) +#define RPGACC113 (*(volatile __near unsigned short *)0x662) +#define RPGACC113L (*(volatile __near unsigned char *)0x662) +#define RPGACC113H (*(volatile __near unsigned char *)0x663) +#define RPGACC114 (*(volatile __near unsigned short *)0x664) +#define RPGACC114L (*(volatile __near unsigned char *)0x664) +#define RPGACC114H (*(volatile __near unsigned char *)0x665) +#define RPGACC115 (*(volatile __near unsigned short *)0x666) +#define RPGACC115L (*(volatile __near unsigned char *)0x666) +#define RPGACC115H (*(volatile __near unsigned char *)0x667) +#define RPGACC116 (*(volatile __near unsigned short *)0x668) +#define RPGACC116L (*(volatile __near unsigned char *)0x668) +#define RPGACC116H (*(volatile __near unsigned char *)0x669) +#define RPGACC117 (*(volatile __near unsigned short *)0x66A) +#define RPGACC117L (*(volatile __near unsigned char *)0x66A) +#define RPGACC117H (*(volatile __near unsigned char *)0x66B) +#define RPGACC118 (*(volatile __near unsigned short *)0x66C) +#define RPGACC118L (*(volatile __near unsigned char *)0x66C) +#define RPGACC118H (*(volatile __near unsigned char *)0x66D) +#define RPGACC119 (*(volatile __near unsigned short *)0x66E) +#define RPGACC119L (*(volatile __near unsigned char *)0x66E) +#define RPGACC119H (*(volatile __near unsigned char *)0x66F) +#define RPGACC120 (*(volatile __near unsigned short *)0x670) +#define RPGACC120L (*(volatile __near unsigned char *)0x670) +#define RPGACC120H (*(volatile __near unsigned char *)0x671) +#define RPGACC121 (*(volatile __near unsigned short *)0x672) +#define RPGACC121L (*(volatile __near unsigned char *)0x672) +#define RPGACC121H (*(volatile __near unsigned char *)0x673) +#define RPGACC122 (*(volatile __near unsigned short *)0x674) +#define RPGACC122L (*(volatile __near unsigned char *)0x674) +#define RPGACC122H (*(volatile __near unsigned char *)0x675) +#define RPGACC123 (*(volatile __near unsigned short *)0x676) +#define RPGACC123L (*(volatile __near unsigned char *)0x676) +#define RPGACC123H (*(volatile __near unsigned char *)0x677) +#define RPGACC124 (*(volatile __near unsigned short *)0x678) +#define RPGACC124L (*(volatile __near unsigned char *)0x678) +#define RPGACC124H (*(volatile __near unsigned char *)0x679) +#define RPGACC125 (*(volatile __near unsigned short *)0x67A) +#define RPGACC125L (*(volatile __near unsigned char *)0x67A) +#define RPGACC125H (*(volatile __near unsigned char *)0x67B) +#define RPGACC126 (*(volatile __near unsigned short *)0x67C) +#define RPGACC126L (*(volatile __near unsigned char *)0x67C) +#define RPGACC126H (*(volatile __near unsigned char *)0x67D) +#define RPGACC127 (*(volatile __near unsigned short *)0x67E) +#define RPGACC127L (*(volatile __near unsigned char *)0x67E) +#define RPGACC127H (*(volatile __near unsigned char *)0x67F) +#define THLACC0 (*(volatile __near unsigned short *)0x680) +#define THLACC0L (*(volatile __near unsigned char *)0x680) +#define THLACC0H (*(volatile __near unsigned char *)0x681) +#define LWBR0 (*(volatile __near unsigned char *)0x6C1) +#define LWBR1 (*(volatile __near unsigned char *)0x6C1) +#define LBRP0 (*(volatile __near unsigned short *)0x6C2) +#define LBRP1 (*(volatile __near unsigned short *)0x6C2) +#define LBRP00 (*(volatile __near unsigned char *)0x6C2) +#define LBRP10 (*(volatile __near unsigned char *)0x6C2) +#define LBRP01 (*(volatile __near unsigned char *)0x6C3) +#define LBRP11 (*(volatile __near unsigned char *)0x6C3) +#define LSTC0 (*(volatile __near unsigned char *)0x6C4) +#define LSTC1 (*(volatile __near unsigned char *)0x6C4) +#define LUSC0 (*(volatile __near unsigned char *)0x6C5) +#define LUSC1 (*(volatile __near unsigned char *)0x6C5) +#define LMD0 (*(volatile __near unsigned char *)0x6C8) +#define LMD1 (*(volatile __near unsigned char *)0x6C8) +#define LBFC0 (*(volatile __near unsigned char *)0x6C9) +#define LBFC1 (*(volatile __near unsigned char *)0x6C9) +#define LSC0 (*(volatile __near unsigned char *)0x6CA) +#define LSC1 (*(volatile __near unsigned char *)0x6CA) +#define LWUP0 (*(volatile __near unsigned char *)0x6CB) +#define LWUP1 (*(volatile __near unsigned char *)0x6CB) +#define LIE0 (*(volatile __near unsigned char *)0x6CC) +#define LIE1 (*(volatile __near unsigned char *)0x6CC) +#define LEDE0 (*(volatile __near unsigned char *)0x6CD) +#define LEDE1 (*(volatile __near unsigned char *)0x6CD) +#define LCUC0 (*(volatile __near unsigned char *)0x6CE) +#define LCUC1 (*(volatile __near unsigned char *)0x6CE) +#define LTRC0 (*(volatile __near unsigned char *)0x6D0) +#define LTRC1 (*(volatile __near unsigned char *)0x6D0) +#define LMST0 (*(volatile __near unsigned char *)0x6D1) +#define LMST1 (*(volatile __near unsigned char *)0x6D1) +#define LST0 (*(volatile __near unsigned char *)0x6D2) +#define LST1 (*(volatile __near unsigned char *)0x6D2) +#define LEST0 (*(volatile __near unsigned char *)0x6D3) +#define LEST1 (*(volatile __near unsigned char *)0x6D3) +#define LDFC0 (*(volatile __near unsigned char *)0x6D4) +#define LDFC1 (*(volatile __near unsigned char *)0x6D4) +#define LIDB0 (*(volatile __near unsigned char *)0x6D5) +#define LIDB1 (*(volatile __near unsigned char *)0x6D5) +#define LCBR0 (*(volatile __near unsigned char *)0x6D6) +#define LCBR1 (*(volatile __near unsigned char *)0x6D6) +#define LUDB00 (*(volatile __near unsigned char *)0x6D7) +#define LUDB10 (*(volatile __near unsigned char *)0x6D7) +#define LDB01 (*(volatile __near unsigned char *)0x6D8) +#define LDB11 (*(volatile __near unsigned char *)0x6D8) +#define LDB02 (*(volatile __near unsigned char *)0x6D9) +#define LDB12 (*(volatile __near unsigned char *)0x6D9) +#define LDB03 (*(volatile __near unsigned char *)0x6DA) +#define LDB13 (*(volatile __near unsigned char *)0x6DA) +#define LDB04 (*(volatile __near unsigned char *)0x6DB) +#define LDB14 (*(volatile __near unsigned char *)0x6DB) +#define LDB05 (*(volatile __near unsigned char *)0x6DC) +#define LDB15 (*(volatile __near unsigned char *)0x6DC) +#define LDB06 (*(volatile __near unsigned char *)0x6DD) +#define LDB16 (*(volatile __near unsigned char *)0x6DD) +#define LDB07 (*(volatile __near unsigned char *)0x6DE) +#define LDB17 (*(volatile __near unsigned char *)0x6DE) +#define LDB08 (*(volatile __near unsigned char *)0x6DF) +#define LDB18 (*(volatile __near unsigned char *)0x6DF) +#define LUOER0 (*(volatile __near unsigned char *)0x6E0) +#define LUOER1 (*(volatile __near unsigned char *)0x6E0) +#define LUOR01 (*(volatile __near unsigned char *)0x6E1) +#define LUOR11 (*(volatile __near unsigned char *)0x6E1) +#define LUTDR0 (*(volatile __near unsigned short *)0x6E4) +#define LUTDR1 (*(volatile __near unsigned short *)0x6E4) +#define LUTDR0L (*(volatile __near unsigned char *)0x6E4) +#define LUTDR1L (*(volatile __near unsigned char *)0x6E4) +#define LUTDR0H (*(volatile __near unsigned char *)0x6E5) +#define LUTDR1H (*(volatile __near unsigned char *)0x6E5) +#define LURDR0 (*(volatile __near unsigned short *)0x6E6) +#define LURDR1 (*(volatile __near unsigned short *)0x6E6) +#define LURDR0L (*(volatile __near unsigned char *)0x6E6) +#define LURDR1L (*(volatile __near unsigned char *)0x6E6) +#define LURDR0H (*(volatile __near unsigned char *)0x6E7) +#define LURDR1H (*(volatile __near unsigned char *)0x6E7) +#define LUWTDR0 (*(volatile __near unsigned short *)0x6E8) +#define LUWTDR1 (*(volatile __near unsigned short *)0x6E8) +#define LUWTDR0L (*(volatile __near unsigned char *)0x6E8) +#define LUWTDR1L (*(volatile __near unsigned char *)0x6E8) +#define LUWTDR0H (*(volatile __near unsigned char *)0x6E9) +#define LUWTDR1H (*(volatile __near unsigned char *)0x6E9) +#define TRJ0 (*(volatile __near unsigned short *)0x6F0) +#define ELSELR00 (*(volatile __near unsigned char *)0x780) +#define ELSELR00_bit (*(volatile __near __bitf_T *)0x780) +#define ELSELR01 (*(volatile __near unsigned char *)0x781) +#define ELSELR01_bit (*(volatile __near __bitf_T *)0x781) +#define ELSELR02 (*(volatile __near unsigned char *)0x782) +#define ELSELR02_bit (*(volatile __near __bitf_T *)0x782) +#define ELSELR03 (*(volatile __near unsigned char *)0x783) +#define ELSELR03_bit (*(volatile __near __bitf_T *)0x783) +#define ELSELR04 (*(volatile __near unsigned char *)0x784) +#define ELSELR04_bit (*(volatile __near __bitf_T *)0x784) +#define ELSELR05 (*(volatile __near unsigned char *)0x785) +#define ELSELR05_bit (*(volatile __near __bitf_T *)0x785) +#define ELSELR06 (*(volatile __near unsigned char *)0x786) +#define ELSELR06_bit (*(volatile __near __bitf_T *)0x786) +#define ELSELR07 (*(volatile __near unsigned char *)0x787) +#define ELSELR07_bit (*(volatile __near __bitf_T *)0x787) +#define ELSELR08 (*(volatile __near unsigned char *)0x788) +#define ELSELR08_bit (*(volatile __near __bitf_T *)0x788) +#define ELSELR09 (*(volatile __near unsigned char *)0x789) +#define ELSELR09_bit (*(volatile __near __bitf_T *)0x789) +#define ELSELR10 (*(volatile __near unsigned char *)0x78A) +#define ELSELR10_bit (*(volatile __near __bitf_T *)0x78A) +#define ELSELR11 (*(volatile __near unsigned char *)0x78B) +#define ELSELR11_bit (*(volatile __near __bitf_T *)0x78B) +#define ELSELR12 (*(volatile __near unsigned char *)0x78C) +#define ELSELR12_bit (*(volatile __near __bitf_T *)0x78C) +#define ELSELR13 (*(volatile __near unsigned char *)0x78D) +#define ELSELR13_bit (*(volatile __near __bitf_T *)0x78D) +#define ELSELR14 (*(volatile __near unsigned char *)0x78E) +#define ELSELR14_bit (*(volatile __near __bitf_T *)0x78E) +#define ELSELR15 (*(volatile __near unsigned char *)0x78F) +#define ELSELR15_bit (*(volatile __near __bitf_T *)0x78F) +#define ELSELR16 (*(volatile __near unsigned char *)0x790) +#define ELSELR16_bit (*(volatile __near __bitf_T *)0x790) +#define ELSELR17 (*(volatile __near unsigned char *)0x791) +#define ELSELR17_bit (*(volatile __near __bitf_T *)0x791) +#define ELSELR18 (*(volatile __near unsigned char *)0x792) +#define ELSELR18_bit (*(volatile __near __bitf_T *)0x792) +#define ELSELR19 (*(volatile __near unsigned char *)0x793) +#define ELSELR19_bit (*(volatile __near __bitf_T *)0x793) +#define ELSELR20 (*(volatile __near unsigned char *)0x794) +#define ELSELR20_bit (*(volatile __near __bitf_T *)0x794) +#define ELSELR21 (*(volatile __near unsigned char *)0x795) +#define ELSELR21_bit (*(volatile __near __bitf_T *)0x795) +#define ELSELR22 (*(volatile __near unsigned char *)0x796) +#define ELSELR22_bit (*(volatile __near __bitf_T *)0x796) +#define ELSELR23 (*(volatile __near unsigned char *)0x797) +#define ELSELR23_bit (*(volatile __near __bitf_T *)0x797) +#define ELSELR24 (*(volatile __near unsigned char *)0x798) +#define ELSELR24_bit (*(volatile __near __bitf_T *)0x798) +#define ELSELR25 (*(volatile __near unsigned char *)0x799) +#define ELSELR25_bit (*(volatile __near __bitf_T *)0x799) +#define P0 (*(volatile __near unsigned char *)0xFF00) +#define P0_bit (*(volatile __near __bitf_T *)0xFF00) +#define P1 (*(volatile __near unsigned char *)0xFF01) +#define P1_bit (*(volatile __near __bitf_T *)0xFF01) +#define P3 (*(volatile __near unsigned char *)0xFF03) +#define P3_bit (*(volatile __near __bitf_T *)0xFF03) +#define P4 (*(volatile __near unsigned char *)0xFF04) +#define P4_bit (*(volatile __near __bitf_T *)0xFF04) +#define P5 (*(volatile __near unsigned char *)0xFF05) +#define P5_bit (*(volatile __near __bitf_T *)0xFF05) +#define P6 (*(volatile __near unsigned char *)0xFF06) +#define P6_bit (*(volatile __near __bitf_T *)0xFF06) +#define P7 (*(volatile __near unsigned char *)0xFF07) +#define P7_bit (*(volatile __near __bitf_T *)0xFF07) +#define P8 (*(volatile __near unsigned char *)0xFF08) +#define P8_bit (*(volatile __near __bitf_T *)0xFF08) +#define P9 (*(volatile __near unsigned char *)0xFF09) +#define P9_bit (*(volatile __near __bitf_T *)0xFF09) +#define P10 (*(volatile __near unsigned char *)0xFF0A) +#define P10_bit (*(volatile __near __bitf_T *)0xFF0A) +#define P12 (*(volatile __near unsigned char *)0xFF0C) +#define P12_bit (*(volatile __near __bitf_T *)0xFF0C) +#define P13 (*(volatile __near unsigned char *)0xFF0D) +#define P13_bit (*(volatile __near __bitf_T *)0xFF0D) +#define P14 (*(volatile __near unsigned char *)0xFF0E) +#define P14_bit (*(volatile __near __bitf_T *)0xFF0E) +#define P15 (*(volatile __near unsigned char *)0xFF0F) +#define P15_bit (*(volatile __near __bitf_T *)0xFF0F) +#define SDR00 (*(volatile __near unsigned short *)0xFF10) +#define SDR00L (*(volatile __near unsigned char *)0xFF10) +#define SDR01 (*(volatile __near unsigned short *)0xFF12) +#define SDR01L (*(volatile __near unsigned char *)0xFF12) +#define TDR00 (*(volatile __near unsigned short *)0xFF18) +#define TDR01 (*(volatile __near unsigned short *)0xFF1A) +#define TDR01L (*(volatile __near unsigned char *)0xFF1A) +#define TDR01H (*(volatile __near unsigned char *)0xFF1B) +#define ADCR (*(volatile __near unsigned short *)0xFF1E) +#define ADCRH (*(volatile __near unsigned char *)0xFF1F) +#define PM0 (*(volatile __near unsigned char *)0xFF20) +#define PM0_bit (*(volatile __near __bitf_T *)0xFF20) +#define PM1 (*(volatile __near unsigned char *)0xFF21) +#define PM1_bit (*(volatile __near __bitf_T *)0xFF21) +#define PM3 (*(volatile __near unsigned char *)0xFF23) +#define PM3_bit (*(volatile __near __bitf_T *)0xFF23) +#define PM4 (*(volatile __near unsigned char *)0xFF24) +#define PM4_bit (*(volatile __near __bitf_T *)0xFF24) +#define PM5 (*(volatile __near unsigned char *)0xFF25) +#define PM5_bit (*(volatile __near __bitf_T *)0xFF25) +#define PM6 (*(volatile __near unsigned char *)0xFF26) +#define PM6_bit (*(volatile __near __bitf_T *)0xFF26) +#define PM7 (*(volatile __near unsigned char *)0xFF27) +#define PM7_bit (*(volatile __near __bitf_T *)0xFF27) +#define PM8 (*(volatile __near unsigned char *)0xFF28) +#define PM8_bit (*(volatile __near __bitf_T *)0xFF28) +#define PM9 (*(volatile __near unsigned char *)0xFF29) +#define PM9_bit (*(volatile __near __bitf_T *)0xFF29) +#define PM10 (*(volatile __near unsigned char *)0xFF2A) +#define PM10_bit (*(volatile __near __bitf_T *)0xFF2A) +#define PM12 (*(volatile __near unsigned char *)0xFF2C) +#define PM12_bit (*(volatile __near __bitf_T *)0xFF2C) +#define PM14 (*(volatile __near unsigned char *)0xFF2E) +#define PM14_bit (*(volatile __near __bitf_T *)0xFF2E) +#define PM15 (*(volatile __near unsigned char *)0xFF2F) +#define PM15_bit (*(volatile __near __bitf_T *)0xFF2F) +#define ADM0 (*(volatile __near unsigned char *)0xFF30) +#define ADM0_bit (*(volatile __near __bitf_T *)0xFF30) +#define ADCE (((volatile __near __bitf_T *)0xFF30)->no0) +#define ADCS (((volatile __near __bitf_T *)0xFF30)->no7) +#define ADS (*(volatile __near unsigned char *)0xFF31) +#define ADS_bit (*(volatile __near __bitf_T *)0xFF31) +#define ADM1 (*(volatile __near unsigned char *)0xFF32) +#define ADM1_bit (*(volatile __near __bitf_T *)0xFF32) +#define DACS0 (*(volatile __near unsigned char *)0xFF34) +#define DAM (*(volatile __near unsigned char *)0xFF36) +#define DAM_bit (*(volatile __near __bitf_T *)0xFF36) +#define DACE0 (((volatile __near __bitf_T *)0xFF36)->no4) +#define KRM (*(volatile __near unsigned char *)0xFF37) +#define KRM_bit (*(volatile __near __bitf_T *)0xFF37) +#define EGP0 (*(volatile __near unsigned char *)0xFF38) +#define EGP0_bit (*(volatile __near __bitf_T *)0xFF38) +#define EGN0 (*(volatile __near unsigned char *)0xFF39) +#define EGN0_bit (*(volatile __near __bitf_T *)0xFF39) +#define EGP1 (*(volatile __near unsigned char *)0xFF3A) +#define EGP1_bit (*(volatile __near __bitf_T *)0xFF3A) +#define EGN1 (*(volatile __near unsigned char *)0xFF3B) +#define EGN1_bit (*(volatile __near __bitf_T *)0xFF3B) +#define SDR10 (*(volatile __near unsigned short *)0xFF48) +#define SDR10L (*(volatile __near unsigned char *)0xFF48) +#define SDR11 (*(volatile __near unsigned short *)0xFF4A) +#define SDR11L (*(volatile __near unsigned char *)0xFF4A) +#define IICA0 (*(volatile __near unsigned char *)0xFF50) +#define IICS0 (*(volatile __near unsigned char *)0xFF51) +#define IICS0_bit (*(volatile __near __bitf_T *)0xFF51) +#define SPD0 (((volatile __near __bitf_T *)0xFF51)->no0) +#define STD0 (((volatile __near __bitf_T *)0xFF51)->no1) +#define ACKD0 (((volatile __near __bitf_T *)0xFF51)->no2) +#define TRC0 (((volatile __near __bitf_T *)0xFF51)->no3) +#define COI0 (((volatile __near __bitf_T *)0xFF51)->no4) +#define EXC0 (((volatile __near __bitf_T *)0xFF51)->no5) +#define ALD0 (((volatile __near __bitf_T *)0xFF51)->no6) +#define MSTS0 (((volatile __near __bitf_T *)0xFF51)->no7) +#define IICF0 (*(volatile __near unsigned char *)0xFF52) +#define IICF0_bit (*(volatile __near __bitf_T *)0xFF52) +#define IICRSV0 (((volatile __near __bitf_T *)0xFF52)->no0) +#define STCEN0 (((volatile __near __bitf_T *)0xFF52)->no1) +#define IICBSY0 (((volatile __near __bitf_T *)0xFF52)->no6) +#define STCF0 (((volatile __near __bitf_T *)0xFF52)->no7) +#define SUBCUDW (*(volatile __near unsigned short *)0xFF54) +#define TRDGRC0 (*(volatile __near unsigned short *)0xFF58) +#define TRDGRD0 (*(volatile __near unsigned short *)0xFF5A) +#define TRDGRC1 (*(volatile __near unsigned short *)0xFF5C) +#define TRDGRD1 (*(volatile __near unsigned short *)0xFF5E) +#define TDR02 (*(volatile __near unsigned short *)0xFF64) +#define TDR03 (*(volatile __near unsigned short *)0xFF66) +#define TDR03L (*(volatile __near unsigned char *)0xFF66) +#define TDR03H (*(volatile __near unsigned char *)0xFF67) +#define TDR04 (*(volatile __near unsigned short *)0xFF68) +#define TDR05 (*(volatile __near unsigned short *)0xFF6A) +#define TDR06 (*(volatile __near unsigned short *)0xFF6C) +#define TDR07 (*(volatile __near unsigned short *)0xFF6E) +#define TDR10 (*(volatile __near unsigned short *)0xFF70) +#define TDR11 (*(volatile __near unsigned short *)0xFF72) +#define TDR11L (*(volatile __near unsigned char *)0xFF72) +#define TDR11H (*(volatile __near unsigned char *)0xFF73) +#define TDR12 (*(volatile __near unsigned short *)0xFF74) +#define TDR13 (*(volatile __near unsigned short *)0xFF76) +#define TDR13L (*(volatile __near unsigned char *)0xFF76) +#define TDR13H (*(volatile __near unsigned char *)0xFF77) +#define TDR14 (*(volatile __near unsigned short *)0xFF78) +#define TDR15 (*(volatile __near unsigned short *)0xFF7A) +#define TDR16 (*(volatile __near unsigned short *)0xFF7C) +#define TDR17 (*(volatile __near unsigned short *)0xFF7E) +#define SEC (*(volatile __near unsigned char *)0xFF92) +#define MIN (*(volatile __near unsigned char *)0xFF93) +#define HOUR (*(volatile __near unsigned char *)0xFF94) +#define WEEK (*(volatile __near unsigned char *)0xFF95) +#define DAY (*(volatile __near unsigned char *)0xFF96) +#define MONTH (*(volatile __near unsigned char *)0xFF97) +#define YEAR (*(volatile __near unsigned char *)0xFF98) +#define SUBCUD (*(volatile __near unsigned char *)0xFF99) +#define ALARMWM (*(volatile __near unsigned char *)0xFF9A) +#define ALARMWH (*(volatile __near unsigned char *)0xFF9B) +#define ALARMWW (*(volatile __near unsigned char *)0xFF9C) +#define RTCC0 (*(volatile __near unsigned char *)0xFF9D) +#define RTCC0_bit (*(volatile __near __bitf_T *)0xFF9D) +#define RCLOE1 (((volatile __near __bitf_T *)0xFF9D)->no5) +#define RTCE (((volatile __near __bitf_T *)0xFF9D)->no7) +#define RTCC1 (*(volatile __near unsigned char *)0xFF9E) +#define RTCC1_bit (*(volatile __near __bitf_T *)0xFF9E) +#define RWAIT (((volatile __near __bitf_T *)0xFF9E)->no0) +#define RWST (((volatile __near __bitf_T *)0xFF9E)->no1) +#define RIFG (((volatile __near __bitf_T *)0xFF9E)->no3) +#define WAFG (((volatile __near __bitf_T *)0xFF9E)->no4) +#define WALIE (((volatile __near __bitf_T *)0xFF9E)->no6) +#define WALE (((volatile __near __bitf_T *)0xFF9E)->no7) +#define CMC (*(volatile __near unsigned char *)0xFFA0) +#define CSC (*(volatile __near unsigned char *)0xFFA1) +#define CSC_bit (*(volatile __near __bitf_T *)0xFFA1) +#define HIOSTOP (((volatile __near __bitf_T *)0xFFA1)->no0) +#define XTSTOP (((volatile __near __bitf_T *)0xFFA1)->no6) +#define MSTOP (((volatile __near __bitf_T *)0xFFA1)->no7) +#define OSTC (*(volatile __near unsigned char *)0xFFA2) +#define OSTC_bit (*(volatile __near __bitf_T *)0xFFA2) +#define OSTS (*(volatile __near unsigned char *)0xFFA3) +#define CKC (*(volatile __near unsigned char *)0xFFA4) +#define CKC_bit (*(volatile __near __bitf_T *)0xFFA4) +#define MCM0 (((volatile __near __bitf_T *)0xFFA4)->no4) +#define MCS (((volatile __near __bitf_T *)0xFFA4)->no5) +#define CSS (((volatile __near __bitf_T *)0xFFA4)->no6) +#define CLS (((volatile __near __bitf_T *)0xFFA4)->no7) +#define CKS0 (*(volatile __near unsigned char *)0xFFA5) +#define CKS0_bit (*(volatile __near __bitf_T *)0xFFA5) +#define PCLOE0 (((volatile __near __bitf_T *)0xFFA5)->no7) +#define RESF (*(volatile __near unsigned char *)0xFFA8) +#define LVIM (*(volatile __near unsigned char *)0xFFA9) +#define LVIM_bit (*(volatile __near __bitf_T *)0xFFA9) +#define LVIF (((volatile __near __bitf_T *)0xFFA9)->no0) +#define LVIOMSK (((volatile __near __bitf_T *)0xFFA9)->no1) +#define LVISEN (((volatile __near __bitf_T *)0xFFA9)->no7) +#define LVIS (*(volatile __near unsigned char *)0xFFAA) +#define LVIS_bit (*(volatile __near __bitf_T *)0xFFAA) +#define LVILV (((volatile __near __bitf_T *)0xFFAA)->no0) +#define LVIMD (((volatile __near __bitf_T *)0xFFAA)->no7) +#define WDTE (*(volatile __near unsigned char *)0xFFAB) +#define CRCIN (*(volatile __near unsigned char *)0xFFAC) +#define IF2 (*(volatile __near unsigned short *)0xFFD0) +#define IF2L (*(volatile __near unsigned char *)0xFFD0) +#define IF2L_bit (*(volatile __near __bitf_T *)0xFFD0) +#define IF2H (*(volatile __near unsigned char *)0xFFD1) +#define IF2H_bit (*(volatile __near __bitf_T *)0xFFD1) +#define TMIF05 (((volatile __near __bitf_T *)0xFFD0)->no0) +#define TMIF06 (((volatile __near __bitf_T *)0xFFD0)->no1) +#define TMIF07 (((volatile __near __bitf_T *)0xFFD0)->no2) +#define LIN0WUPIF (((volatile __near __bitf_T *)0xFFD0)->no3) +#define PIF11 (((volatile __near __bitf_T *)0xFFD0)->no3) +#define KRIF (((volatile __near __bitf_T *)0xFFD0)->no4) +#define CAN0ERRIF (((volatile __near __bitf_T *)0xFFD0)->no5) +#define CAN0WUPIF (((volatile __near __bitf_T *)0xFFD0)->no6) +#define CAN0CFRIF (((volatile __near __bitf_T *)0xFFD0)->no7) +#define CAN0TRMIF (((volatile __near __bitf_T *)0xFFD1)->no0) +#define CANGRFRIF (((volatile __near __bitf_T *)0xFFD1)->no1) +#define CANGERRIF (((volatile __near __bitf_T *)0xFFD1)->no2) +#define TMIF10 (((volatile __near __bitf_T *)0xFFD1)->no3) +#define TMIF11 (((volatile __near __bitf_T *)0xFFD1)->no4) +#define TMIF12 (((volatile __near __bitf_T *)0xFFD1)->no5) +#define TMIF13 (((volatile __near __bitf_T *)0xFFD1)->no6) +#define FLIF (((volatile __near __bitf_T *)0xFFD1)->no7) +#define IF3L (*(volatile __near unsigned char *)0xFFD2) +#define IF3L_bit (*(volatile __near __bitf_T *)0xFFD2) +#define LIN1WUPIF (((volatile __near __bitf_T *)0xFFD2)->no0) +#define PIF12 (((volatile __near __bitf_T *)0xFFD2)->no0) +#define LIN1TRMIF (((volatile __near __bitf_T *)0xFFD2)->no1) +#define LIN1RVCIF (((volatile __near __bitf_T *)0xFFD2)->no2) +#define LIN1IF (((volatile __near __bitf_T *)0xFFD2)->no3) +#define LIN1STAIF (((volatile __near __bitf_T *)0xFFD2)->no3) +#define TMIF14 (((volatile __near __bitf_T *)0xFFD2)->no4) +#define TMIF15 (((volatile __near __bitf_T *)0xFFD2)->no5) +#define TMIF16 (((volatile __near __bitf_T *)0xFFD2)->no6) +#define TMIF17 (((volatile __near __bitf_T *)0xFFD2)->no7) +#define MK2 (*(volatile __near unsigned short *)0xFFD4) +#define MK2L (*(volatile __near unsigned char *)0xFFD4) +#define MK2L_bit (*(volatile __near __bitf_T *)0xFFD4) +#define MK2H (*(volatile __near unsigned char *)0xFFD5) +#define MK2H_bit (*(volatile __near __bitf_T *)0xFFD5) +#define TMMK05 (((volatile __near __bitf_T *)0xFFD4)->no0) +#define TMMK06 (((volatile __near __bitf_T *)0xFFD4)->no1) +#define TMMK07 (((volatile __near __bitf_T *)0xFFD4)->no2) +#define LIN0WUPMK (((volatile __near __bitf_T *)0xFFD4)->no3) +#define PMK11 (((volatile __near __bitf_T *)0xFFD4)->no3) +#define KRMK (((volatile __near __bitf_T *)0xFFD4)->no4) +#define CAN0ERRMK (((volatile __near __bitf_T *)0xFFD4)->no5) +#define CAN0WUPMK (((volatile __near __bitf_T *)0xFFD4)->no6) +#define CAN0CFRMK (((volatile __near __bitf_T *)0xFFD4)->no7) +#define CAN0TRMMK (((volatile __near __bitf_T *)0xFFD5)->no0) +#define CANGRFRMK (((volatile __near __bitf_T *)0xFFD5)->no1) +#define CANGERRMK (((volatile __near __bitf_T *)0xFFD5)->no2) +#define TMMK10 (((volatile __near __bitf_T *)0xFFD5)->no3) +#define TMMK11 (((volatile __near __bitf_T *)0xFFD5)->no4) +#define TMMK12 (((volatile __near __bitf_T *)0xFFD5)->no5) +#define TMMK13 (((volatile __near __bitf_T *)0xFFD5)->no6) +#define FLMK (((volatile __near __bitf_T *)0xFFD5)->no7) +#define MK3L (*(volatile __near unsigned char *)0xFFD6) +#define MK3L_bit (*(volatile __near __bitf_T *)0xFFD6) +#define LIN1WUPMK (((volatile __near __bitf_T *)0xFFD6)->no0) +#define PMK12 (((volatile __near __bitf_T *)0xFFD6)->no0) +#define LIN1TRMMK (((volatile __near __bitf_T *)0xFFD6)->no1) +#define LIN1RVCMK (((volatile __near __bitf_T *)0xFFD6)->no2) +#define LIN1MK (((volatile __near __bitf_T *)0xFFD6)->no3) +#define LIN1STAMK (((volatile __near __bitf_T *)0xFFD6)->no3) +#define TMMK14 (((volatile __near __bitf_T *)0xFFD6)->no4) +#define TMMK15 (((volatile __near __bitf_T *)0xFFD6)->no5) +#define TMMK16 (((volatile __near __bitf_T *)0xFFD6)->no6) +#define TMMK17 (((volatile __near __bitf_T *)0xFFD6)->no7) +#define PR02 (*(volatile __near unsigned short *)0xFFD8) +#define PR02L (*(volatile __near unsigned char *)0xFFD8) +#define PR02L_bit (*(volatile __near __bitf_T *)0xFFD8) +#define PR02H (*(volatile __near unsigned char *)0xFFD9) +#define PR02H_bit (*(volatile __near __bitf_T *)0xFFD9) +#define TMPR005 (((volatile __near __bitf_T *)0xFFD8)->no0) +#define TMPR006 (((volatile __near __bitf_T *)0xFFD8)->no1) +#define TMPR007 (((volatile __near __bitf_T *)0xFFD8)->no2) +#define LIN0WUPPR0 (((volatile __near __bitf_T *)0xFFD8)->no3) +#define PPR011 (((volatile __near __bitf_T *)0xFFD8)->no3) +#define KRPR0 (((volatile __near __bitf_T *)0xFFD8)->no4) +#define CAN0ERRPR0 (((volatile __near __bitf_T *)0xFFD8)->no5) +#define CAN0WUPPR0 (((volatile __near __bitf_T *)0xFFD8)->no6) +#define CAN0CFRPR0 (((volatile __near __bitf_T *)0xFFD8)->no7) +#define CAN0TRMPR0 (((volatile __near __bitf_T *)0xFFD9)->no0) +#define CANGRFRPR0 (((volatile __near __bitf_T *)0xFFD9)->no1) +#define CANGERRPR0 (((volatile __near __bitf_T *)0xFFD9)->no2) +#define TMPR010 (((volatile __near __bitf_T *)0xFFD9)->no3) +#define TMPR011 (((volatile __near __bitf_T *)0xFFD9)->no4) +#define TMPR012 (((volatile __near __bitf_T *)0xFFD9)->no5) +#define TMPR013 (((volatile __near __bitf_T *)0xFFD9)->no6) +#define FLPR0 (((volatile __near __bitf_T *)0xFFD9)->no7) +#define PR03L (*(volatile __near unsigned char *)0xFFDA) +#define PR03L_bit (*(volatile __near __bitf_T *)0xFFDA) +#define LIN1WUPPR0 (((volatile __near __bitf_T *)0xFFDA)->no0) +#define PPR012 (((volatile __near __bitf_T *)0xFFDA)->no0) +#define LIN1TRMPR0 (((volatile __near __bitf_T *)0xFFDA)->no1) +#define LIN1RVCPR0 (((volatile __near __bitf_T *)0xFFDA)->no2) +#define LIN1PR0 (((volatile __near __bitf_T *)0xFFDA)->no3) +#define LIN1STAPR0 (((volatile __near __bitf_T *)0xFFDA)->no3) +#define TMPR014 (((volatile __near __bitf_T *)0xFFDA)->no4) +#define TMPR015 (((volatile __near __bitf_T *)0xFFDA)->no5) +#define TMPR016 (((volatile __near __bitf_T *)0xFFDA)->no6) +#define TMPR017 (((volatile __near __bitf_T *)0xFFDA)->no7) +#define PR12 (*(volatile __near unsigned short *)0xFFDC) +#define PR12L (*(volatile __near unsigned char *)0xFFDC) +#define PR12L_bit (*(volatile __near __bitf_T *)0xFFDC) +#define PR12H (*(volatile __near unsigned char *)0xFFDD) +#define PR12H_bit (*(volatile __near __bitf_T *)0xFFDD) +#define TMPR105 (((volatile __near __bitf_T *)0xFFDC)->no0) +#define TMPR106 (((volatile __near __bitf_T *)0xFFDC)->no1) +#define TMPR107 (((volatile __near __bitf_T *)0xFFDC)->no2) +#define LIN0WUPPR1 (((volatile __near __bitf_T *)0xFFDC)->no3) +#define PPR111 (((volatile __near __bitf_T *)0xFFDC)->no3) +#define KRPR1 (((volatile __near __bitf_T *)0xFFDC)->no4) +#define CAN0ERRPR1 (((volatile __near __bitf_T *)0xFFDC)->no5) +#define CAN0WUPPR1 (((volatile __near __bitf_T *)0xFFDC)->no6) +#define CAN0CFRPR1 (((volatile __near __bitf_T *)0xFFDC)->no7) +#define CAN0TRMPR1 (((volatile __near __bitf_T *)0xFFDD)->no0) +#define CANGRFRPR1 (((volatile __near __bitf_T *)0xFFDD)->no1) +#define CANGERRPR1 (((volatile __near __bitf_T *)0xFFDD)->no2) +#define TMPR110 (((volatile __near __bitf_T *)0xFFDD)->no3) +#define TMPR111 (((volatile __near __bitf_T *)0xFFDD)->no4) +#define TMPR112 (((volatile __near __bitf_T *)0xFFDD)->no5) +#define TMPR113 (((volatile __near __bitf_T *)0xFFDD)->no6) +#define FLPR1 (((volatile __near __bitf_T *)0xFFDD)->no7) +#define PR13L (*(volatile __near unsigned char *)0xFFDE) +#define PR13L_bit (*(volatile __near __bitf_T *)0xFFDE) +#define LIN1WUPPR1 (((volatile __near __bitf_T *)0xFFDE)->no0) +#define PPR112 (((volatile __near __bitf_T *)0xFFDE)->no0) +#define LIN1TRMPR1 (((volatile __near __bitf_T *)0xFFDE)->no1) +#define LIN1RVCPR1 (((volatile __near __bitf_T *)0xFFDE)->no2) +#define LIN1PR1 (((volatile __near __bitf_T *)0xFFDE)->no3) +#define LIN1STAPR1 (((volatile __near __bitf_T *)0xFFDE)->no3) +#define TMPR114 (((volatile __near __bitf_T *)0xFFDE)->no4) +#define TMPR115 (((volatile __near __bitf_T *)0xFFDE)->no5) +#define TMPR116 (((volatile __near __bitf_T *)0xFFDE)->no6) +#define TMPR117 (((volatile __near __bitf_T *)0xFFDE)->no7) +#define IF0 (*(volatile __near unsigned short *)0xFFE0) +#define IF0L (*(volatile __near unsigned char *)0xFFE0) +#define IF0L_bit (*(volatile __near __bitf_T *)0xFFE0) +#define IF0H (*(volatile __near unsigned char *)0xFFE1) +#define IF0H_bit (*(volatile __near __bitf_T *)0xFFE1) +#define WDTIIF (((volatile __near __bitf_T *)0xFFE0)->no0) +#define LVIIF (((volatile __near __bitf_T *)0xFFE0)->no1) +#define PIF0 (((volatile __near __bitf_T *)0xFFE0)->no2) +#define PIF1 (((volatile __near __bitf_T *)0xFFE0)->no3) +#define PIF2 (((volatile __near __bitf_T *)0xFFE0)->no4) +#define PIF3 (((volatile __near __bitf_T *)0xFFE0)->no5) +#define PIF4 (((volatile __near __bitf_T *)0xFFE0)->no6) +#define SPMIF (((volatile __near __bitf_T *)0xFFE0)->no6) +#define CMPIF0 (((volatile __near __bitf_T *)0xFFE0)->no7) +#define PIF5 (((volatile __near __bitf_T *)0xFFE0)->no7) +#define CLMIF (((volatile __near __bitf_T *)0xFFE1)->no0) +#define PIF13 (((volatile __near __bitf_T *)0xFFE1)->no0) +#define CSIIF00 (((volatile __near __bitf_T *)0xFFE1)->no1) +#define IICIF00 (((volatile __near __bitf_T *)0xFFE1)->no1) +#define STIF0 (((volatile __near __bitf_T *)0xFFE1)->no1) +#define CSIIF01 (((volatile __near __bitf_T *)0xFFE1)->no2) +#define IICIF01 (((volatile __near __bitf_T *)0xFFE1)->no2) +#define SRIF0 (((volatile __near __bitf_T *)0xFFE1)->no2) +#define TRDIF0 (((volatile __near __bitf_T *)0xFFE1)->no3) +#define TRDIF1 (((volatile __near __bitf_T *)0xFFE1)->no4) +#define TRJIF0 (((volatile __near __bitf_T *)0xFFE1)->no5) +#define RAMIF (((volatile __near __bitf_T *)0xFFE1)->no6) +#define LIN0TRMIF (((volatile __near __bitf_T *)0xFFE1)->no7) +#define IF1 (*(volatile __near unsigned short *)0xFFE2) +#define IF1L (*(volatile __near unsigned char *)0xFFE2) +#define IF1L_bit (*(volatile __near __bitf_T *)0xFFE2) +#define IF1H (*(volatile __near unsigned char *)0xFFE3) +#define IF1H_bit (*(volatile __near __bitf_T *)0xFFE3) +#define LIN0RVCIF (((volatile __near __bitf_T *)0xFFE2)->no0) +#define LIN0IF (((volatile __near __bitf_T *)0xFFE2)->no1) +#define LIN0STAIF (((volatile __near __bitf_T *)0xFFE2)->no1) +#define IICAIF0 (((volatile __near __bitf_T *)0xFFE2)->no2) +#define PIF8 (((volatile __near __bitf_T *)0xFFE2)->no3) +#define RTCIF (((volatile __near __bitf_T *)0xFFE2)->no3) +#define TMIF00 (((volatile __near __bitf_T *)0xFFE2)->no4) +#define TMIF01 (((volatile __near __bitf_T *)0xFFE2)->no5) +#define TMIF02 (((volatile __near __bitf_T *)0xFFE2)->no6) +#define TMIF03 (((volatile __near __bitf_T *)0xFFE2)->no7) +#define ADIF (((volatile __near __bitf_T *)0xFFE3)->no0) +#define PIF6 (((volatile __near __bitf_T *)0xFFE3)->no1) +#define TMIF11H (((volatile __near __bitf_T *)0xFFE3)->no1) +#define PIF7 (((volatile __near __bitf_T *)0xFFE3)->no2) +#define TMIF13H (((volatile __near __bitf_T *)0xFFE3)->no2) +#define PIF9 (((volatile __near __bitf_T *)0xFFE3)->no3) +#define TMIF01H (((volatile __near __bitf_T *)0xFFE3)->no3) +#define PIF10 (((volatile __near __bitf_T *)0xFFE3)->no4) +#define TMIF03H (((volatile __near __bitf_T *)0xFFE3)->no4) +#define CSIIF10 (((volatile __near __bitf_T *)0xFFE3)->no5) +#define IICIF10 (((volatile __near __bitf_T *)0xFFE3)->no5) +#define STIF1 (((volatile __near __bitf_T *)0xFFE3)->no5) +#define CSIIF11 (((volatile __near __bitf_T *)0xFFE3)->no6) +#define IICIF11 (((volatile __near __bitf_T *)0xFFE3)->no6) +#define SRIF1 (((volatile __near __bitf_T *)0xFFE3)->no6) +#define TMIF04 (((volatile __near __bitf_T *)0xFFE3)->no7) +#define MK0 (*(volatile __near unsigned short *)0xFFE4) +#define MK0L (*(volatile __near unsigned char *)0xFFE4) +#define MK0L_bit (*(volatile __near __bitf_T *)0xFFE4) +#define MK0H (*(volatile __near unsigned char *)0xFFE5) +#define MK0H_bit (*(volatile __near __bitf_T *)0xFFE5) +#define WDTIMK (((volatile __near __bitf_T *)0xFFE4)->no0) +#define LVIMK (((volatile __near __bitf_T *)0xFFE4)->no1) +#define PMK0 (((volatile __near __bitf_T *)0xFFE4)->no2) +#define PMK1 (((volatile __near __bitf_T *)0xFFE4)->no3) +#define PMK2 (((volatile __near __bitf_T *)0xFFE4)->no4) +#define PMK3 (((volatile __near __bitf_T *)0xFFE4)->no5) +#define PMK4 (((volatile __near __bitf_T *)0xFFE4)->no6) +#define SPMMK (((volatile __near __bitf_T *)0xFFE4)->no6) +#define CMPMK0 (((volatile __near __bitf_T *)0xFFE4)->no7) +#define PMK5 (((volatile __near __bitf_T *)0xFFE4)->no7) +#define CLMMK (((volatile __near __bitf_T *)0xFFE5)->no0) +#define PMK13 (((volatile __near __bitf_T *)0xFFE5)->no0) +#define CSIMK00 (((volatile __near __bitf_T *)0xFFE5)->no1) +#define IICMK00 (((volatile __near __bitf_T *)0xFFE5)->no1) +#define STMK0 (((volatile __near __bitf_T *)0xFFE5)->no1) +#define CSIMK01 (((volatile __near __bitf_T *)0xFFE5)->no2) +#define IICMK01 (((volatile __near __bitf_T *)0xFFE5)->no2) +#define SRMK0 (((volatile __near __bitf_T *)0xFFE5)->no2) +#define TRDMK0 (((volatile __near __bitf_T *)0xFFE5)->no3) +#define TRDMK1 (((volatile __near __bitf_T *)0xFFE5)->no4) +#define TRJMK0 (((volatile __near __bitf_T *)0xFFE5)->no5) +#define RAMMK (((volatile __near __bitf_T *)0xFFE5)->no6) +#define LIN0TRMMK (((volatile __near __bitf_T *)0xFFE5)->no7) +#define MK1 (*(volatile __near unsigned short *)0xFFE6) +#define MK1L (*(volatile __near unsigned char *)0xFFE6) +#define MK1L_bit (*(volatile __near __bitf_T *)0xFFE6) +#define MK1H (*(volatile __near unsigned char *)0xFFE7) +#define MK1H_bit (*(volatile __near __bitf_T *)0xFFE7) +#define LIN0RVCMK (((volatile __near __bitf_T *)0xFFE6)->no0) +#define LIN0MK (((volatile __near __bitf_T *)0xFFE6)->no1) +#define LIN0STAMK (((volatile __near __bitf_T *)0xFFE6)->no1) +#define IICAMK0 (((volatile __near __bitf_T *)0xFFE6)->no2) +#define PMK8 (((volatile __near __bitf_T *)0xFFE6)->no3) +#define RTCMK (((volatile __near __bitf_T *)0xFFE6)->no3) +#define TMMK00 (((volatile __near __bitf_T *)0xFFE6)->no4) +#define TMMK01 (((volatile __near __bitf_T *)0xFFE6)->no5) +#define TMMK02 (((volatile __near __bitf_T *)0xFFE6)->no6) +#define TMMK03 (((volatile __near __bitf_T *)0xFFE6)->no7) +#define ADMK (((volatile __near __bitf_T *)0xFFE7)->no0) +#define PMK6 (((volatile __near __bitf_T *)0xFFE7)->no1) +#define TMMK11H (((volatile __near __bitf_T *)0xFFE7)->no1) +#define PMK7 (((volatile __near __bitf_T *)0xFFE7)->no2) +#define TMMK13H (((volatile __near __bitf_T *)0xFFE7)->no2) +#define PMK9 (((volatile __near __bitf_T *)0xFFE7)->no3) +#define TMMK01H (((volatile __near __bitf_T *)0xFFE7)->no3) +#define PMK10 (((volatile __near __bitf_T *)0xFFE7)->no4) +#define TMMK03H (((volatile __near __bitf_T *)0xFFE7)->no4) +#define CSIMK10 (((volatile __near __bitf_T *)0xFFE7)->no5) +#define IICMK10 (((volatile __near __bitf_T *)0xFFE7)->no5) +#define STMK1 (((volatile __near __bitf_T *)0xFFE7)->no5) +#define CSIMK11 (((volatile __near __bitf_T *)0xFFE7)->no6) +#define IICMK11 (((volatile __near __bitf_T *)0xFFE7)->no6) +#define SRMK1 (((volatile __near __bitf_T *)0xFFE7)->no6) +#define TMMK04 (((volatile __near __bitf_T *)0xFFE7)->no7) +#define PR00 (*(volatile __near unsigned short *)0xFFE8) +#define PR00L (*(volatile __near unsigned char *)0xFFE8) +#define PR00L_bit (*(volatile __near __bitf_T *)0xFFE8) +#define PR00H (*(volatile __near unsigned char *)0xFFE9) +#define PR00H_bit (*(volatile __near __bitf_T *)0xFFE9) +#define WDTIPR0 (((volatile __near __bitf_T *)0xFFE8)->no0) +#define LVIPR0 (((volatile __near __bitf_T *)0xFFE8)->no1) +#define PPR00 (((volatile __near __bitf_T *)0xFFE8)->no2) +#define PPR01 (((volatile __near __bitf_T *)0xFFE8)->no3) +#define PPR02 (((volatile __near __bitf_T *)0xFFE8)->no4) +#define PPR03 (((volatile __near __bitf_T *)0xFFE8)->no5) +#define PPR04 (((volatile __near __bitf_T *)0xFFE8)->no6) +#define SPMPR0 (((volatile __near __bitf_T *)0xFFE8)->no6) +#define CMPPR00 (((volatile __near __bitf_T *)0xFFE8)->no7) +#define PPR05 (((volatile __near __bitf_T *)0xFFE8)->no7) +#define CLMPR0 (((volatile __near __bitf_T *)0xFFE9)->no0) +#define PPR013 (((volatile __near __bitf_T *)0xFFE9)->no0) +#define CSIPR000 (((volatile __near __bitf_T *)0xFFE9)->no1) +#define IICPR000 (((volatile __near __bitf_T *)0xFFE9)->no1) +#define STPR00 (((volatile __near __bitf_T *)0xFFE9)->no1) +#define CSIPR001 (((volatile __near __bitf_T *)0xFFE9)->no2) +#define IICPR001 (((volatile __near __bitf_T *)0xFFE9)->no2) +#define SRPR00 (((volatile __near __bitf_T *)0xFFE9)->no2) +#define TRDPR00 (((volatile __near __bitf_T *)0xFFE9)->no3) +#define TRDPR01 (((volatile __near __bitf_T *)0xFFE9)->no4) +#define TRJPR00 (((volatile __near __bitf_T *)0xFFE9)->no5) +#define RAMPR0 (((volatile __near __bitf_T *)0xFFE9)->no6) +#define LIN0TRMPR0 (((volatile __near __bitf_T *)0xFFE9)->no7) +#define PR01 (*(volatile __near unsigned short *)0xFFEA) +#define PR01L (*(volatile __near unsigned char *)0xFFEA) +#define PR01L_bit (*(volatile __near __bitf_T *)0xFFEA) +#define PR01H (*(volatile __near unsigned char *)0xFFEB) +#define PR01H_bit (*(volatile __near __bitf_T *)0xFFEB) +#define LIN0RVCPR0 (((volatile __near __bitf_T *)0xFFEA)->no0) +#define LIN0PR0 (((volatile __near __bitf_T *)0xFFEA)->no1) +#define LIN0STAPR0 (((volatile __near __bitf_T *)0xFFEA)->no1) +#define IICAPR00 (((volatile __near __bitf_T *)0xFFEA)->no2) +#define PPR08 (((volatile __near __bitf_T *)0xFFEA)->no3) +#define RTCPR0 (((volatile __near __bitf_T *)0xFFEA)->no3) +#define TMPR000 (((volatile __near __bitf_T *)0xFFEA)->no4) +#define TMPR001 (((volatile __near __bitf_T *)0xFFEA)->no5) +#define TMPR002 (((volatile __near __bitf_T *)0xFFEA)->no6) +#define TMPR003 (((volatile __near __bitf_T *)0xFFEA)->no7) +#define ADPR0 (((volatile __near __bitf_T *)0xFFEB)->no0) +#define PPR06 (((volatile __near __bitf_T *)0xFFEB)->no1) +#define TMPR011H (((volatile __near __bitf_T *)0xFFEB)->no1) +#define PPR07 (((volatile __near __bitf_T *)0xFFEB)->no2) +#define TMPR013H (((volatile __near __bitf_T *)0xFFEB)->no2) +#define PPR09 (((volatile __near __bitf_T *)0xFFEB)->no3) +#define TMPR001H (((volatile __near __bitf_T *)0xFFEB)->no3) +#define PPR010 (((volatile __near __bitf_T *)0xFFEB)->no4) +#define TMPR003H (((volatile __near __bitf_T *)0xFFEB)->no4) +#define CSIPR010 (((volatile __near __bitf_T *)0xFFEB)->no5) +#define IICPR010 (((volatile __near __bitf_T *)0xFFEB)->no5) +#define STPR01 (((volatile __near __bitf_T *)0xFFEB)->no5) +#define CSIPR011 (((volatile __near __bitf_T *)0xFFEB)->no6) +#define IICPR011 (((volatile __near __bitf_T *)0xFFEB)->no6) +#define SRPR01 (((volatile __near __bitf_T *)0xFFEB)->no6) +#define TMPR004 (((volatile __near __bitf_T *)0xFFEB)->no7) +#define PR10 (*(volatile __near unsigned short *)0xFFEC) +#define PR10L (*(volatile __near unsigned char *)0xFFEC) +#define PR10L_bit (*(volatile __near __bitf_T *)0xFFEC) +#define PR10H (*(volatile __near unsigned char *)0xFFED) +#define PR10H_bit (*(volatile __near __bitf_T *)0xFFED) +#define WDTIPR1 (((volatile __near __bitf_T *)0xFFEC)->no0) +#define LVIPR1 (((volatile __near __bitf_T *)0xFFEC)->no1) +#define PPR10 (((volatile __near __bitf_T *)0xFFEC)->no2) +#define PPR11 (((volatile __near __bitf_T *)0xFFEC)->no3) +#define PPR12 (((volatile __near __bitf_T *)0xFFEC)->no4) +#define PPR13 (((volatile __near __bitf_T *)0xFFEC)->no5) +#define PPR14 (((volatile __near __bitf_T *)0xFFEC)->no6) +#define SPMPR1 (((volatile __near __bitf_T *)0xFFEC)->no6) +#define CMPPR10 (((volatile __near __bitf_T *)0xFFEC)->no7) +#define PPR15 (((volatile __near __bitf_T *)0xFFEC)->no7) +#define CLMPR1 (((volatile __near __bitf_T *)0xFFED)->no0) +#define PPR113 (((volatile __near __bitf_T *)0xFFED)->no0) +#define CSIPR100 (((volatile __near __bitf_T *)0xFFED)->no1) +#define IICPR100 (((volatile __near __bitf_T *)0xFFED)->no1) +#define STPR10 (((volatile __near __bitf_T *)0xFFED)->no1) +#define CSIPR101 (((volatile __near __bitf_T *)0xFFED)->no2) +#define IICPR101 (((volatile __near __bitf_T *)0xFFED)->no2) +#define SRPR10 (((volatile __near __bitf_T *)0xFFED)->no2) +#define TRDPR10 (((volatile __near __bitf_T *)0xFFED)->no3) +#define TRDPR11 (((volatile __near __bitf_T *)0xFFED)->no4) +#define TRJPR10 (((volatile __near __bitf_T *)0xFFED)->no5) +#define RAMPR1 (((volatile __near __bitf_T *)0xFFED)->no6) +#define LIN0TRMPR1 (((volatile __near __bitf_T *)0xFFED)->no7) +#define PR11 (*(volatile __near unsigned short *)0xFFEE) +#define PR11L (*(volatile __near unsigned char *)0xFFEE) +#define PR11L_bit (*(volatile __near __bitf_T *)0xFFEE) +#define PR11H (*(volatile __near unsigned char *)0xFFEF) +#define PR11H_bit (*(volatile __near __bitf_T *)0xFFEF) +#define LIN0RVCPR1 (((volatile __near __bitf_T *)0xFFEE)->no0) +#define LIN0PR1 (((volatile __near __bitf_T *)0xFFEE)->no1) +#define LIN0STAPR1 (((volatile __near __bitf_T *)0xFFEE)->no1) +#define IICAPR10 (((volatile __near __bitf_T *)0xFFEE)->no2) +#define PPR18 (((volatile __near __bitf_T *)0xFFEE)->no3) +#define RTCPR1 (((volatile __near __bitf_T *)0xFFEE)->no3) +#define TMPR100 (((volatile __near __bitf_T *)0xFFEE)->no4) +#define TMPR101 (((volatile __near __bitf_T *)0xFFEE)->no5) +#define TMPR102 (((volatile __near __bitf_T *)0xFFEE)->no6) +#define TMPR103 (((volatile __near __bitf_T *)0xFFEE)->no7) +#define ADPR1 (((volatile __near __bitf_T *)0xFFEF)->no0) +#define PPR16 (((volatile __near __bitf_T *)0xFFEF)->no1) +#define TMPR111H (((volatile __near __bitf_T *)0xFFEF)->no1) +#define PPR17 (((volatile __near __bitf_T *)0xFFEF)->no2) +#define TMPR113H (((volatile __near __bitf_T *)0xFFEF)->no2) +#define PPR19 (((volatile __near __bitf_T *)0xFFEF)->no3) +#define TMPR101H (((volatile __near __bitf_T *)0xFFEF)->no3) +#define PPR110 (((volatile __near __bitf_T *)0xFFEF)->no4) +#define TMPR103H (((volatile __near __bitf_T *)0xFFEF)->no4) +#define CSIPR110 (((volatile __near __bitf_T *)0xFFEF)->no5) +#define IICPR110 (((volatile __near __bitf_T *)0xFFEF)->no5) +#define STPR11 (((volatile __near __bitf_T *)0xFFEF)->no5) +#define CSIPR111 (((volatile __near __bitf_T *)0xFFEF)->no6) +#define IICPR111 (((volatile __near __bitf_T *)0xFFEF)->no6) +#define SRPR11 (((volatile __near __bitf_T *)0xFFEF)->no6) +#define TMPR104 (((volatile __near __bitf_T *)0xFFEF)->no7) +#define MACRL (*(volatile __near unsigned short *)0xFFF0) +#define MACRH (*(volatile __near unsigned short *)0xFFF2) +#define PMC (*(volatile __near unsigned char *)0xFFFE) +#define PMC_bit (*(volatile __near __bitf_T *)0xFFFE) +#define MAA (((volatile __near __bitf_T *)0xFFFE)->no0) + + +#define INTSRO 0x0004 +#define INTWDTI 0x0004 +#define INTLVI 0x0006 +#define INTP0 0x0008 +#define INTP1 0x000A +#define INTP2 0x000C +#define INTP3 0x000E +#define INTP4 0x0010 +#define INTSPM 0x0010 +#define INTCMP0 0x0012 +#define INTP5 0x0012 +#define INTCLM 0x0014 +#define INTP13 0x0014 +#define INTCSI00 0x0016 +#define INTIIC00 0x0016 +#define INTST0 0x0016 +#define INTCSI01 0x0018 +#define INTIIC01 0x0018 +#define INTSR0 0x0018 +#define INTTRD0 0x001A +#define INTTRD1 0x001C +#define INTTRJ0 0x001E +#define INTRAM 0x0020 +#define INTLIN0TRM 0x0022 +#define INTLIN0RVC 0x0024 +#define INTLIN0 0x0026 +#define INTLIN0STA 0x0026 +#define INTIICA0 0x0028 +#define INTP8 0x002A +#define INTRTC 0x002A +#define INTTM00 0x002C +#define INTTM01 0x002E +#define INTTM02 0x0030 +#define INTTM03 0x0032 +#define INTAD 0x0034 +#define INTP6 0x0036 +#define INTTM11H 0x0036 +#define INTP7 0x0038 +#define INTTM13H 0x0038 +#define INTP9 0x003A +#define INTTM01H 0x003A +#define INTP10 0x003C +#define INTTM03H 0x003C +#define INTCSI10 0x003E +#define INTIIC10 0x003E +#define INTST1 0x003E +#define INTCSI11 0x0040 +#define INTIIC11 0x0040 +#define INTSR1 0x0040 +#define INTTM04 0x0042 +#define INTTM05 0x0044 +#define INTTM06 0x0046 +#define INTTM07 0x0048 +#define INTLIN0WUP 0x004A +#define INTP11 0x004A +#define INTKR 0x004C +#define INTCAN0ERR 0x004E +#define INTCAN0WUP 0x0050 +#define INTCAN0CFR 0x0052 +#define INTCAN0TRM 0x0054 +#define INTCANGRFR 0x0056 +#define INTCANGERR 0x0058 +#define INTTM10 0x005A +#define INTTM11 0x005C +#define INTTM12 0x005E +#define INTTM13 0x0060 +#define INTFL 0x0062 +#define INTLIN1WUP 0x0064 +#define INTP12 0x0064 +#define INTLIN1TRM 0x0066 +#define INTLIN1RVC 0x0068 +#define INTLIN1 0x006A +#define INTLIN1STA 0x006A +#define INTTM14 0x006C +#define INTTM15 0x006E +#define INTTM16 0x0070 +#define INTTM17 0x0072 + +#endif diff --git a/main.c b/main.c new file mode 100644 index 0000000..2a524b3 --- /dev/null +++ b/main.c @@ -0,0 +1,35 @@ +/********************************************************************************************************************** + * DISCLAIMER + * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No + * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all + * applicable laws, including copyright laws. + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING + * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM + * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES + * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO + * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of + * this software. By using this software, you agree to the additional terms and conditions found by accessing the + * following link: + * http://www.renesas.com/disclaimer + * + * Copyright (C) 2020-2022 Renesas Electronics Corporation. All rights reserved. + *********************************************************************************************************************/ +/***********************************************************************/ +/* */ +/* FILE :Main.c or Main.cpp */ +/* DATE : */ +/* DESCRIPTION :Main Program */ +/* CPU TYPE : */ +/* */ +/* NOTE:THIS IS A TYPICAL EXAMPLE. */ +/* */ +/***********************************************************************/ + +void main(void); + +void main(void) +{ + +} diff --git a/multical.mtpj b/multical.mtpj new file mode 100644 index 0000000..886a60e --- /dev/null +++ b/multical.mtpj @@ -0,0 +1,3364 @@ + + 9.13.00.00 + + + 2.0 + 9.13 + e43944ef-567b-4ad3-b22b-f86ceb1f6bf5 + f7cb3835-78e5-4404-aa52-899f930b4cea + a679a670-3999-44a1-af72-43f34fab5a94 + fb98844b-2c27-4275-9804-f6e63e204da0 + e43944ef-567b-4ad3-b22b-f86ceb1f6bf5 + + + cstart.asm + File + cstart.asm + f654126d-e7ad-426d-be34-8455271d959b + a679a670-3999-44a1-af72-43f34fab5a94 + + + hdwinit.asm + File + hdwinit.asm + f654126d-e7ad-426d-be34-8455271d959b + a679a670-3999-44a1-af72-43f34fab5a94 + + + stkinit.asm + File + stkinit.asm + f654126d-e7ad-426d-be34-8455271d959b + a679a670-3999-44a1-af72-43f34fab5a94 + + + main.c + File + main.c + 941832c1-fc3b-4e1b-94e8-01ea17128b42 + a679a670-3999-44a1-af72-43f34fab5a94 + + + iodefine.h + File + iodefine.h + 03cad1e8-2eb3-4cde-a8a3-982423631122 + a679a670-3999-44a1-af72-43f34fab5a94 + + + + + UserMtudFile + True + 0 + + + + + 7e0c5287-ef5f-48f3-976e-25ba00f1983b + 13263ec9-6a62-47f4-86ac-58d5c5f60ef7 + + + + + 90ee5797-fc0c-48ea-b02f-689179ce9df7 + + + + + 1.0 + + + R5F10PPJ + 0 + + + + + 1159186b-b838-4741-8324-8293bf3d5c5f + + + + + 1.6 + 1 + RABlAGYAYQB1AGwAdABCAHUAaQBsAGQA + False + DefaultBuild + e024cbcb-0137-4c76-a917-4d0510fa64c2 + AsmSource + ccf78b2f-c579-454b-b48a-9769b7729cba + AsmSource + 6abc5411-034e-44c1-a5f1-910361d4f1a8 + AsmSource + c41e39ce-c4a7-4c99-b95b-721a4360d267 + CSource + 4 + 0 + R5F10PPJ + 0 + + + + DefaultBuild + Default + S3 + + False + + Maa0 + + LoadModuleFile + False + True + LibraryU + + + %TargetFiles% + + + V1.05.00 +C:\Program Files (x86)\Renesas Electronics\CS+\CC\FAA\V1.05.00 +286972534849536 + + +0 + %TargetFiles% : %Program% %Options% + + False + True + %BuildModeName% + mda + Stype + %BuildModeName% + %BuildModeName% + 00000000000000000000 + False + + + %ProjectName%.err + False + %BuildModeName% + False + %BuildModeName% + %ProjectName%.lib + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + %ProjectName%.abs + + + Rebuild + Limit + %ProjectName%.mot + False + True + + + None + C90 + + + False + True + False + -8584334295856496784 + DefaultBuild + + %TargetFiles% + %TargetFiles% : %Program% %Options% + False + + + S3 + False + Maa0 + + LoadModuleFile + False + V1.05.00 +C:\Program Files (x86)\Renesas Electronics\CS+\CC\FAA\V1.05.00 +286972534849536 + + +0 + + False + True + %BuildModeName% + mda + 00000000000000000000 + %ProjectName%.err + False + %BuildModeName% + False + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + + Rebuild + Limit + + V1.15.00 + + + False + False + No + Auto + None + True + True + + None + -c + Auto + Misra2012 + False + Default + False + None + %BuildModeName% + + False + True + + None + + %BuildModeName% + None + False + Utf8 + Cpp14 + None + + None + False + + + False + None + + False + + FitToOptimization + + False + %BuildModeName% + + False + 100 + + False + + None + False + Auto + + None + False + False + None + None + False + False + + False + + False + False + + None + False + + None + False + False + + None + False + + + False + False + False + -8584334295856311683 + False + False + No + Auto + None + True + True + + None + -c + Auto + Misra2012 + False + Default + False + None + %BuildModeName% + + False + True + + None + + %BuildModeName% + None + False + Utf8 + Cpp14 + None + + None + False + + + False + None + + False + + FitToOptimization + + False + %BuildModeName% + + False + 100 + + False + + None + False + Auto + + None + False + False + None + None + False + False + + False + + False + False + + None + False + + None + False + False + + None + False + + + False + False + + + Auto + False + True + False + + -c + False + Prefix + + + %BuildModeName% + + + + + False + -8584334295856152080 + Auto + False + True + False + + -c + False + Prefix + + + %BuildModeName% + + + + + + + None + + + + + + + + False + -8584334295856112225 + None + + + + + + + + + + V2Core + + True + False + + + False + + + + + False + + False + False + False + Forward + False + -8584334295856092267 + V2Core + + True + False + + + False + + + + + False + + False + False + False + Forward + + + True + False + Debug + False + + + List + False + True + None + %BuildModeName% + False + False + + False + + + + %ProjectName%.map + False + + + False + %ProjectName%.abs + False + %BuildModeName% + False + + False + True + False + False + False + False + True + + False + %ProjectName%_vfi.h + None + False + + C90 + False + 1E + + False + + + + None + False + False + False + + .data=.dataR +.sdata=.sdataR + + False + + False + False + None + 3FE00-3FFFF + None + True + + True + + + + False + + True + + None + + False + + + + None + False + False + + None + False + None + False + + False + -8584334295856052372 + True + False + Debug + False + + + List + False + True + None + %BuildModeName% + False + False + + False + + + + %ProjectName%.map + False + + + False + %ProjectName%.abs + False + %BuildModeName% + False + + False + True + False + False + False + False + True + + False + %ProjectName%_vfi.h + None + False + + C90 + False + 1E + + False + + + + None + False + False + False + + .data=.dataR +.sdata=.sdataR + + False + + False + False + None + 3FE00-3FFFF + None + True + + True + + + + False + + True + + None + + False + + + + None + False + False + + None + False + None + False + + + + False + False + Stype + + True + True + + False + %BuildModeName% + None + + + %ProjectName%.mot + None + None + Msb + + None + + + + FF + None + Little + False + + 1 + None + + 1 + False + + False + FF + None + False + False + -8584334295855866914 + False + False + Stype + + True + True + + False + %BuildModeName% + None + + + %ProjectName%.mot + None + None + Msb + + None + + + + FF + None + Little + False + + 1 + None + + 1 + False + + False + FF + None + False + + + BuildOptionChanged + False + False + False + None + Default + %BuildModeName% + + False + FitToOptimization + %ProjectName%.lib + + False + CompilerOption + 100 + + False + None + False + All + None + True + False + False + None + False + None + False + None + False + False + False + False + False + False + -8584334295855797096 + BuildOptionChanged + False + False + False + None + Default + %BuildModeName% + + False + FitToOptimization + %ProjectName%.lib + + False + CompilerOption + 100 + + False + None + False + All + None + False + False + None + False + None + False + None + False + False + False + False + False + + + Debug + LibraryU + + + None + False + False + + False + + %ProjectName%.lbp + + %BuildModeName% + False + None + False + False + %ProjectName%.lib + True + + None + + False + None + False + + False + + False + + True + False + None + + False + -8584334295855737267 + Debug + LibraryU + + + None + False + False + + False + + %ProjectName%.lbp + + %BuildModeName% + False + None + False + False + %ProjectName%.lib + True + + None + + False + None + False + + False + + False + + True + False + None + + + + None + + DR5F10PPJ.DVF, V1.11 + DR5F10PPJ.DVF, V1.11 + True + False + False + False + True + False + -8584334295855667217 + None + + DR5F10PPJ.DVF, V1.11 + DR5F10PPJ.DVF, V1.11 + True + False + False + False + True + + + 0 + 639038065000330926 + 0 + + + 1 + 639038065000340930 + 0 + + + 2 + 639038065000340930 + 2 + + + 3 + 639038065000340930 + 1 + + + 639038065006130118 + 0 + + + -8584334295854395005 + False + True + False + -8584334295854375026 + False + True + False + -8584334295854375026 + False + True + False + + + -8584334295854375026 + False + True + False + + + + + False + 00000000-0000-0000-0000-000000000000 + + + + + C:\Users\temp\Desktop\multical\main.c + C:\Users\temp\Desktop\multical\cstart.asm + C:\Users\temp\Desktop\multical\hdwinit.asm + C:\Users\temp\Desktop\multical\stkinit.asm + C:\Users\temp\Desktop\multical\iodefine.h + + + + + 1.0 + 1.0 + + + + + 0700c2a3-bc6a-4793-8529-1ce3c7a4da9a + + + + + 0 + R5F10PPJ + 256 + 20480 + 4000 + 32768 + SelectCpuClockFrequency + MHz + 4000000 + No + + 1 + + True + e43944ef-567b-4ad3-b22b-f86ceb1f6bf5 + DefaultBuild\multical.abs + LoadModuleFile + Auto + 0 + 0 + True + True + False + False + 0 + 0 + 0 + True + True + False + SuspendEvent + True + XwBtAGEAaQBuAA== + 500 + False + True + + + No + 500 + Yes + 500 + No + No + Yes + Free + No + 4096 + No + No + No + False + Yes + Yes + False + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + 1164e6bc-1580-4c0c-8c62-cc92e5f3f701 + + + + + Yes + FB + + + Color [LightGray] + Color [Red] + Color [Green] + Color [Black] + Color [Blue] + Color [Red] + Color [Yellow] + Color [Green] + DisplayAll + Display + DisplayAll + + + -1,-1,-1,-1,-1 + False + 0 + + + + + 7d577131-4ec1-4e88-968d-89381f6c178a + + + + + 1.1 + + + False + False + False + True + Yes + Nanosecond + False + False + False + False + False + True + FilesNotToAnalyze + 0 + All + 0 + False + %ProjectName%.mtfl + %ProjectName%.mtvl + 10 + + + RealtimeSampling + + Synchronized + AtProgramStop + 20 + 1000000 + LineChart + False + PaleGreen + PaleTurquoise + 40ff0a4f + 405be416 + 40056def + 40ff541c + False + Auto + Channel01 + 0 + Rising + 0 + Orange + 10 + None + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + Auto + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 25.5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c0ff0a4f + c05be416 + c0056dff + c0ff541c + c04fc1ff + c0a932ff + c0ffd91c + c0ff30a5 + c0bee02f + c05510ff + c0ff97e4 + c0913a37 + c0c68e15 + c0317f0c + c060493e + c072808e + c0ff6666 + c0ffcc66 + c066cc66 + c06666ff + c0cc66ff + c0ff9900 + c000aa00 + c00000ff + c0cc00ff + c0ff0000 + c0006600 + c02222cc + c09900cc + c0990000 + c0004400 + c0663399 + + + + + cb4eebec-2381-4e77-8b34-fa8cd6f33b4c + + + + + <RL78F14> + <VAR> + <fCLK Name="fCLK" Value="32" Comment="4M" Trigger="fCLK"> + <Effect> + <ADC /> + <SAU0 /> + <SAU1 /> + <IICA0 /> + <TAU0 /> + <TAU1 /> + <TMRJ0 /> + <COMP /> + </Effect> + </fCLK> + <ISPullupForPort Name="ISPullupForPort" Text="false" Comment="unused" /> + <fHOCO Name="fHOCO" Value="64" Comment="64M" Trigger="fHOCO" /> + <fIH Name="fIH" Value="64" Comment="32M" /> + <fSUB Name="fSUB" Value="0" Comment="0K" Trigger="fSUB"> + <Effect> + <TAU0 /> + <TAU1 /> + <TMRJ0 /> + </Effect> + </fSUB> + <fIL Name="fIL" Value="15" Comment="15K" Trigger="fIL"> + <Effect> + <TMRJ0 /> + <WDT /> + <TAU0 /> + <TAU1 /> + </Effect> + </fIL> + <fSL Name="fSL" Value="15" Comment="15K" Trigger="fSL"> + <Effect> + <PCLBUZ0 /> + <TMRJ0 /> + <TAU0 /> + <TAU1 /> + </Effect> + </fSL> + <fPLL Name="fPLL" Value="24" Comment="24M" Trigger="fPLL" /> + <fRTC Name="fRTC" Value="524.590163934426" Comment="15k" Trigger="fRTC"> + <Effect> + <RTC /> + </Effect> + </fRTC> + <fTRD Name="fTRD" Value="64" Comment="64M" Trigger="fTRD"> + <Effect> + <TMRD0 /> + <TMRD1 /> + </Effect> + </fTRD> + <fMAIN Name="fMAIN" Value="64" Comment="32M" Trigger="fMAIN"> + <Effect> + <PCLBUZ0 /> + </Effect> + </fMAIN> + <fTRDSource Name="fTRDSource" Trigger="fTRD" Text="fIH" /> + <VDD_MIN Name="VDD_MIN" Value="4" Comment="4.0V" Trigger="VDD"> + <Effect> + <PCLBUZ0 /> + <IICA0 /> + <SAU0 /> + <SAU1 /> + </Effect> + </VDD_MIN> + <VDD_MAX Name="VDD_MAX" Value="5.5" Comment="5.5V" /> + <VDD Name="VDD" Text="false" Comment="used" /> + <VDDValue Name="VDDValue" Value="2.7" Comment="2.7V" Trigger="VDD"> + <Effect> + <ADC /> + </Effect> + </VDDValue> + <COMP_ADPC_USEDPIN Name="COMP_ADPC_USEDPIN" Text="false" /> + <DA_ADPC_USEDPIN Name="DA_ADPC_USEDPIN" Text="false" /> + <DA_INUSE Name="DA_INUSE" Text="false" /> + <AD_ADPC_USEDPIN Name="AD_ADPC_USEDPIN" Text="false" /> + <AD_ADS_USEDPIN Name="AD_ADS_USEDPIN" Text="false" /> + <ADPCForPort3 Name="ADPCForPort3" Value="255" Comment="ADPCForPort3" /> + <ADPCForPort8 Name="ADPCForPort8" Value="255" Comment="ADPCForPort8" /> + <ADPCForPort9 Name="ADPCForPort9" Value="255" Comment="ADPCForPort9" /> + <ADPCForKey Name="ADPCForKey" Value="255" Comment="ADPCForKey" /> + <OnChipDebugTraceDTC Name="GTraceRam" Text="2" Trigger="ocdtraceram"> + <Effect> + <DTC /> + </Effect> + </OnChipDebugTraceDTC> + <OnChipDebugTrace Name="GTrace" Text="2" /> + <OnChipDebugHotPlugDTC Name="GHotPlugRam" Text="2" Trigger="ocdhotplugram"> + <Effect> + <DTC /> + </Effect> + </OnChipDebugHotPlugDTC> + <KR0 Name="KR0" Text="false" Comment="unused" Trigger="KR0"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR0> + <KR1 Name="KR1" Text="false" Comment="unused" Trigger="KR1"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR1> + <KR2 Name="KR2" Text="false" Comment="unused" Trigger="KR2"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR2> + <KR3 Name="KR3" Text="false" Comment="unused" Trigger="KR3"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR3> + <KR4 Name="KR4" Text="false" Comment="unused" Trigger="KR4"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR4> + <KR5 Name="KR5" Text="false" Comment="unused" Trigger="KR5"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR5> + <KR6 Name="KR6" Text="false" Comment="unused" Trigger="KR6"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR6> + <KR7 Name="KR7" Text="false" Comment="unused" Trigger="KR7"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR7> + <OnChipDebugHotPlug Name="GHotPlug" Text="2" /> + <IIC00 Name="IIC00" Text="false" Comment="unused" Trigger="IIC00"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IIC00> + <IIC01 Name="IIC01" Text="false" Comment="unused" Trigger="IIC01"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IIC01> + <IIC10 Name="IIC10" Text="false" Comment="unused" Trigger="IIC10"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IIC10> + <IIC11 Name="IIC11" Text="false" Comment="unused" Trigger="IIC11"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IIC11> + <IICA0 Name="IICA0" Text="false" Comment="unused" Trigger="IICA0"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IICA0> + <PIOR00Value Name="PIOR00Value" Text="0" /> + <PIOR01Value Name="PIOR01Value" Text="0" /> + <PIOR02Value Name="PIOR02Value" Text="0" /> + <PIOR03Value Name="PIOR03Value" Text="0" /> + <PIOR04Value Name="PIOR04Value" Text="0" /> + <PIOR05Value Name="PIOR05Value" Text="0" /> + <PIOR06Value Name="PIOR06Value" Text="0" /> + <PIOR07Value Name="PIOR07Value" Text="0" /> + <PIOR10Value Name="PIOR10Value" Text="0" /> + <PIOR11Value Name="PIOR11Value" Text="0" /> + <PIOR12Value Name="PIOR12Value" Text="0" /> + <PIOR13Value Name="PIOR13Value" Text="0" /> + <PIOR14Value Name="PIOR14Value" Text="0" /> + <PIOR15Value Name="PIOR15Value" Text="0" /> + <PIOR16Value Name="PIOR16Value" Text="0" /> + <PIOR17Value Name="PIOR17Value" Text="0" /> + <PIOR20Value Name="PIOR20Value" Text="0" /> + <PIOR21Value Name="PIOR21Value" Text="0" /> + <PIOR22Value Name="PIOR22Value" Text="0" /> + <PIOR23Value Name="PIOR23Value" Text="0" /> + <PIOR24Value Name="PIOR24Value" Text="0" /> + <PIOR25Value Name="PIOR25Value" Text="0" /> + <PIOR26Value Name="PIOR26Value" Text="0" /> + <PIOR27Value Name="PIOR27Value" Text="0" /> + <PIOR30Value Name="PIOR30Value" Text="0" /> + <PIOR31Value Name="PIOR31Value" Text="0" /> + <PIOR32Value Name="PIOR32Value" Text="0" /> + <PIOR33Value Name="PIOR33Value" Text="0" /> + <PIOR34Value Name="PIOR34Value" Text="0" /> + <PIOR35Value Name="PIOR35Value" Text="0" /> + <PIOR36Value Name="PIOR36Value" Text="0" /> + <PIOR37Value Name="PIOR37Value" Text="0" /> + <PIOR40Value Name="PIOR40Value" Text="0" /> + <PIOR41Value Name="PIOR41Value" Text="0" /> + <PIOR42Value Name="PIOR42Value" Text="0" /> + <PIOR43Value Name="PIOR43Value" Text="0" /> + <PIOR44Value Name="PIOR44Value" Text="0" /> + <PIOR45Value Name="PIOR45Value" Text="0" /> + <PIOR46Value Name="PIOR46Value" Text="0" /> + <PIOR50Value Name="PIOR50Value" Text="0" /> + <PIOR52Value Name="PIOR52Value" Text="0" /> + <PIOR53Value Name="PIOR53Value" Text="0" /> + <PIOR60Value Name="PIOR60Value" Text="0" /> + <PIOR61Value Name="PIOR61Value" Text="0" /> + <PIOR62Value Name="PIOR62Value" Text="0" /> + <PIOR63Value Name="PIOR63Value" Text="0" /> + <PIOR64Value Name="PIOR64Value" Text="0" /> + <PIOR65Value Name="PIOR65Value" Text="0" /> + <PIOR66Value Name="PIOR66Value" Text="0" /> + <PIOR67Value Name="PIOR67Value" Text="0" /> + <PIOR70Value Name="PIOR70Value" Text="0" /> + <PIOR71Value Name="PIOR71Value" Text="0" /> + <PIOR73Value Name="PIOR73Value" Text="0" /> + <PIOR80Value Name="PIOR80Value" Text="0" /> + <ELC_TARGET0 Name="ELC_TARGET0" Text="disable" /> + <ELC_TARGET1 Name="ELC_TARGET1" Text="disable" /> + <ELC_TARGET2 Name="ELC_TARGET2" Text="disable" /> + <ELC_TARGET3 Name="ELC_TARGET3" Text="disable" /> + <ELC_TARGET4 Name="ELC_TARGET4" Text="disable" /> + <ELC_TARGET5 Name="ELC_TARGET5" Text="disable" /> + <ELC_TARGET6 Name="ELC_TARGET6" Text="disable" /> + <ELC_TARGET7 Name="ELC_TARGET7" Text="disable" /> + <ELC_TARGET8 Name="ELC_TARGET8" Text="disable" /> + <RTC1HZ Name="RTC1HZ" Text="disable" Trigger="RTC1HZ"> + <Effect> + <TAU0 /> + <TAU1 /> + </Effect> + </RTC1HZ> + <RXD0 Name="RXD0" Text="disable" /> + <ProjectName Name="PrjName" Text="multical" /> + <ProjectPath Name="PrjPath" Text="C:\Users\temp\Desktop\multical" /> + <ProjectKind Name="PrjKind" Text="Project78K0R" /> + <DeviceName Name="DeviceName" Fixed="" Text="RL78F14" /> + <MCUName Name="MCUName" Text="RL78F14_100pin" /> + <ChipName Name="ChipName" Text="R5F10PPJ" /> + <ChipID Name="ChipID" Text="R5F10PPJ" /> + <CPUCoreType Name="CPUCoreType" Fixed="" Text="1" /> + <MCUType Name="MCUType" Fixed="" Text="RL78" /> + <Compiler Name="Compiler" Text="CCRL" /> + <UseSecurityId Name="GI" Text="0" /> + <SecurityId Name="GIValue" Text="00000000000000000000" /> + <LinkDirectiveFile Name="D0" Text="lk.dr" /> + <OnChipDebugOptionBytes Name="GO" Text="1" /> + <OnChipDebugOptionBytesValue Name="GOValue" Text="04" /> + <StartAddressOfOnChipDebugOptionBytes Name="GOStart" Text="3FE00" /> + <SizeOfOnChipDebugOptionBytesArea Name="GOSizeValue" Text="512" /> + <UserOptionBytes Name="GB" Text="1" /> + <UserOptionBytesValue Name="GBValue" Text="FFFFF8" /> + <RAMStartAddress Chip="R5F10PGJ,R5F10PLJ,R5F10PMJ,R5F10PPJ" Name="RAMStartAddress" Fixed="" Text="000FAF00" /> + <RAMEndAddress Name="RAMEndAddress" Fixed="" Text="000FFEFF" /> + <ROMEndAddress Chip="R5F10PGJ,R5F10PLJ,R5F10PMJ,R5F10PPJ" Name="ROMEndAddress" Fixed="" Text="0003FFFF" /> + <REF_VOLTAGE_VALUE Name="REF_VOLTAGE_VALUE" Text="NO_INPUT"> + <Effect> + <DAC /> + <COMP /> + </Effect> + </REF_VOLTAGE_VALUE> + <ANO0_ANALOG_OUTPUT Name="ANO0_ANALOG_OUTPUT" Value="0"> + <Effect> + <DAC /> + <COMP /> + </Effect> + </ANO0_ANALOG_OUTPUT> + <MirrorROM Chip="R5F10PGJ,R5F10PLJ,R5F10PMJ,R5F10PPJ" Name="MirrorROM" Fixed="" Text="31.75" /> + <TAUUsedRTC1Hz Name="TAUUsedRTC1Hz" Text="false" Comment="unused" Trigger="RTC1HZ"> + <Effect> + <RTC /> + </Effect> + </TAUUsedRTC1Hz> + <TRDCLKUSE1 Name="TRDCLKUSE1" Value="0" Comment="unused" Trigger="TRDCLK input"> + <Effect> + <TMRD0 /> + </Effect> + </TRDCLKUSE1> + <fMP Name="fMP" Value="64" /> + <GroupName Name="GroupName" Text="groupe" /> + <CodePath Name="CodePath" Text=".\" /> + <ReportType Name="ReportType" Text="Html" /> + <CreationDateType Name="CreationDateType" Text="OutputDate" /> + <GenerateType Name="GenerateType" Text="Merge" /> + <APIOutputType Name="APIOutputType" Text="Default" /> + <FileRegister Name="FileRegister" Text="Yes" /> + <PinReflect Name="PinReflect" Text="Reflected" /> + <fCLKSource Name="fCLKSource" Text="fIH" /> + <UseFDL Name="UseFDL" Text="no" /> + <DataFlash Name="DataFlash" Text="0" /> + <OCDROM Name="OCDROM" Text="Unused" /> + <OCDROM_Address Name="OCDROM_Address" Text="0003FE00" /> + <OCDROM_Length Name="OCDROM_Length" Text="512" /> + <HasRRMRam Name="HasRRMRam" Text="" /> + <HasTraceRam Name="HasTraceRam" Text="" /> + <HasHotRam Name="HasHotRam" Text="" /> + <PrjVersion Name="PrjVersion" Text="1.2.0.1" /> + <ProductVersion Name="ProductVersion" Text="4.08.06.01" /> + </VAR> + <DIR> + <PIN> + <CGC> + <X1 Port="P121" Point="-" /> + <X2 Port="P122" Point="-" /> + <EXCLK Port="P122" Point="I" /> + <XT1 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P123" Point="-" /> + <XT2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P124" Point="-" /> + <EXCLKS Port="P124" Point="I" /> + <TOOL0 Port="P40" Point="I/O" /> + <RESOUT Port="P130" Point="O" /> + </CGC> + <PORT> + <Port0 Chip="RL78F14_100pin" Pullup="true"> + <P00 Name="P00/TI05/TO05/INTP9" AltFunc="" Point="I/O" /> + <P01 Name="P01/TI04/TO04" AltFunc="" Point="I/O" /> + <P02 Name="P02/TI06/TO06" AltFunc="" Point="I/O" /> + <P03 Name="P03" AltFunc="" Point="I/O" /> + </Port0> + <Port1 Pullup="true"> + <P10 Name="P10/TI13/TO13/TRJO0/_SCK10/SCL10/LTXD1/CTXD0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P11 Name="P11/TI12/TO12/TRDIOB0/SI10/SDA10/RXD1/LRXD1/CRXD0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P12 Name="P12/TI11/TO11/TRDIOD0/INTP5/SO10/TXD1/SNZOUT3" Nch="true" AltFunc="" Point="I/O" /> + <P13 Name="P13/TI04/TO04/TRDIOA0/TRDCLK0/SI01/SDA01/LTXD0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P14 Name="P14/TI06/TO06/TRDIOC0/_SCK01/SCL01/LRXD0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P15 Name="P15/TI05/TO05/TRDIOA1/TRDIOA0/TRDCLK0/SO00/TXD0/TOOLTXD/RTC1HZ" Nch="true" AltFunc="" Point="I/O" /> + <P16 Name="P16/TI02/TO02/TRDIOC1/SI00/SDA00/RXD0/TOOLRXD" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P17 Name="P17/TI00/TO00/TRDIOB1/_SCK00/SCL00/INTP3" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + </Port1> + <Port3 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <P30 Name="P30/TI01/TO01/TRDIOD1/_SSI00/INTP2/SNZOUT0" TTL="true" PITHL="true" Pullup="true" AltFunc="" Point="I/O" /> + <P31 Name="P31/TI14/TO14/STOPST/INTP2" Pullup="true" AltFunc="" Point="I/O" /> + <P32 Name="P32/TI16/TO16/INTP7" Pullup="true" AltFunc="" Point="I/O" /> + <P33 Name="P33/AVREFP/ANI00" AltFunc="" Point="I/O" /> + <P34 Name="P34/AVREFM/ANI01" AltFunc="" Point="I/O" /> + </Port3> + <Port4 Chip="RL78F14_80pin,RL78F14_100pin" Pullup="true"> + <P40 Name="P40/TOOL0" AltFunc="" Point="I/O" /> + <P41 Name="P41/TI10/TO10/TRJIO0/VCOUT0/SNZOUT2" AltFunc="" Point="I/O" /> + <P42 Name="P42/LTXD0" AltFunc="" Point="I/O" /> + <P43 Name="P43/LRXD0" PITHL="true" AltFunc="" Point="I/O" /> + <P44 Name="P44/TI07/TO07" AltFunc="" Point="I/O" /> + <P45 Name="P45/TI10/TO10" AltFunc="" Point="I/O" /> + <P46 Name="P46/TI12/TO12" AltFunc="" Point="I/O" /> + <P47 Name="P47/INTP13" AltFunc="" Point="I/O" /> + </Port4> + <Port5 Chip="RL78F14_80pin,RL78F14_100pin" Pullup="true"> + <P50 Name="P50/_SSI01/INTP3" PITHL="true" AltFunc="" Point="I/O" /> + <P51 Name="P51/SO01/INTP11" AltFunc="" Point="I/O" /> + <P52 Name="P52/_SCK01/SCL01/STOPST" PITHL="true" AltFunc="" Point="I/O" /> + <P53 Name="P53/SI01/SDA01/INTP10" PITHL="true" AltFunc="" Point="I/O" /> + <P54 Name="P54/TI11/TO11/_SSI10" TTL="true" PITHL="true" AltFunc="" Point="I/O" /> + <P55 Name="P55/TI13/TO13" AltFunc="" Point="I/O" /> + <P56 Name="P56/TI15/TO15/SNZOUT1" AltFunc="" Point="I/O" /> + <P57 Name="P57/TI17/TO17/SNZOUT0" AltFunc="" Point="I/O" /> + </Port5> + <Port6 Chip="RL78F14_80pin,RL78F14_100pin" Pullup="true"> + <P60 Name="P60/_SCK00/SCL00" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P61 Name="P61/SI00/SDA00/RXD0" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P62 Name="P62/SO00/TXD0/SCLA0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P63 Name="P63/_SSI00/SDAA0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P64 Name="P64/TI14/TO14/SNZOUT3" AltFunc="" Point="I/O" /> + <P65 Name="P65/TI16/TO16/SNZOUT2" AltFunc="" Point="I/O" /> + <P66 Name="P66/TI00/TO00" AltFunc="" Point="I/O" /> + <P67 Name="P67/TI02/TO02" AltFunc="" Point="I/O" /> + </Port6> + <Port7 Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" Pullup="true"> + <P70 Name="P70/ANI26/KR0/TI15/TO15/INTP8/SI11/SDA11/SNZOUT4/KR0" DIN="true" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P71 Name="P71/ANI27/KR1/TI17/TO17/INTP6/_SCK11/SCL11/SNZOUT5/KR1" DIN="true" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P72 Name="P72/ANI28/KR2/CTXD0/SO11/SNZOUT6/KR2" DIN="true" Nch="true" AltFunc="" Point="I/O" /> + <P73 Name="P73/ANI29/KR3/CRXD0/_SSI11/SNZOUT7/KR3" DIN="true" TTL="true" PITHL="true" AltFunc="" Point="I/O" /> + <P74 Name="P74/ANI30/KR4/SO10/TXD1/KR4" DIN="true" AltFunc="" Point="I/O" /> + <P75 Name="P75/KR5/SI10/SDA10/RXD1/KR5" PITHL="true" AltFunc="" Point="I/O" /> + <P76 Name="P76/KR6/_SCK10/SCL10/KR6" PITHL="true" AltFunc="" Point="I/O" /> + <P77 Name="P77/KR7/_SSI10/INTP12/KR7" PITHL="true" AltFunc="" Point="I/O" /> + </Port7> + <Port8 Chip="RL78F14_30pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <P80 Name="P80/ANI02/ANO0" AltFunc="" Point="I/O" /> + <P81 Name="P81/ANI03/IVCMP00" AltFunc="" Point="I/O" /> + <P82 Name="P82/ANI04/IVCMP01" AltFunc="" Point="I/O" /> + <P83 Name="P83/ANI05/IVCMP02" AltFunc="" Point="I/O" /> + <P84 Name="P84/ANI06/IVCMP03" AltFunc="" Point="I/O" /> + <P85 Name="P85/ANI07/IVREF0" AltFunc="" Point="I/O" /> + <P86 Name="P86/ANI08" AltFunc="" Point="I/O" /> + <P87 Name="P87/ANI09" AltFunc="" Point="I/O" /> + </Port8> + <Port9 Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ"> + <P90 Name="P90/ANI10" AltFunc="" Point="I/O" /> + <P91 Name="P91/ANI11" AltFunc="" Point="I/O" /> + <P92 Name="P92/ANI12" AltFunc="" Point="I/O" /> + <P93 Name="P93/ANI13" AltFunc="" Point="I/O" /> + <P94 Name="P94/ANI14" AltFunc="" Point="I/O" /> + <P95 Name="P95/ANI15" AltFunc="" Point="I/O" /> + <P96 Name="P96/ANI16" AltFunc="" Point="I/O" /> + <P97 Name="P97/ANI17" AltFunc="" Point="I/O" /> + </Port9> + <Port10 Chip="RL78F14_100pin"> + <P100 Name="P100/ANI18" AltFunc="" Point="I/O" /> + <P101 Name="P101/ANI19" AltFunc="" Point="I/O" /> + <P102 Name="P102/ANI20" AltFunc="" Point="I/O" /> + <P103 Name="P103/ANI21" AltFunc="" Point="I/O" /> + <P104 Name="P104/ANI22" AltFunc="" Point="I/O" /> + <P105 Name="P105/ANI23" AltFunc="" Point="I/O" /> + <P106 Name="P106/LTXD1" Pullup="true" AltFunc="" Point="I/O" /> + <P107 Name="P107/LRXD1" PITHL="true" Pullup="true" AltFunc="" Point="I/O" /> + </Port10> + <Port12 Chip="RL78F14_100pin"> + <P120 Name="P120/ANI25/TI07/TO07/TRDIOD0/SO01/INTP4" DIN="true" Nch="true" Pullup="true" AltFunc="" Point="I/O" /> + <P121 Name="P121/X1" AltFunc="" Point="I" /> + <P122 Name="P122/X2/EXCLK" AltFunc="" Point="I" /> + <P123 Name="P123/XT1" AltFunc="" Point="I" /> + <P124 Name="P124/XT2/EXCLKS" AltFunc="" Point="I" /> + <P125 Name="P125/ANI24/TI03/TO03/TRDIOB0/_SSI01/INTP1/SNZOUT1" DIN="true" TTL="true" PITHL="true" Pullup="true" AltFunc="" Point="I/O" /> + <P126 Name="P126/TI01/TO01" Pullup="true" AltFunc="" Point="I/O" /> + <P127 Name="P127/TI03/TO03" Pullup="true" AltFunc="" Point="I/O" /> + </Port12> + <Port13 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <P130 Name="P130/RESOUT" AltFunc="" Point="O" /> + <P137 Name="P137/INTP0" AltFunc="" Point="I" /> + </Port13> + <Port14 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Pullup="true"> + <P140 Name="P140/PCLBUZ0" AltFunc="" Point="I/O" /> + </Port14> + <Port15 Chip="RL78F14_100pin" Pullup="true"> + <P150 Name="P150/_SSI11" PITHL="true" AltFunc="" Point="I/O" /> + <P151 Name="P151/SO11" AltFunc="" Point="I/O" /> + <P152 Name="P152/SI11/SDA11" PITHL="true" AltFunc="" Point="I/O" /> + <P153 Name="P153/_SCK11/SCL11" PITHL="true" AltFunc="" Point="I/O" /> + <P154 Name="P154/SNZOUT7" AltFunc="" Point="I/O" /> + <P155 Name="P155/SNZOUT6" AltFunc="" Point="I/O" /> + <P156 Name="P156/SNZOUT5" AltFunc="" Point="I/O" /> + <P157 Name="P157/SNZOUT4" AltFunc="" Point="I/O" /> + </Port15> + </PORT> + <INTC> + <INTP> + <INTP0 Port="P137" Point="I" /> + <INTP1 Port="P125" Point="I" /> + <INTP2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin,RL78F14_30pin,RL78F14_32pin" PIOR52="0" Port="P30" Point="I" /> + <INTP2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR52="1" Port="P31" Point="I" /> + <INTP3 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin,RL78F14_30pin,RL78F14_32pin" PIOR53="0" Port="P17" Point="I" /> + <INTP3 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR53="1" Port="P50" Point="I" /> + <INTP4 Port="P120" Point="I" /> + <INTP5 Port="P12" Point="I" /> + <INTP6 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P71" Point="I" /> + <INTP7 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P32" Point="I" /> + <INTP8 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P70" Point="I" /> + <INTP9 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P00" Point="I" /> + <INTP10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P53" Point="I" /> + <INTP11 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P51" Point="I" /> + <INTP12 Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" Port="P77" Point="I" /> + <INTP13 Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" Port="P47" Point="I" /> + </INTP> + <KEY> + <KR0 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P70" Point="I" /> + <KR1 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P71" Point="I" /> + <KR2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P72" Point="I" /> + <KR3 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P73" Point="I" /> + <KR4 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P74" Point="I" /> + <KR5 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P75" Point="I" /> + <KR6 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P76" Point="I" /> + <KR7 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P77" Point="I" /> + </KEY> + </INTC> + <ADC> + <ANI0 Port="P33" Point="I" UnConflict="CMP_ANALOG_0,DAC_ANALOG_0" /> + <ANI1 Port="P34" Point="I" UnConflict="CMP_ANALOG_0,DAC_ANALOG_0,CMP_ANALOG_1,DAC_ANALOG_1" /> + <ANI2 Port="P80" Point="I" UnConflict="IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI3 Port="P81" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI4 Port="P82" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI5 Port="P83" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7," /> + <ANI6 Port="P84" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI7 Port="P85" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI8 Chip="RL78F14_30pin, RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P86" Point="I" /> + <ANI9 Chip="RL78F14_30pin, RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P87" Point="I" /> + <ANI10 Chip="RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P90" Point="I" /> + <ANI11 Chip="RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P91" Point="I" /> + <ANI12 Chip="RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P92" Point="I" /> + <ANI13 Chip="RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P93" Point="I" /> + <ANI14 Chip="RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P94" Point="I" /> + <ANI15 Chip="RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P95" Point="I" /> + <ANI16 Chip="R5F10PLG, R5F10PLH, R5F10PLJ, R5F10PMG, R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P96" Point="I" /> + <ANI17 Chip="R5F10PMG, R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P97" Point="I" /> + <ANI18 Chip="RL78F14_100pin" Port="P100" Point="I" /> + <ANI19 Chip="RL78F14_100pin" Port="P101" Point="I" /> + <ANI20 Chip="RL78F14_100pin" Port="P102" Point="I" /> + <ANI21 Chip="RL78F14_100pin" Port="P103" Point="I" /> + <ANI22 Chip="RL78F14_100pin" Port="P104" Point="I" /> + <ANI23 Chip="RL78F14_100pin" Port="P105" Point="I" /> + <ANI24 Port="P125" Point="I" /> + <ANI25 Port="P120" Point="I" /> + <ANI26 Chip="R5F10PGG, R5F10PGH, R5F10PGJ, R5F10PLG, R5F10PLH, R5F10PLJ, R5F10PMG, R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P70" Point="I" /> + <ANI27 Chip="R5F10PGG, R5F10PGH, R5F10PGJ, R5F10PLG, R5F10PLH, R5F10PLJ, R5F10PMG, R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P71" Point="I" /> + <ANI28 Chip="R5F10PGG, R5F10PGH, R5F10PGJ, R5F10PMG,R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P72" Point="I" /> + <ANI29 Chip="R5F10PMG,R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P73" Point="I" /> + <ANI30 Chip="R5F10PMG,R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P74" Point="I" /> + <AVREFP Port="P33" Point="I" UnConflict="CMP_ANALOG_0,DAC_ANALOG_0" /> + <AVREFM Port="P34" Point="I" UnConflict="CMP_ANALOG_0,DAC_ANALOG_0,CMP_ANALOG_1,DAC_ANALOG_1" /> + <ANALOG_0 Port="P33" Point="I" RealName="ANI0" UnConflict="CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_1 Port="P34" Point="I" RealName="ANI1" UnConflict="CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_2 Port="P80" Point="I" RealName="ANI2" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_3 Port="P81" Point="I" RealName="ANI3" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_4 Port="P82" Point="I" RealName="ANI4" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_5 Port="P83" Point="I" RealName="ANI5" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_6 Port="P84" Point="I" RealName="ANI6" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_7 Port="P85" Point="I" RealName="ANI7" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_8 Port="P86" Point="I" RealName="ANI8" /> + <ANALOG_9 Port="P87" Point="I" RealName="ANI9" /> + <ANALOG_10 Port="P90" Point="I" RealName="ANI10" /> + <ANALOG_11 Port="P91" Point="I" RealName="ANI11" /> + <ANALOG_12 Port="P92" Point="I" RealName="ANI12" /> + <ANALOG_13 Port="P93" Point="I" RealName="ANI13" /> + <ANALOG_14 Port="P94" Point="I" RealName="ANI14" /> + <ANALOG_15 Port="P95" Point="I" RealName="ANI15" /> + <ANALOG_16 Port="P96" Point="I" RealName="ANI16" /> + <ANALOG_17 Port="P97" Point="I" RealName="ANI17" /> + <ANALOG_18 Port="P100" Point="I" RealName="ANI18" /> + <ANALOG_19 Port="P101" Point="I" RealName="ANI19" /> + <ANALOG_20 Port="P102" Point="I" RealName="ANI20" /> + <ANALOG_21 Port="P103" Point="I" RealName="ANI21" /> + <ANALOG_22 Port="P104" Point="I" RealName="ANI22" /> + <ANALOG_23 Port="P105" Point="I" RealName="ANI23" /> + </ADC> + <Serial> + <SAU0> + <UART0> + <RXD0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P16" Point="I" /> + <RXD0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P61" Point="I" /> + <TXD0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P15" Point="O" /> + <TXD0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P62" Point="O" /> + </UART0> + <CSI00> + <SO00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P15" Point="O" /> + <SO00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P62" Point="O" /> + <SI00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P16" Point="I" /> + <SI00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P61" Point="I" /> + <SCK00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" RealName="_SCK00" Port="P17" Point="I/O" /> + <SCK00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK00" PIOR40="1" Port="P60" Point="I/O" /> + <SSI00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" RealName="_SSI00" Port="P30" Point="I" /> + <SSI00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" RealName="_SSI00" Port="P63" Point="I" /> + </CSI00> + <CSI01> + <SO01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" Port="P120" Point="O" /> + <SO01 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="1" Port="P51" Point="O" /> + <SI01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" Port="P13" Point="I" /> + <SI01 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="1" Port="P53" Point="I" /> + <SCK01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK01" PIOR41="0" Port="P14" Point="I/O" /> + <SCK01 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK01" PIOR41="1" Port="P52" Point="I/O" /> + <SSI01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" RealName="_SSI01" Port="P125" Point="I" /> + <SSI01 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="1" RealName="_SSI01" Port="P50" Point="I" /> + </CSI01> + <IIC00> + <SCL00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P17" Point="O" CheckNch="true" /> + <SCL00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P60" Point="O" CheckNch="true" /> + <SDA00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P16" Point="O" CheckNch="true" /> + <SDA00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P61" Point="O" CheckNch="true" /> + </IIC00> + <IIC01> + <SCL01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" Port="P14" Point="O" CheckNch="true" /> + <SDA01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" Port="P13" Point="O" CheckNch="true" /> + </IIC01> + </SAU0> + <SAU1> + <UART1> + <RXD1 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="0" Port="P11" Point="I" /> + <RXD1 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" Port="P75" Point="I" /> + <TXD1 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="0" Port="P12" Point="O" /> + <TXD1 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" Port="P74" Point="O" /> + </UART1> + <CSI10> + <SO10 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="0" Port="P12" Point="O" /> + <SO10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" Port="P74" Point="O" /> + <SI10 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="0" Port="P11" Point="I" /> + <SI10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" Port="P75" Point="I" /> + <SCK10 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK10" PIOR42="0" Port="P10" Point="I/O" /> + <SCK10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK10" PIOR42="1" Port="P76" Point="I/O" /> + <SSI10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR42="0" RealName="_SSI10" Port="P54" Point="I" /> + <SSI10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" RealName="_SSI10" Port="P77" Point="I" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <SO11 PIOR43="0" Port="P72" Point="O" /> + <SO11 Chip="RL78F14_100pin" PIOR43="1" Port="P151" Point="O" /> + <SI11 PIOR43="0" Port="P70" Point="I" /> + <SI11 Chip="RL78F14_100pin" PIOR43="1" Port="P152" Point="I" /> + <SCK11 PIOR43="0" RealName="_SCK11" Port="P71" Point="I/O" /> + <SCK11 Chip="RL78F14_100pin" RealName="_SCK11" PIOR43="1" Port="P153" Point="I/O" /> + <SSI11 PIOR43="0" RealName="_SSI11" Port="P73" Point="I" /> + <SSI11 Chip="RL78F14_100pin" PIOR43="1" RealName="_SSI11" Port="P150" Point="I" /> + </CSI11> + <IIC10> + <SCL10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin,RL78F14_32pin,RL78F14_48pin" PIOR42="0" Port="P10" Point="O" CheckNch="true" /> + <SDA10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin,RL78F14_32pin,RL78F14_48pin" PIOR42="0" Port="P11" Point="O" CheckNch="true" /> + </IIC10> + <IIC11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <SCL11 PIOR43="0" Port="P71" Point="O" CheckNch="true" /> + <SDA11 PIOR43="0" Port="P70" Point="O" CheckNch="true" /> + </IIC11> + </SAU1> + <IICA0> + <SCLA0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P62" Point="I/O" /> + <SDAA0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P63" Point="I/O" /> + </IICA0> + </Serial> + <TAU> + <TAU0> + <Channel0> + <TI00 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR00="0" Port="P17" Point="I" /> + <TI00 Chip="RL78F14_80pin,RL78F14_100pin" PIOR00="1" Port="P66" Point="I" /> + <TO00 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR10="0" Port="P17" Point="O" /> + <TO00 Chip="RL78F14_80pin,RL78F14_100pin" PIOR10="1" Port="P66" Point="O" /> + </Channel0> + <Channel1> + <TI01 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR01="0" Port="P30" Point="I" /> + <TI01 Chip="RL78F14_80pin,RL78F14_100pin" PIOR01="1" Port="P126" Point="I" /> + <TO01 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR11="0" Port="P30" Point="O" /> + <TO01 Chip="RL78F14_80pin,RL78F14_100pin" PIOR11="1" Port="P126" Point="O" /> + </Channel1> + <Channel2> + <TI02 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR02="0" Port="P16" Point="I" /> + <TI02 Chip="RL78F14_80pin,RL78F14_100pin" PIOR02="1" Port="P67" Point="I" /> + <TO02 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR12="0" Port="P16" Point="O" /> + <TO02 Chip="RL78F14_80pin,RL78F14_100pin" PIOR12="1" Port="P67" Point="O" /> + </Channel2> + <Channel3> + <TI03 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR03="0" Port="P125" Point="I" /> + <TI03 Chip="RL78F14_100pin" PIOR03="1" Port="P127" Point="I" /> + <TO03 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR13="0" Port="P125" Point="O" /> + <TO03 Chip="RL78F14_100pin" PIOR13="1" Port="P127" Point="O" /> + </Channel3> + <Channel4> + <TI04 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR04="0" Port="P13" Point="I" /> + <TI04 Chip="RL78F14_80pin,RL78F14_100pin" PIOR04="1" Port="P01" Point="I" /> + <TO04 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR14="0" Port="P13" Point="O" /> + <TO04 Chip="RL78F14_80pin,RL78F14_100pin" PIOR14="1" Port="P01" Point="O" /> + </Channel4> + <Channel5> + <TI05 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR05="0" Port="P15" Point="I" /> + <TI05 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR05="1" Port="P00" Point="I" /> + <TO05 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR15="0" Port="P15" Point="O" /> + <TO05 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR15="1" Port="P00" Point="O" /> + </Channel5> + <Channel6> + <TI06 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR06="0" Port="P14" Point="I" /> + <TI06 Chip="RL78F14_80pin,RL78F14_100pin" PIOR06="1" Port="P02" Point="I" /> + <TO06 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR16="0" Port="P14" Point="O" /> + <TO06 Chip="RL78F14_80pin,RL78F14_100pin" PIOR16="1" Port="P02" Point="O" /> + </Channel6> + <Channel7> + <TI07 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR07="0" Port="P120" Point="I" /> + <TI07 Chip="RL78F14_80pin,RL78F14_100pin" PIOR07="1" Port="P44" Point="I" /> + <TO07 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR17="0" Port="P120" Point="O" /> + <TO07 Chip="RL78F14_80pin,RL78F14_100pin" PIOR17="1" Port="P44" Point="O" /> + </Channel7> + </TAU0> + <TAU1> + <Channel0> + <TI10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR20="0" Port="P41" Point="I" /> + <TI10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR20="1" Port="P45" Point="I" /> + <TO10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR30="0" Port="P41" Point="O" /> + <TO10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR30="1" Port="P45" Point="O" /> + </Channel0> + <Channel1> + <TI11 Chip="RL78F14_80pin,RL78F14_100pin" PIOR21="0" Port="P12" Point="I" /> + <TI11 Chip="RL78F14_80pin,RL78F14_100pin" PIOR21="1" Port="P54" Point="I" /> + <TO11 Chip="RL78F14_80pin,RL78F14_100pin" PIOR31="0" Port="P12" Point="O" /> + <TO11 Chip="RL78F14_80pin,RL78F14_100pin" PIOR31="1" Port="P54" Point="O" /> + </Channel1> + <Channel2> + <TI12 Chip="RL78F14_80pin,RL78F14_100pin" PIOR22="0" Port="P11" Point="I" /> + <TI12 Chip="RL78F14_80pin,RL78F14_100pin" PIOR22="1" Port="P46" Point="I" /> + <TO12 Chip="RL78F14_80pin,RL78F14_100pin" PIOR32="0" Port="P11" Point="O" /> + <TO12 Chip="RL78F14_80pin,RL78F14_100pin" PIOR32="1" Port="P46" Point="O" /> + </Channel2> + <Channel3> + <TI13 Chip="RL78F14_80pin,RL78F14_100pin" PIOR23="0" Port="P10" Point="I" /> + <TI13 Chip="RL78F14_80pin,RL78F14_100pin" PIOR23="1" Port="P55" Point="I" /> + <TO13 Chip="RL78F14_80pin,RL78F14_100pin" PIOR33="0" Port="P10" Point="O" /> + <TO13 Chip="RL78F14_80pin,RL78F14_100pin" PIOR33="1" Port="P55" Point="O" /> + </Channel3> + <Channel4 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin"> + <TI14 Chip="RL78F14_80pin,RL78F14_100pin" PIOR24="0" Port="P31" Point="I" /> + <TI14 Chip="RL78F14_80pin,RL78F14_100pin" PIOR24="1" Port="P64" Point="I" /> + <TO14 Chip="RL78F14_80pin,RL78F14_100pin" PIOR34="0" Port="P31" Point="O" /> + <TO14 Chip="RL78F14_80pin,RL78F14_100pin" PIOR34="1" Port="P64" Point="O" /> + </Channel4> + <Channel5 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin"> + <TI15 Chip="RL78F14_80pin,RL78F14_100pin" PIOR25="0" Port="P70" Point="I" /> + <TI15 Chip="RL78F14_80pin,RL78F14_100pin" PIOR25="1" Port="P56" Point="I" /> + <TO15 Chip="RL78F14_80pin,RL78F14_100pin" PIOR35="0" Port="P70" Point="O" /> + <TO15 Chip="RL78F14_80pin,RL78F14_100pin" PIOR35="1" Port="P56" Point="O" /> + </Channel5> + <Channel6 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin"> + <TI16 Chip="RL78F14_80pin,RL78F14_100pin" PIOR26="0" Port="P32" Point="I" /> + <TI16 Chip="RL78F14_80pin,RL78F14_100pin" PIOR26="1" Port="P65" Point="I" /> + <TO16 Chip="RL78F14_80pin,RL78F14_100pin" PIOR36="0" Port="P32" Point="O" /> + <TO16 Chip="RL78F14_80pin,RL78F14_100pin" PIOR36="1" Port="P65" Point="O" /> + </Channel6> + <Channel7 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin"> + <TI17 Chip="RL78F14_80pin,RL78F14_100pin" PIOR27="0" Port="P71" Point="I" /> + <TI17 Chip="RL78F14_80pin,RL78F14_100pin" PIOR27="1" Port="P57" Point="I" /> + <TO17 Chip="RL78F14_80pin,RL78F14_100pin" PIOR37="0" Port="P71" Point="O" /> + <TO17 Chip="RL78F14_80pin,RL78F14_100pin" PIOR37="1" Port="P57" Point="O" /> + </Channel7> + </TAU1> + <TMRJ0> + <TRJIO0 Port="P41" Point="I/O" /> + <TRJO0 Port="P10" Point="O" /> + </TMRJ0> + <TMRD0> + <TRDCLK_P13_0 PIOR70="0" Port="P13" Point="I/O" UnConflict="TRDCLK_P13_1" RealName="TRDCLK0" /> + <TRDCLK_P15_0 PIOR70="1" Port="P15" Point="I/O" UnConflict="TRDCLK_P15_1,TRDIOA1_P15_0" RealName="TRDCLK0" /> + <TRDIOA0_P13 PIOR70="0" Port="P13" Point="I/O" UnConflict="TRDCLK_P13_0" RealName="TRDIOA0" /> + <TRDIOA0_P15 PIOR70="1" Port="P15" Point="I/O" UnConflict="TRDCLK_P15_0" RealName="TRDIOA0" /> + <TRDIOB0_P125 PIOR71="0" Port="P125" Point="I/O" RealName="TRDIOB0" /> + <TRDIOB0_P11 PIOR71="1" Port="P11" Point="I/O" RealName="TRDIOB0" /> + <TRDIOC0_P14 Port="P14" Point="I/O" RealName="TRDIOC0" /> + <TRDIOD0_P120 PIOR73="0" Port="P120" Point="I/O" RealName="TRDIOD0" /> + <TRDIOD0_P12 PIOR73="1" Port="P12" Point="I/O" RealName="TRDIOD0" /> + <TRDIOA1_P15_0 Port="P15" Point="I/O" UnConflict="TRDIOA1_P15" RealName="TRDIOA1" /> + <TRDIOB1_P17_0 Port="P17" Point="I/O" UnConflict="TRDIOB1_P17" RealName="TRDIOB1" /> + <TRDIOC1_P16_0 Port="P16" Point="I/O" UnConflict="TRDIOC1_P16" RealName="TRDIOC1" /> + <TRDIOD1_P30_0 Port="P30" Point="I/O" UnConflict="TRDIOD1_P30" RealName="TRDIOD1" /> + </TMRD0> + <TMRD1> + <TRDCLK_P13_1 PIOR70="0" Port="P13" Point="I/O" UnConflict="TRDCLK_P13_0,TRDIOA0_P13" RealName="TRDCLK0" /> + <TRDCLK_P15_1 PIOR70="1" Port="P15" Point="I/O" UnConflict="TRDCLK_P15_0,TRDIOA0_P15" RealName="TRDCLK0" /> + <TRDIOA1_P15 Port="P15" Point="I/O" UnConflict="TRDIOA1_P15_0" RealName="TRDIOA1" /> + <TRDIOB1_P17 Port="P17" Point="I/O" UnConflict="TRDIOB1_P17_0" RealName="TRDIOB1" /> + <TRDIOC1_P16 Port="P16" Point="I/O" UnConflict="TRDIOC1_P16_0" RealName="TRDIOC1" /> + <TRDIOD1_P30 Port="P30" Point="I/O" UnConflict="TRDIOD1_P30_0" RealName="TRDIOD1" /> + </TMRD1> + </TAU> + <RTC> + <RTC1HZ Chip="RL78F14_100pin" PIOR80="0" Port="P15" Point="O" /> + <RTC1HZ Chip="RL78F14_100pin" PIOR80="1" Port="P03" Point="O" /> + </RTC> + <PCLBUZ> + <PCLBUZ0> + <PCLBUZ0 Port="P140" Point="O" /> + </PCLBUZ0> + </PCLBUZ> + <DAC> + <ANO0_DAC Port="P80" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" Point="I" RealName="ANO0" /> + <DAC_ANALOG_0 Port="P33" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" Point="I" RealName="ANI0/AVREFP" /> + <DAC_ANALOG_1 Port="P34" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" Point="I" RealName="ANI1/AVREFM" /> + </DAC> + <COMP> + <IVCMP00 Port="P81" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <IVCMP01 Port="P82" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <IVCMP02 Port="P83" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <IVCMP03 Port="P84" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <IVREF0 Port="P85" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <VCOUT0 Port="P41" Point="O" /> + <ANO0_COMP Port="P80" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" Point="0" RealName="ANO0" /> + <CMP_ANALOG_0 Port="P33" RealName="ANI0/AVREFP" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_1 Port="P34" RealName="ANI1/AVREFM" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_2 Port="P80" RealName="ANO0" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,ANO0_COMP,ANO0_DAC,CMP_ANALOG_0,CMP_ANALOG_1" /> + <CMP_ANALOG_3 Port="P81" RealName="IVCMP00" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_4 Port="P82" RealName="IVCMP01" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_5 Port="P83" RealName="IVCMP02" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_6 Port="P84" RealName="IVCMP03" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_7 Port="P85" RealName="IVREF0" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + </COMP> + <SNOOZE Chip="RL78F14_100pin"> + <SNZOUT0 PIOR60="0" Port="P30" Point="O" /> + <SNZOUT0 PIOR60="1" Port="P57" Point="O" /> + <SNZOUT1 PIOR61="0" Port="P125" Point="O" /> + <SNZOUT1 PIOR61="1" Port="P56" Point="O" /> + <SNZOUT2 PIOR62="0" Port="P41" Point="O" /> + <SNZOUT2 PIOR62="1" Port="P65" Point="O" /> + <SNZOUT3 PIOR63="0" Port="P12" Point="O" /> + <SNZOUT3 PIOR63="1" Port="P64" Point="O" /> + <SNZOUT4 PIOR64="0" Port="P70" Point="O" /> + <SNZOUT4 PIOR64="1" Port="P157" Point="O" /> + <SNZOUT5 PIOR65="0" Port="P71" Point="O" /> + <SNZOUT5 PIOR65="1" Port="P156" Point="O" /> + <SNZOUT6 PIOR66="0" Port="P72" Point="O" /> + <SNZOUT6 PIOR66="1" Port="P155" Point="O" /> + <SNZOUT7 PIOR67="0" Port="P73" Point="O" /> + <SNZOUT7 PIOR67="1" Port="P154" Point="O" /> + </SNOOZE> + <LIN Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin"> + <LTxD0 PIOR44="0" Port="P13" Point="O" /> + <LTxD0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR44="1" Port="P42" Point="O" /> + <LRxD0 PIOR44="0" Port="P14" Point="I" /> + <LRxD0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR44="1" Port="P43" Point="I" /> + <LTxD1 Chip="RL78F14_100pin,R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ" PIOR45="0" Port="P10" Point="O" /> + <LTxD1 Chip="RL78F14_100pin" PIOR45="1" Port="P106" Point="O" /> + <LRxD1 Chip="RL78F14_100pin,R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ" PIOR45="0" Port="P11" Point="I" /> + <LRxD1 Chip="RL78F14_100pin" PIOR45="1" Port="P107" Point="I" /> + </LIN> + <CAN Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin"> + <CTxD0 PIOR46="0" Port="P10" Point="O" /> + <CTxD0 PIOR46="1" Port="P72" Point="O" /> + <CRxD0 PIOR46="0" Port="P11" Point="I" /> + <CRxD0 PIOR46="1" Port="P73" Point="I" /> + </CAN> + <Others> + <VDD AltFunc="VDD" Point="-" /> + <VSS AltFunc="VSS" Point="-" /> + <EVDD0 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" AltFunc="EVDD0" Point="-" /> + <EVSS0 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" AltFunc="EVSS0" Point="-" /> + <EVDD1 Chip="RL78F14_100pin" AltFunc="EVDD1" Point="-" /> + <EVSS1 Chip="RL78F14_100pin" AltFunc="EVSS1" Point="-" /> + <REGC AltFunc="REGC" Point="-" /> + <_RESET AltFunc="_RESET" RealName="_RESET" Point="I" /> + </Others> + </PIN> + <INT> + <CGC> + <INTCLM InUse="0" ISR="r_cgc_clockmonitor_interrupt" /> + <INTRAM InUse="0" ISR="r_cgc_ram_ecc_interrupt" /> + <INTSPM InUse="0" ISR="r_cgc_stackpointer_interrupt" /> + </CGC> + <INTC> + <INTP> + <INTP0 InUse="0" ISR="r_intc0_interrupt" /> + <INTP1 InUse="0" ISR="r_intc1_interrupt" /> + <INTP2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin," InUse="0" ISR="r_intc2_interrupt" /> + <INTP3 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc3_interrupt" /> + <INTP4 InUse="0" ISR="r_intc4_interrupt" /> + <INTP5 InUse="0" ISR="r_intc5_interrupt" /> + <INTP6 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc6_interrupt" /> + <INTP7 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc7_interrupt" /> + <INTP8 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc8_interrupt" /> + <INTP9 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc9_interrupt" /> + <INTP10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc10_interrupt" /> + <INTP11 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc11_interrupt" /> + <INTP12 Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" InUse="0" ISR="r_intc12_interrupt" /> + <INTP13 Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" InUse="0" ISR="r_intc13_interrupt" /> + </INTP> + <KEY> + <INTKR Chip="RL78F14_80pin,RL78F14_100pin" PIOR50="0" InUse="0" ISR="r_key_interrupt" /> + </KEY> + </INTC> + <Serial> + <SAU0> + <INTCSI00 InUse="0" ISR="r_csi00_interrupt" /> + <INTCSI01 InUse="0" ISR="r_csi01_interrupt" /> + <INTST0 InUse="0" ISR="r_uart0_interrupt_send" /> + <INTSR0 InUse="0" ISR="r_uart0_interrupt_receive" /> + <INTIIC00 InUse="0" ISR="r_iic00_interrupt" /> + <INTIIC01 InUse="0" ISR="r_iic01_interrupt" /> + </SAU0> + <SAU1> + <INTCSI10 InUse="0" ISR="r_csi10_interrupt" /> + <INTCSI11 InUse="0" ISR="r_csi11_interrupt" /> + <INTST1 InUse="0" ISR="r_uart1_interrupt_send" /> + <INTSR1 InUse="0" ISR="r_uart1_interrupt_receive" /> + <INTIIC10 InUse="0" ISR="r_iic10_interrupt" /> + <INTIIC11 InUse="0" ISR="r_iic11_interrupt" /> + </SAU1> + <IICA0> + <INTIICA0 InUse="0" ISR="r_iica0_interrupt" /> + </IICA0> + </Serial> + <ADC> + <INTAD InUse="0" ISR="r_adc_interrupt" IsDMATrigger="true" /> + </ADC> + <TAU> + <TAU0> + <Channel0> + <INTTM00 InUse="0" ISR="r_tau0_channel0_interrupt" /> + </Channel0> + <Channel1> + <INTTM01 InUse="0" ISR="r_tau0_channel1_interrupt" /> + <INTTM01H InUse="0" ISR="r_tau0_channel1_higher8bits_interrupt" /> + </Channel1> + <Channel2> + <INTTM02 InUse="0" ISR="r_tau0_channel2_interrupt" /> + </Channel2> + <Channel3> + <INTTM03 InUse="0" ISR="r_tau0_channel3_interrupt" /> + <INTTM03H InUse="0" ISR="r_tau0_channel3_higher8bits_interrupt" /> + </Channel3> + <Channel4> + <INTTM04 InUse="0" ISR="r_tau0_channel4_interrupt" /> + </Channel4> + <Channel5> + <INTTM05 InUse="0" ISR="r_tau0_channel5_interrupt" /> + </Channel5> + <Channel6> + <INTTM06 InUse="0" ISR="r_tau0_channel6_interrupt" /> + </Channel6> + <Channel7> + <INTTM07 InUse="0" ISR="r_tau0_channel7_interrupt" /> + </Channel7> + </TAU0> + <TAU1> + <Channel0> + <INTTM10 InUse="0" ISR="r_tau1_channel0_interrupt" /> + </Channel0> + <Channel1> + <INTTM11 InUse="0" ISR="r_tau1_channel1_interrupt" /> + <INTTM11H InUse="0" ISR="r_tau1_channel1_higher8bits_interrupt" /> + </Channel1> + <Channel2> + <INTTM12 InUse="0" ISR="r_tau1_channel2_interrupt" /> + </Channel2> + <Channel3> + <INTTM13 InUse="0" ISR="r_tau1_channel3_interrupt" /> + <INTTM13H InUse="0" ISR="r_tau1_channel3_higher8bits_interrupt" /> + </Channel3> + <Channel4> + <INTTM14 InUse="0" ISR="r_tau1_channel4_interrupt" /> + </Channel4> + <Channel5> + <INTTM15 InUse="0" ISR="r_tau1_channel5_interrupt" /> + </Channel5> + <Channel6> + <INTTM16 InUse="0" ISR="r_tau1_channel6_interrupt" /> + </Channel6> + <Channel7> + <INTTM17 InUse="0" ISR="r_tau1_channel7_interrupt" /> + </Channel7> + </TAU1> + <TMRJ0> + <INTTRJ0 InUse="0" ISR="r_tmr_rj0_interrupt" /> + </TMRJ0> + <TMRD0> + <INTTRD0 InUse="0" ISR="r_tmr_rd0_interrupt" /> + </TMRD0> + <TMRD1> + <INTTRD1 InUse="0" ISR="r_tmr_rd1_interrupt" /> + </TMRD1> + </TAU> + <RTC> + <INTRTC InUse="0" ISR="r_rtc_interrupt" /> + </RTC> + <WDT> + <INTWDTI InUse="1" ISR="r_wdt_interrupt" /> + </WDT> + <LVD> + <INTLVI InUse="0" ISR="r_lvd_interrupt" IsDMATrigger="true" /> + </LVD> + <COMP> + <INTCMP0 InUse="0" ISR="r_comp0_interrupt" /> + </COMP> + </INT> + <FUNC> + <Common> + <r_main.c UserName="r_main.c" LibName="main.c" IsLibrary="false" InUse="2"> + <Type main="void main(void)" R_MAIN_UserInit="void R_MAIN_UserInit(void)" /> + <main UserName="main" LibName="main" FixedName="" InUse="2" ForRTOS="false" Init="" /> + <R_MAIN_UserInit UserName="R_MAIN_UserInit" LibName="R_MAIN_UserInit" InUse="2" /> + </r_main.c> + <r_systeminit.c UserName="r_systeminit.c" LibName="systeminit.c" Compiler="CARL78,ICCRL78,CCRL" InUse="1"> + <Type systeminit="void R_Systeminit(void)" hdwinit="void hdwinit(void)" low_level_init="int __low_level_init(void)" inti_handler="void inti_handler(void)" idle_handler="void idle_handler(void)" /> + <R_Systeminit UserName="R_Systeminit" LibName="systeminit" InUse="1" Init="" /> + <hdwinit UserName="hdwinit" LibName="hdwinit" FixedName="" Compiler="CARL78,CCRL" InUse="1" Init="" /> + <__low_level_init UserName="" LibName="low_level_init" FixedName="" Compiler="ICCRL78" InUse="1" Init="" /> + </r_systeminit.c> + <r_hardware_setup.c UserName="" LibName="hardwaresetup.c" Compiler="GCCRL78" InUse="1"> + <Type systeminit="void R_Systeminit(void)" hardwaresetup="void HardwareSetup(void)" /> + <R_Systeminit UserName="" LibName="systeminit" InUse="1" Init="" /> + <HardwareSetup UserName="" LibName="hardwaresetup" FixedName="" InUse="1" Init="" /> + </r_hardware_setup.c> + <r_cg_vector_table.c UserName="" LibName="vectortable.c" Compiler="GCCRL78" InUse="1"> + <Type R_Dummy="void R_Dummy(void)" /> + <R_Dummy UserName="R_Dummy" LibName="R_Dummy" InUse="1" /> + </r_cg_vector_table.c> + <r_reset_program.asm UserName="" LibName="resetprogram.s" Compiler="GCCRL78" InUse="1" /> + <r_cg_interrupt_handlers.h UserName="" LibName="interrupthandlers.h" Compiler="GCCRL78" InUse="1" /> + <r_cg_macrodriver.h UserName="r_cg_macrodriver.h" LibName="macrodriver1.h" InUse="1" /> + <r_cg_userdefine.h UserName="r_cg_userdefine.h" LibName="userdefine.h" InUse="1" /> + <r_lk.dr UserName="" LibName="lk.dr" IsLibrary="false" Compiler="CARL78" InUse="1" /> + <r_mdlnk.xcl UserName="" LibName="md_lnk.xcl" Visible="false" IsLibrary="false" Compiler="ICCRL78" InUse="1" /> + <iodefine.head UserName="" LibName="iodefine.head" Visible="false" IsLibrary="false" Compiler="GCCRL78" InUse="1" /> + <iodefineext.head UserName="" LibName="iodefineext.head" Visible="false" IsLibrary="false" Compiler="GCCRL78" InUse="1" /> + <mdt.customdebuglinker UserName="" LibName="mdt.customdebuglinker" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.debuglinker UserName="" LibName="mdt.debuglinker" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.hardwaredebuglinker UserName="" LibName="mdt.hardwaredebuglinker" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.releaselinker UserName="" LibName="mdt.releaselinker" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.project UserName="" LibName="mdt.project" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.cproject UserName="" LibName="mdt.cproject" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.info UserName="" LibName="mdt.info" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <r_mdt.ipcf UserName="" LibName="mdt.ipcf" Visible="false" IsLibrary="false" Compiler="ICCRL78" ForAP="true" InUse="1" /> + <r_mdt.eww UserName="" LibName="mdt.eww" Visible="false" IsLibrary="false" Compiler="ICCRL78" ForAP="true" InUse="1" /> + <r_mdt.ewp UserName="" LibName="rl78mdt.ewp" Visible="false" IsLibrary="false" Compiler="ICCRL78" ForAP="true" InUse="1" /> + <r_mdt.txt UserName="r_mdt.txt" LibName="mdt.txt" Visible="false" IsLibrary="false" Compiler="CARL78,CCRL" ForAP="true" InUse="1" /> + </Common> + <CGC> + <r_cg_cgc.c UserName="r_cg_cgc.c" LibName=".c" InUse="1"> + <Type R_CGC_Create="void R_CGC_Create(void)" R_CGC_Set_ClockMode="MD_STATUS R_CGC_Set_ClockMode(enum ClockMode mode)" R_CGC_ClockMonitor_Start="void R_CGC_ClockMonitor_Start(void)" R_CGC_ClockMonitor_Stop="void R_CGC_ClockMonitor_Stop(void)" R_CGC_StackPointer_Start="void R_CGC_StackPointer_Start(void)" R_CGC_StackPointer_Stop="void R_CGC_StackPointer_Stop(void)" R_CGC_RAMECC_Start="void R_CGC_RAMECC_Start(void)" R_CGC_RAMECC_Stop="void R_CGC_RAMECC_Stop(void)" /> + <R_CGC_Create UserName="R_CGC_Create" LibName="R_CGC_Create" InUse="1" Init="1" InitMode="" /> + <R_CGC_Set_ClockMode UserName="R_CGC_Set_ClockMode" LibName="R_CGC_Set_ClockMode" InUse="0" /> + <R_CGC_ClockMonitor_Start UserName="R_CGC_ClockMonitor_Start" LibName="R_CGC_ClockMonitor_Start" InUse="0" /> + <R_CGC_ClockMonitor_Stop UserName="R_CGC_ClockMonitor_Stop" LibName="R_CGC_ClockMonitor_Stop" InUse="0" /> + <R_CGC_StackPointer_Start UserName="R_CGC_StackPointer_Start" LibName="R_CGC_StackPointer_Start" InUse="0" /> + <R_CGC_StackPointer_Stop UserName="R_CGC_StackPointer_Stop" LibName="R_CGC_StackPointer_Stop" InUse="0" /> + <R_CGC_RAMECC_Start UserName="R_CGC_RAMECC_Start" LibName="R_CGC_RAMECC_Start" InUse="0" /> + <R_CGC_RAMECC_Stop UserName="R_CGC_RAMECC_Stop" LibName="R_CGC_RAMECC_Stop" InUse="0" /> + </r_cg_cgc.c> + <r_cg_cgc_user.c UserName="r_cg_cgc_user.c" LibName="_user.c" InUse="1"> + <Type R_CGC_Get_ResetSource="void R_CGC_Get_ResetSource(void)" R_CGC_Create_UserInit="void R_CGC_Create_UserInit(void)" r_cgc_clockmonitor_interrupt="__interrupt static void r_cgc_clockmonitor_interrupt(void)" r_cgc_stackpointer_interrupt="__interrupt static void r_cgc_stackpointer_interrupt(void)" r_cgc_ram_ecc_interrupt="__interrupt static void r_cgc_ram_ecc_interrupt(void)" /> + <R_CGC_Create_UserInit UserName="R_CGC_Create_UserInit" LibName="R_CGC_Create_UserInit" InUse="0" /> + <R_CGC_Get_ResetSource UserName="R_CGC_Get_ResetSource" LibName="R_CGC_Get_ResetSource" Init="0" InUse="1" /> + <r_cgc_clockmonitor_interrupt UserName="r_cgc_clockmonitor_interrupt" INTHandle="" LibName="r_cgc_clockmonitor_interrupt" InUse="0" /> + <r_cgc_stackpointer_interrupt UserName="r_cgc_stackpointer_interrupt" INTHandle="" LibName="r_cgc_stackpointer_interrupt" InUse="0" /> + <r_cgc_ram_ecc_interrupt UserName="r_cgc_ram_ecc_interrupt" INTHandle="" LibName="r_cgc_ram_ecc_interrupt" InUse="0" /> + </r_cg_cgc_user.c> + <r_cg_cgc.h UserName="r_cg_cgc.h" LibName=".h" InUse="1" /> + <r_cg_pfdl.c UserName="r_cg_pfdl.c" LibName="_pfdl.c" InUse="1"> + <Type R_FDL_Create="void R_FDL_Create(void)" R_FDL_Write="pfdl_status_t R_FDL_Write(pfdl_u16 index, __near pfdl_u08* buffer, pfdl_u16 bytecount)" R_FDL_Read="pfdl_status_t R_FDL_Read(pfdl_u16 index, __near pfdl_u08* buffer, pfdl_u16 bytecount)" R_FDL_Erase="pfdl_status_t R_FDL_Erase(pfdl_u16 blockno)" R_FDL_Open="void R_FDL_Open(void)" R_FDL_Close="void PFDL_Close(void)" R_FDL_BlankCheck="pfdl_status_t R_FDL_BlankCheck(pfdl_u16 index, pfdl_u16 bytecount)" R_FDL_IVerify="pfdl_status_t R_FDL_IVerify(pfdl_u16 index, pfdl_u16 bytecount)" /> + <R_FDL_Create UserName="R_FDL_Create" LibName="R_FDL_Create" InUse="0" InitMode="" /> + <R_FDL_Write UserName="R_FDL_Write" LibName="R_FDL_Write" InUse="0" /> + <R_FDL_Read UserName="R_FDL_Read" LibName="R_FDL_Read" InUse="0" /> + <R_FDL_Erase UserName="R_FDL_Erase" LibName="R_FDL_Erase" InUse="0" /> + <R_FDL_Open UserName="R_FDL_Open" LibName="R_FDL_Open" InUse="0" /> + <R_FDL_Close UserName="R_FDL_Close" LibName="R_FDL_Close" InUse="0" /> + <R_FDL_BlankCheck UserName="R_FDL_BlankCheck" LibName="R_FDL_BlankCheck" InUse="0" /> + <R_FDL_IVerify UserName="R_FDL_IVerify" LibName="R_FDL_IVerify" InUse="0" /> + </r_cg_pfdl.c> + <r_cg_pfdl.h UserName="r_cg_pfdl.h" LibName="_pfdl.h" InUse="0" /> + </CGC> + <PORT> + <r_cg_port.c UserName="r_cg_port.c" LibName=".c"> + <Type R_PORT_Create="void R_PORT_Create(void)" /> + <R_PORT_Create UserName="R_PORT_Create" LibName="R_PORT_Create" Init="1" InitMode="" /> + </r_cg_port.c> + <r_cg_port_user.c UserName="r_cg_port_user.c" LibName="_user.c"> + <Type R_PORT_Create_UserInit="void R_PORT_Create_UserInit(void)" /> + <R_PORT_Create_UserInit UserName="R_PORT_Create_UserInit" LibName="R_PORT_Create_UserInit" /> + </r_cg_port_user.c> + <r_cg_port.h UserName="r_cg_port.h" LibName=".h" /> + </PORT> + <INTC> + <r_cg_intc.c UserName="r_cg_intc.c" LibName=".c" InUse=""> + <Type R_INTC_Create="void R_INTC_Create(void)" R_INTCn_Start="void R_INTCn_Start(void)" R_INTCn_Stop="void R_INTCn_Stop(void)" R_KEY_Create="void R_KEY_Create(void)" R_KEY_Start="void R_KEY_Start(void)" R_KEY_Stop="void R_KEY_Stop(void)" /> + <INTP> + <R_INTC_Create UserName="R_INTC_Create" LibName="R_INTC_Create" InUse="" Init="2" InitMode="" /> + <INTP0> + <R_INTC0_Start UserName="R_INTC0_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC0_Stop UserName="R_INTC0_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP0> + <INTP1> + <R_INTC1_Start UserName="R_INTC1_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC1_Stop UserName="R_INTC1_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP1> + <INTP2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC2_Start UserName="R_INTC2_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC2_Stop UserName="R_INTC2_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP2> + <INTP3 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC3_Start UserName="R_INTC3_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC3_Stop UserName="R_INTC3_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP3> + <INTP4> + <R_INTC4_Start UserName="R_INTC4_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC4_Stop UserName="R_INTC4_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP4> + <INTP5> + <R_INTC5_Start UserName="R_INTC5_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC5_Stop UserName="R_INTC5_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP5> + <INTP6 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC6_Start UserName="R_INTC6_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC6_Stop UserName="R_INTC6_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP6> + <INTP7 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC7_Start UserName="R_INTC7_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC7_Stop UserName="R_INTC7_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP7> + <INTP8 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC8_Start UserName="R_INTC8_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC8_Stop UserName="R_INTC8_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP8> + <INTP9 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC9_Start UserName="R_INTC9_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC9_Stop UserName="R_INTC9_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP9> + <INTP10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC10_Start UserName="R_INTC10_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC10_Stop UserName="R_INTC10_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP10> + <INTP11 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC11_Start UserName="R_INTC11_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC11_Stop UserName="R_INTC11_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP11> + <INTP12 Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ"> + <R_INTC12_Start UserName="R_INTC12_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC12_Stop UserName="R_INTC12_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP12> + <INTP13 Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ"> + <R_INTC13_Start UserName="R_INTC13_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC13_Stop UserName="R_INTC13_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP13> + </INTP> + <KEY Chip="RL78F14_80pin,RL78F14_100pin" PIOR50="0"> + <R_KEY_Create UserName="R_KEY_Create" LibName="R_KEY_Create" InUse="" Init="2" InitMode="" /> + <R_KEY_Start UserName="R_KEY_Start" LibName="R_KEY_Start" InUse="" /> + <R_KEY_Stop UserName="R_KEY_Stop" LibName="R_KEY_Stop" InUse="" /> + </KEY> + </r_cg_intc.c> + <r_cg_intc_user.c UserName="r_cg_intc_user.c" LibName="_user.c" InUse=""> + <Type R_INTC_Create_UserInit="void R_INTC_Create_UserInit(void)" r_intc0_interrupt="__interrupt static void r_intc0_interrupt(void)" r_intc1_interrupt="__interrupt static void r_intc1_interrupt(void)" r_intc2_interrupt="__interrupt static void r_intc2_interrupt(void)" r_intc3_interrupt="__interrupt static void r_intc3_interrupt(void)" r_intc4_interrupt="__interrupt static void r_intc4_interrupt(void)" r_intc5_interrupt="__interrupt static void r_intc5_interrupt(void)" r_intc6_interrupt="__interrupt static void r_intc6_interrupt(void)" r_intc7_interrupt="__interrupt static void r_intc7_interrupt(void)" r_intc8_interrupt="__interrupt static void r_intc8_interrupt(void)" r_intc9_interrupt="__interrupt static void r_intc9_interrupt(void)" r_intc10_interrupt="__interrupt static void r_intc10_interrupt(void)" r_intc11_interrupt="__interrupt static void r_intc11_interrupt(void)" r_intc12_interrupt="__interrupt static void r_intc12_interrupt(void)" r_intc13_interrupt="__interrupt static void r_intc13_interrupt(void)" R_KEY_Create_UserInit="void R_KEY_Create_UserInit(void)" r_key_interrupt="__interrupt static void r_key_interrupt(void)" /> + <INTP> + <R_INTC_Create_UserInit UserName="R_INTC_Create_UserInit" LibName="R_INTC_Create_UserInit" InUse="" /> + <r_intc0_interrupt UserName="r_intc0_interrupt" LibName="r_intc0_interrupt" INTHandle="" InUse="" /> + <r_intc1_interrupt UserName="r_intc1_interrupt" LibName="r_intc1_interrupt" INTHandle="" InUse="" /> + <r_intc2_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc2_interrupt" LibName="r_intc2_interrupt" INTHandle="" InUse="" /> + <r_intc3_interrupt Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc3_interrupt" LibName="r_intc3_interrupt" INTHandle="" InUse="" /> + <r_intc4_interrupt UserName="r_intc4_interrupt" LibName="r_intc4_interrupt" INTHandle="" InUse="" /> + <r_intc5_interrupt UserName="r_intc5_interrupt" LibName="r_intc5_interrupt" INTHandle="" InUse="" /> + <r_intc6_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc6_interrupt" LibName="r_intc6_interrupt" INTHandle="" InUse="" /> + <r_intc7_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc7_interrupt" LibName="r_intc7_interrupt" INTHandle="" InUse="" /> + <r_intc8_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc8_interrupt" LibName="r_intc8_interrupt" INTHandle="" InUse="" /> + <r_intc9_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc9_interrupt" LibName="r_intc9_interrupt" INTHandle="" InUse="" /> + <r_intc10_interrupt Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc10_interrupt" LibName="r_intc10_interrupt" INTHandle="" InUse="" /> + <r_intc11_interrupt Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc11_interrupt" LibName="r_intc11_interrupt" INTHandle="" InUse="" /> + <r_intc12_interrupt Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" UserName="r_intc12_interrupt" LibName="r_intc12_interrupt" INTHandle="" InUse="" /> + <r_intc13_interrupt Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" UserName="r_intc13_interrupt" LibName="r_intc13_interrupt" INTHandle="" InUse="" /> + </INTP> + <KEY Chip="RL78F14_80pin,RL78F14_100pin" PIOR50="0"> + <R_KEY_Create_UserInit UserName="R_KEY_Create_UserInit" LibName="R_KEY_Create_UserInit" InUse="" /> + <r_key_interrupt UserName="r_key_interrupt" LibName="r_key_interrupt" INTHandle="" InUse="" /> + </KEY> + </r_cg_intc_user.c> + <r_cg_intc.h UserName="r_cg_intc.h" LibName=".h" InUse="" /> + </INTC> + <Serial> + <r_cg_serial.c UserName="r_cg_serial.c" LibName=".c" InUse=""> + <Type R_SAUn_Create="void R_SAUn_Create(void)" R_SAUn_Set_PowerOff="void R_SAUn_Set_PowerOff(void)" R_SAUn_Set_SnoozeOn="void R_SAUn_Set_SnoozeOn(void)" R_SAUn_Set_SnoozeOff="void R_SAUn_Set_SnoozeOff(void)" R_UARTn_Create="void R_UARTn_Create(void)" R_UARTn_Send="MD_STATUS R_UARTn_Send(uint8_t const * tx_buf, uint16_t tx_num)" R_UARTn_Receive="MD_STATUS R_UARTn_Receive(uint8_t const * rx_buf, uint16_t rx_num)" R_UARTn_Start="void R_UARTn_Start(void)" R_UARTn_Stop="void R_UARTn_Stop(void)" R_CSIn_Create="void R_CSIn_Create(void)" R_CSIn_Send="MD_STATUS R_CSIn_Send(uint8_t const * tx_buf, uint16_t tx_num)" R_CSIn_Receive="MD_STATUS R_CSIn_Receive(uint8_t const * rx_buf, uint16_t rx_num) " R_CSIn_Send_Receive="MD_STATUS R_CSIn_Send_Receive(uint8_t const * tx_buf, uint16_t tx_num, uint8_t const * rx_buf) " R_CSIn_Start="void R_CSIn_Start(void)" R_CSIn_Stop="void R_CSIn_Stop(void)" R_IICn_Create="void R_IICn_Create(void)" R_IICn_Master_Send="void R_IICn_Master_Send(uint8_t adr, uint8_t const * tx_buf, uint16_t txnum)" R_IICn_Master_Receive="void R_IICn_Master_Receive(uint8_t adr, uint8_t const * rx_buf, uint16_t rx_num) " R_IICn_Stop="void R_IICn_Stop(void)" R_IICn_StartCondition="void R_IICn_StartCondition(void)" R_IICn_StopCondition="void R_IICn_StopCondition(void)" R_UARTFn_Create="void R_UARTFn_Create(void)" R_UARTFn_Send="MD_STATUS R_UARTFn_Send(uint8_t * const tx_buf, uint16_t tx_num)" R_UARTFn_Receive="MD_STATUS R_UARTFn_Receive(uint8_t * const rx_buf, uint16_t rx_num)" R_UARTFn_Set_ComparisonData="void R_UARTFn_Set_ComparisonData(uint16_t com_data)" R_UARTFn_Set_DataComparisonOn="void R_UARTFn_Set_DataComparisonOn(void)" R_UARTFn_Set_DataComparisonOff="void R_UARTFn_Set_DataComparisonOff(void)" R_UARTFn_Set_PowerOff="void R_UARTFn_Set_PowerOff(void)" R_IICAn_Create="void R_IICAn_Create(void)" R_IICAn_Master_Send="MD_STATUS R_IICAn_Master_Send(uint8_t adr, uint8_t * const tx_buf, uint16_t tx_num, uint8_t wait)" R_IICAn_Master_Receive="MD_STATUS R_IICAn_Master_Receive(uint8_t adr, uint8_t * const rx_buf, uint16_t rx_num, uint8_t wait)" R_IICAn_Slave_Send="void R_IICAn_Slave_Send(uint8_t * const tx_buf, uint16_t tx_num)" R_IICAn_Slave_Receive="void R_IICAn_Slave_Receive(uint8_t * const rx_buf, uint16_t rx_num)" R_IICAn_Stop="void R_IICAn_Stop(void)" R_IICAn_StopCondition="void R_IICAn_StopCondition(void)" R_IICAn_Set_SnoozeOn="void R_IICAn_Set_SnoozeOn(void)" R_IICAn_Set_SnoozeOff="void R_IICAn_Set_SnoozeOff(void)" R_IICAn_Set_PowerOff="void R_IICAn_Set_PowerOff(void)" /> + <SAU0 InUse=""> + <R_SAU0_Create UserName="R_SAU0_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU0_Set_PowerOff UserName="R_SAU0_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <R_SAU0_Set_SnoozeOn UserName="R_SAU0_Set_SnoozeOn" LibName="R_SAUn_Set_SnoozeOn" InUse="" /> + <R_SAU0_Set_SnoozeOff UserName="R_SAU0_Set_SnoozeOff" LibName="R_SAUn_Set_SnoozeOff" InUse="" /> + <UART0 InUse=""> + <R_UART0_Create UserName="R_UART0_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART0_Start UserName="R_UART0_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART0_Stop UserName="R_UART0_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART0_Send UserName="R_UART0_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART0_Receive UserName="R_UART0_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART0> + <CSI00 InUse=""> + <R_CSI00_Create UserName="R_CSI00_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI00_Start UserName="R_CSI00_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI00_Stop UserName="R_CSI00_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI00_Send UserName="R_CSI00_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI00_Receive UserName="R_CSI00_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI00_Send_Receive UserName="R_CSI00_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI00> + <CSI01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0"> + <R_CSI01_Create UserName="R_CSI01_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI01_Start UserName="R_CSI01_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI01_Stop UserName="R_CSI01_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI01_Send UserName="R_CSI01_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI01_Receive UserName="R_CSI01_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI01_Send_Receive UserName="R_CSI01_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI01> + <CSI01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin" PIOR41="1"> + <R_CSI01_Create UserName="" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI01_Start UserName="" LibName="R_CSIn_Start" InUse="" /> + <R_CSI01_Stop UserName="" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI01_Send UserName="" LibName="R_CSIn_Send" InUse="" /> + <R_CSI01_Receive UserName="" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI01_Send_Receive UserName="" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI01> + <IIC00 InUse=""> + <R_IIC00_Create UserName="R_IIC00_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC00_Master_Send UserName="R_IIC00_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC00_Master_Receive UserName="R_IIC00_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC00_Stop UserName="R_IIC00_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC00_StartCondition UserName="R_IIC00_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC00_StopCondition UserName="R_IIC00_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC00> + <IIC01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0"> + <R_IIC01_Create UserName="R_IIC01_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC01_Master_Send UserName="R_IIC01_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC01_Master_Receive UserName="R_IIC01_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC01_Stop UserName="R_IIC01_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC01_StartCondition UserName="R_IIC01_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC01_StopCondition UserName="R_IIC01_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC01> + </SAU0> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR43="1" PIOR42="1" InUse=""> + <R_SAU1_Create UserName="R_SAU1_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU1_Set_PowerOff UserName="R_SAU1_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <UART1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <R_UART1_Create UserName="R_UART1_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART1_Start UserName="R_UART1_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART1_Stop UserName="R_UART1_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART1_Send UserName="R_UART1_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART1_Receive UserName="R_UART1_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART1> + <CSI10 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <R_CSI10_Create UserName="R_CSI10_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI10_Start UserName="R_CSI10_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI10_Stop UserName="R_CSI10_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI10_Send UserName="R_CSI10_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI10_Receive UserName="R_CSI10_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI10_Send_Receive UserName="R_CSI10_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_100pin" PIOR43="1" InUse=""> + <R_CSI11_Create UserName="" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + </SAU1> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin" PIOR43="0" PIOR42="1" InUse=""> + <R_SAU1_Create UserName="R_SAU1_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU1_Set_PowerOff UserName="R_SAU1_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <UART1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR42="1" InUse=""> + <R_UART1_Create UserName="R_UART1_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART1_Start UserName="R_UART1_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART1_Stop UserName="R_UART1_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART1_Send UserName="R_UART1_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART1_Receive UserName="R_UART1_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART1> + <CSI10 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR42="1" InUse=""> + <R_CSI10_Create UserName="R_CSI10_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI10_Start UserName="R_CSI10_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI10_Stop UserName="R_CSI10_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI10_Send UserName="R_CSI10_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI10_Receive UserName="R_CSI10_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI10_Send_Receive UserName="R_CSI10_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR43="0" InUse=""> + <R_CSI11_Create UserName="" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + <IIC11 Chip="groupe,groupd2" PIOR43="0" InUse=""> + <R_IIC11_Create UserName="R_IIC11_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC11_Master_Send UserName="R_IIC11_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC11_Master_Receive UserName="R_IIC11_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC11_Stop UserName="R_IIC11_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC11_StartCondition UserName="R_IIC11_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC11_StopCondition UserName="R_IIC11_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC11> + </SAU1> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin" PIOR42="0" InUse=""> + <R_SAU1_Create UserName="R_SAU1_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU1_Set_PowerOff UserName="R_SAU1_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <UART1 Chip="groupe,RL78F14_32pin,groupd2" InUse=""> + <R_UART1_Create UserName="R_UART1_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART1_Start UserName="R_UART1_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART1_Stop UserName="R_UART1_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART1_Send UserName="R_UART1_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART1_Receive UserName="R_UART1_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART1> + <CSI10 Chip="groupe,RL78F14_32pin,groupd2" InUse=""> + <R_CSI10_Create UserName="R_CSI10_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI10_Start UserName="R_CSI10_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI10_Stop UserName="R_CSI10_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI10_Send UserName="R_CSI10_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI10_Receive UserName="R_CSI10_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI10_Send_Receive UserName="R_CSI10_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR43="0" InUse=""> + <R_CSI11_Create UserName="R_CSI11_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="R_CSI11_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="R_CSI11_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="R_CSI11_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="R_CSI11_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="R_CSI11_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + <CSI11 Chip="RL78F14_100pin" PIOR43="1" InUse=""> + <R_CSI11_Create UserName="" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + <IIC10 Chip="groupe,RL78F14_32pin,groupd2" InUse=""> + <R_IIC10_Create UserName="R_IIC10_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC10_Master_Send UserName="R_IIC10_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC10_Master_Receive UserName="R_IIC10_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC10_Stop UserName="R_IIC10_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC10_StartCondition UserName="R_IIC10_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC10_StopCondition UserName="R_IIC10_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC10> + <IIC11 Chip="groupe,groupd2" PIOR43="0" InUse=""> + <R_IIC11_Create UserName="R_IIC11_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC11_Master_Send UserName="R_IIC11_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC11_Master_Receive UserName="R_IIC11_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC11_Stop UserName="R_IIC11_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC11_StartCondition UserName="R_IIC11_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC11_StopCondition UserName="R_IIC11_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC11> + </SAU1> + <IICA0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse=""> + <R_IICA0_Create UserName="R_IICA0_Create" LibName="R_IICAn_Create" InUse="" Init="1" InitMode="" /> + <R_IICA0_Master_Send UserName="R_IICA0_Master_Send" LibName="R_IICAn_Master_Send" InUse="" /> + <R_IICA0_Master_Receive UserName="R_IICA0_Master_Receive" LibName="R_IICAn_Master_Receive" InUse="" /> + <R_IICA0_Slave_Send UserName="R_IICA0_Slave_Send" LibName="R_IICAn_Slave_Send" InUse="" /> + <R_IICA0_Slave_Receive UserName="R_IICA0_Slave_Receive" LibName="R_IICAn_Slave_Receive" InUse="" /> + <R_IICA0_Stop UserName="R_IICA0_Stop" LibName="R_IICAn_Stop" InUse="" /> + <R_IICA0_StopCondition UserName="R_IICA0_StopCondition" LibName="R_IICAn_StopCondition" InUse="" /> + <R_IICA0_Set_SnoozeOn UserName="R_IICA0_Set_SnoozeOn" LibName="R_IICAn_Set_SnoozeOn" InUse="" /> + <R_IICA0_Set_SnoozeOff UserName="R_IICA0_Set_SnoozeOff" LibName="R_IICAn_Set_SnoozeOff" InUse="" /> + <R_IICA0_Set_PowerOff UserName="R_IICA0_Set_PowerOff" LibName="R_IICAn_Set_PowerOff" InUse="" /> + </IICA0> + </r_cg_serial.c> + <r_cg_serial_user.c UserName="r_cg_serial_user.c" LibName="_user.c" InUse=""> + <Type R_SAUn_Create_UserInit="void R_SAUn_Create_UserInit(void)" r_uartn_interrupt_receive="__interrupt void r_uartn_interrupt_receive(void)" r_uartn_interrupt_error="__interrupt void r_uartn_interrupt_error(void)" r_uartn_interrupt_send="__interrupt void r_uartn_interrupt_send(void)" r_uartn_callback_sendend="void r_uartn_callback_sendend(void)" r_uartn_callback_receiveend="void r_uartn_callback_receiveend(void)" r_uartn_callback_error="void r_uartn_callback_error(uint16_t err_type)" r_uartn_callback_softwareoverrun="void r_uartn_callback_softwareoverrun(uint16_t err_type)" r_csin_interrupt="__interrupt void r_csin_interrupt(void)" r_csin_callback_receiveend="void r_csin_callback_receiveend(void)" r_csin_callback_error="void r_csin_callback_error(uint16_t err_type)" r_csin_callback_sendend="void r_csin_callback_sendend(void)" r_iicn_interrupt="__interrupt void r_iicn_interrupt(void)" r_iicn_callback_master_receiveend="void r_iicn_callback_master_receiveend(void)" r_iicn_callback_master_sendend="void r_iicn_callback_master_sendend(void)" r_iicn_callback_master_error="void r_iicn_callback_master_error(MD_STATUS flag)" R_UARTFn_Create_UserInit="void R_UARTFn_Create_UserInit(void)" r_uartfn_interrupt_receive="__interrupt static void r_uartfn_interrupt_receive(void)" r_uartfn_interrupt_error="__interrupt static void r_uartfn_interrupt_error(void)" r_uartfn_interrupt_send="__interrupt static void r_uartfn_interrupt_send(void)" r_uartfn_callback_receiveend="static void r_uartfn_callback_receiveend(void)" r_uartfn_callback_sendend="static void r_uartfn_callback_sendend(void)" r_uartfn_callback_error="static void r_uartfn_callback_error(void)" r_uartfn_callback_softwareoverrun="static void r_uartfn_callback_softwareoverrun(uint16_t rx_data)" r_uartfn_callback_expbitdetect="static void r_uartfn_callback_expbitdetect(void)" r_uartfn_callback_idmatch="static void r_uartfn_callback_idmatch(void)" R_IICAn_Create_UserInit="void R_IICAn_Create_UserInit(void)" r_iican_interrupt="__interrupt static r_iican_interrupt(void)" r_iican_callback_master_sendend="static void r_iican_callback_master_sendend(void)" r_iican_callback_master_receiveend="static void r_iican_callback_master_receiveend(void)" r_iican_callback_slave_sendend="static void r_iican_callback_slave_sendend(void)" r_iican_callback_slave_receiveend="static void r_iican_callback_slave_receiveend(void)" r_iican_callback_master_error="static void r_iican_callback_master_error(MD_STATUS flag)" r_iican_callback_slave_error="static void r_iican_callback_slave_error(MD_STATUS flag)" r_iican_callback_getstopcondition="static void r_iican_callback_getstopcondition(void)" /> + <SAU0 InUse=""> + <R_SAU0_Create_UserInit UserName="R_SAU0_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART0 InUse=""> + <r_uart0_interrupt_receive UserName="r_uart0_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart0_interrupt_send UserName="r_uart0_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart0_callback_receiveend UserName="r_uart0_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart0_callback_sendend UserName="r_uart0_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart0_callback_error UserName="r_uart0_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart0_callback_softwareoverrun UserName="r_uart0_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART0> + <CSI00 InUse=""> + <r_csi00_interrupt UserName="r_csi00_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi00_callback_receiveend UserName="r_csi00_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi00_callback_error UserName="r_csi00_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi00_callback_sendend UserName="r_csi00_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI00> + <CSI01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0"> + <r_csi01_interrupt UserName="r_csi01_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi01_callback_receiveend UserName="r_csi01_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi01_callback_error UserName="r_csi01_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi01_callback_sendend UserName="r_csi01_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI01> + <CSI01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin" PIOR41="1"> + <r_csi01_interrupt UserName="" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi01_callback_receiveend UserName="" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi01_callback_error UserName="" LibName="r_csin_callback_error" InUse="" /> + <r_csi01_callback_sendend UserName="" LibName="r_csin_callback_sendend" InUse="" /> + </CSI01> + <IIC00 InUse=""> + <r_iic00_interrupt UserName="r_iic00_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic00_callback_master_receiveend UserName="r_iic00_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic00_callback_master_sendend UserName="r_iic00_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic00_callback_master_error UserName="r_iic00_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC00> + <IIC01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0"> + <r_iic01_interrupt UserName="r_iic01_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic01_callback_master_receiveend UserName="r_iic01_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic01_callback_master_sendend UserName="r_iic01_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic01_callback_master_error UserName="r_iic01_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC01> + </SAU0> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR43="1" PIOR42="1" InUse=""> + <R_SAU1_Create_UserInit UserName="R_SAU1_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <r_uart1_interrupt_receive UserName="r_uart1_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart1_interrupt_send UserName="r_uart1_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart1_callback_receiveend UserName="r_uart1_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart1_callback_sendend UserName="r_uart1_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart1_callback_error UserName="r_uart1_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart1_callback_softwareoverrun UserName="r_uart1_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART1> + <CSI10 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <r_csi10_interrupt UserName="r_csi10_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi10_callback_receiveend UserName="r_csi10_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi10_callback_error UserName="r_csi10_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi10_callback_sendend UserName="r_csi10_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_100pin" PIOR43="1" InUse=""> + <r_csi11_interrupt UserName="" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + </SAU1> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin" PIOR43="0" PIOR42="1" InUse=""> + <R_SAU1_Create_UserInit UserName="R_SAU1_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR42="1" InUse=""> + <r_uart1_interrupt_receive UserName="r_uart1_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart1_interrupt_send UserName="r_uart1_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart1_callback_receiveend UserName="r_uart1_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart1_callback_sendend UserName="r_uart1_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart1_callback_error UserName="r_uart1_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart1_callback_softwareoverrun UserName="r_uart1_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART1> + <CSI10 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <r_csi10_interrupt UserName="r_csi10_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi10_callback_receiveend UserName="r_csi10_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi10_callback_error UserName="r_csi10_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi10_callback_sendend UserName="r_csi10_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse=""> + <r_csi11_interrupt UserName="" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + <IIC11 Chip="groupe,groupd2" PIOR43="0" InUse=""> + <r_iic11_interrupt UserName="r_iic11_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic11_callback_master_receiveend UserName="r_iic11_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic11_callback_master_sendend UserName="r_iic11_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic11_callback_master_error UserName="r_iic11_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC11> + </SAU1> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin" PIOR42="0" InUse=""> + <R_SAU1_Create_UserInit UserName="R_SAU1_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART1 Chip="groupe,RL78F14_32pin,groupd2" InUse=""> + <r_uart1_interrupt_receive UserName="r_uart1_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart1_interrupt_send UserName="r_uart1_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart1_callback_receiveend UserName="r_uart1_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart1_callback_sendend UserName="r_uart1_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart1_callback_error UserName="r_uart1_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart1_callback_softwareoverrun UserName="r_uart1_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART1> + <CSI10 Chip="groupe,groupd2,RL78F14_32pin" InUse=""> + <r_csi10_interrupt UserName="r_csi10_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi10_callback_receiveend UserName="r_csi10_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi10_callback_error UserName="r_csi10_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi10_callback_sendend UserName="r_csi10_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR43="0" InUse=""> + <r_csi11_interrupt UserName="r_csi11_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="r_csi11_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="r_csi11_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="r_csi11_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + <CSI11 Chip="RL78F14_100pin" PIOR43="1" InUse=""> + <r_csi11_interrupt UserName="" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + <IIC10 Chip="groupe,groupd2,RL78F14_32pin" InUse=""> + <r_iic10_interrupt UserName="r_iic10_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic10_callback_master_receiveend UserName="r_iic10_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic10_callback_master_sendend UserName="r_iic10_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic10_callback_master_error UserName="r_iic10_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC10> + <IIC11 Chip="groupe,groupd2" PIOR43="0" InUse=""> + <r_iic11_interrupt UserName="r_iic11_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic11_callback_master_receiveend UserName="r_iic11_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic11_callback_master_sendend UserName="r_iic11_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic11_callback_master_error UserName="r_iic11_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC11> + </SAU1> + <IICA0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse=""> + <R_IICA0_Create_UserInit UserName="R_IICA0_Create_UserInit" LibName="R_IICAn_Create_UserInit" InUse="" /> + <r_iica0_interrupt UserName="r_iica0_interrupt" INTHandle="" LibName="r_iican_interrupt" InUse="" /> + <r_iica0_callback_master_sendend UserName="r_iica0_callback_master_sendend" LibName="r_iican_callback_master_sendend" InUse="" /> + <r_iica0_callback_master_receiveend UserName="r_iica0_callback_master_receiveend" LibName="r_iican_callback_master_receiveend" InUse="" /> + <r_iica0_callback_slave_sendend UserName="r_iica0_callback_slave_sendend" LibName="r_iican_callback_slave_sendend" InUse="" /> + <r_iica0_callback_slave_receiveend UserName="r_iica0_callback_slave_receiveend" LibName="r_iican_callback_slave_receiveend" InUse="" /> + <r_iica0_callback_master_error UserName="r_iica0_callback_master_error" LibName="r_iican_callback_master_error" InUse="" /> + <r_iica0_callback_slave_error UserName="r_iica0_callback_slave_error" LibName="r_iican_callback_slave_error" InUse="" /> + <r_iica0_callback_getstopcondition UserName="r_iica0_callback_getstopcondition" LibName="r_iican_callback_getstopcondition" InUse="" /> + </IICA0> + </r_cg_serial_user.c> + <r_cg_serial.h UserName="r_cg_serial.h" LibName=".h" InUse="" /> + </Serial> + <ADC> + <r_cg_adc.c UserName="r_cg_adc.c" LibName=".c" InUse=""> + <Type R_ADC_Create="void R_ADC_Create(void)" R_ADC_Start="void R_ADC_Start(void)" R_ADC_Stop="void R_ADC_Stop(void)" R_ADC_Set_OperationOn="void R_ADC_Set_OperationOn(void)" R_ADC_Set_OperationOff="void R_ADC_Set_OperationOff(void)" R_ADC_Get_Result="void R_ADC_Get_Result(uint16_t * const buffer)" R_ADC_Get_Result_8bit="void R_ADC_Get_Result_8bit(uint8_t * const buffer)" R_ADC_Set_ADChannel="MD_STATUS R_ADC_Set_ADChannel(ad_channel_t channel)" R_ADC_Set_SnoozeOn="void R_ADC_Set_SnoozeOn(void)" R_ADC_Set_SnoozeOff="void R_ADC_Set_SnoozeOff(void)" R_ADC_Set_TestChannel="MD_STATUS R_ADC_Set_TestChannel(test_channel_t channel)" R_ADC_Set_PowerOff="void R_ADC_Set_PowerOff(void)" /> + <R_ADC_Create UserName="R_ADC_Create" LibName="R_ADC_Create" InUse="" Init="1" InitMode="" /> + <R_ADC_Start UserName="R_ADC_Start" LibName="R_ADC_Start" InUse="" /> + <R_ADC_Stop UserName="R_ADC_Stop" LibName="R_ADC_Stop" InUse="" /> + <R_ADC_Set_OperationOn UserName="R_ADC_Set_OperationOn" LibName="R_ADC_Set_OperationOn" InUse="" /> + <R_ADC_Set_OperationOff UserName="R_ADC_Set_OperationOff" LibName="R_ADC_Set_OperationOff" InUse="" /> + <R_ADC_Get_Result UserName="R_ADC_Get_Result" LibName="R_ADC_Get_Result" InUse="" /> + <R_ADC_Get_Result_8bit UserName="R_ADC_Get_Result_8bit" LibName="R_ADC_Get_Result_8bit" InUse="" /> + <R_ADC_Set_ADChannel UserName="R_ADC_Set_ADChannel" LibName="R_ADC_Set_ADChannel" InUse="" /> + <R_ADC_Set_SnoozeOn UserName="R_ADC_Set_SnoozeOn" LibName="R_ADC_Set_SnoozeOn" InUse="" /> + <R_ADC_Set_SnoozeOff UserName="R_ADC_Set_SnoozeOff" LibName="R_ADC_Set_SnoozeOff" InUse="" /> + <R_ADC_Set_TestChannel UserName="R_ADC_Set_TestChannel" LibName="R_ADC_Set_TestChannel" InUse="" /> + <R_ADC_Set_PowerOff UserName="R_ADC_Set_PowerOff" LibName="R_ADC_Set_PowerOff" InUse="" /> + </r_cg_adc.c> + <r_cg_adc_user.c UserName="r_cg_adc_user.c" LibName="_user.c" InUse=""> + <Type R_ADC_Create_UserInit="void R_ADC_Create_UserInit(void)" r_adc_interrupt="__interrupt static void r_adc_interrupt(void)" /> + <R_ADC_Create_UserInit UserName="R_ADC_Create_UserInit" LibName="R_ADC_Create_UserInit" InUse="" /> + <r_adc_interrupt UserName="r_adc_interrupt" INTHandle="" LibName="r_adc_interrupt" InUse="" /> + </r_cg_adc_user.c> + <r_cg_adc.h UserName="r_cg_adc.h" LibName=".h" InUse="" /> + </ADC> + <TAU> + <r_cg_timer.c UserName="r_cg_timer.c" LibName=".c" InUse=""> + <Type R_TAU_Create="void R_TAU_Create(void)" R_TAU_Set_PowerOff="void R_TAU_Set_PowerOff(void)" R_TAU_Channeln_Start="void R_TAU_Channeln_Start(void)" R_TAU_Channeln_Higher8bits_Start="void R_TAU_Channeln_Higher8bits_Start(void)" R_TAU_Channeln_Lower8bits_Start="void R_TAU_Channeln_Lower8bits_Start(void)" R_TAU_Channeln_Stop="void R_TAU_Channeln_Stop(void)" R_TAU_Channeln_Higher8bits_Stop="void R_TAU_Channeln_Higher8bits_Stop(void)" R_TAU_Channeln_Lower8bits_Stop="void R_TAU_Channeln_Lower8bits_Stop(void)" R_TAU_Channeln_Get_PulseWidth="void R_TAU_Channeln_Get_PulseWidth(uint32_t * const width)" R_TAU_Channeln_Set_SoftwareTriggerOn="void R_TAU_Channeln_Set_SoftwareTriggerOn(void)" R_WUTM_Create="void R_WUTM_Create(void)" R_WUTM_Start="void R_WUTM_Start(void)" R_WUTM_Stop="void R_WUTM_Stop(void)" R_WUTM_Set_PowerOff="void R_WUTM_Set_PowerOff(void)" /> + <TAU0> + <R_TAU0_Create UserName="R_TAU0_Create" LibName="R_TAU_Create" InUse="" Init="1" InitMode="" /> + <R_TAU0_Set_PowerOff UserName="R_TAU0_Set_PowerOff" LibName="R_TAU_Set_PowerOff" InUse="" /> + <Channel0 InUse=""> + <R_TAU0_Channel0_Start UserName="R_TAU0_Channel0_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel0_Stop UserName="R_TAU0_Channel0_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel0_Get_PulseWidth Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_80pin,RL78F14_100pin" UserName="R_TAU0_Channel0_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU0_Channel0_Set_SoftwareTriggerOn UserName="R_TAU0_Channel0_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <R_TAU0_Channel1_Start UserName="R_TAU0_Channel1_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel1_Higher8bits_Start UserName="R_TAU0_Channel1_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU0_Channel1_Lower8bits_Start UserName="R_TAU0_Channel1_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU0_Channel1_Stop UserName="R_TAU0_Channel1_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel1_Higher8bits_Stop UserName="R_TAU0_Channel1_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU0_Channel1_Lower8bits_Stop UserName="R_TAU0_Channel1_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU0_Channel1_Get_PulseWidth UserName="R_TAU0_Channel1_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <R_TAU0_Channel2_Start UserName="R_TAU0_Channel2_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel2_Stop UserName="R_TAU0_Channel2_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel2_Get_PulseWidth Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_80pin,RL78F14_100pin" UserName="R_TAU0_Channel2_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU0_Channel2_Set_SoftwareTriggerOn UserName="R_TAU0_Channel2_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <R_TAU0_Channel3_Start UserName="R_TAU0_Channel3_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel3_Higher8bits_Start UserName="R_TAU0_Channel3_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU0_Channel3_Lower8bits_Start UserName="R_TAU0_Channel3_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU0_Channel3_Stop UserName="R_TAU0_Channel3_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel3_Higher8bits_Stop UserName="R_TAU0_Channel3_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU0_Channel3_Lower8bits_Stop UserName="R_TAU0_Channel3_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU0_Channel3_Get_PulseWidth Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_100pin" UserName="R_TAU0_Channel3_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel3> + <Channel4 InUse=""> + <R_TAU0_Channel4_Start UserName="R_TAU0_Channel4_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel4_Stop UserName="R_TAU0_Channel4_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel4_Get_PulseWidth Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_80pin,RL78F14_100pin" UserName="R_TAU0_Channel4_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU0_Channel4_Set_SoftwareTriggerOn UserName="R_TAU0_Channel4_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel4> + <Channel5 InUse=""> + <R_TAU0_Channel5_Start UserName="R_TAU0_Channel5_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel5_Stop UserName="R_TAU0_Channel5_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel5_Get_PulseWidth UserName="R_TAU0_Channel5_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel5> + <Channel6 InUse=""> + <R_TAU0_Channel6_Start UserName="R_TAU0_Channel6_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel6_Stop UserName="R_TAU0_Channel6_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel6_Get_PulseWidth UserName="R_TAU0_Channel6_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU0_Channel6_Set_SoftwareTriggerOn Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_80pin,RL78F14_100pin" UserName="R_TAU0_Channel6_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel6> + <Channel7 InUse=""> + <R_TAU0_Channel7_Start UserName="R_TAU0_Channel7_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel7_Stop UserName="R_TAU0_Channel7_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel7_Get_PulseWidth UserName="R_TAU0_Channel7_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel7> + </TAU0> + <TAU1> + <R_TAU1_Create UserName="R_TAU1_Create" LibName="R_TAU_Create" InUse="" Init="1" InitMode="" /> + <R_TAU1_Set_PowerOff UserName="R_TAU1_Set_PowerOff" LibName="R_TAU_Set_PowerOff" InUse="" /> + <Channel0 InUse=""> + <R_TAU1_Channel0_Start UserName="R_TAU1_Channel0_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel0_Stop UserName="R_TAU1_Channel0_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel0_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel0_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel0_Set_SoftwareTriggerOn UserName="R_TAU1_Channel0_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <R_TAU1_Channel1_Start UserName="R_TAU1_Channel1_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel1_Higher8bits_Start UserName="R_TAU1_Channel1_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU1_Channel1_Lower8bits_Start UserName="R_TAU1_Channel1_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU1_Channel1_Stop UserName="R_TAU1_Channel1_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel1_Higher8bits_Stop UserName="R_TAU1_Channel1_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU1_Channel1_Lower8bits_Stop UserName="R_TAU1_Channel1_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU1_Channel1_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel1_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <R_TAU1_Channel2_Start UserName="R_TAU1_Channel2_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel2_Stop UserName="R_TAU1_Channel2_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel2_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel2_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel2_Set_SoftwareTriggerOn UserName="R_TAU1_Channel2_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <R_TAU1_Channel3_Start UserName="R_TAU1_Channel3_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel3_Higher8bits_Start UserName="R_TAU1_Channel3_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU1_Channel3_Lower8bits_Start UserName="R_TAU1_Channel3_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU1_Channel3_Stop UserName="R_TAU1_Channel3_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel3_Higher8bits_Stop UserName="R_TAU1_Channel3_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU1_Channel3_Lower8bits_Stop UserName="R_TAU1_Channel3_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU1_Channel3_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel3_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel3> + <Channel4 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <R_TAU1_Channel4_Start UserName="R_TAU1_Channel4_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel4_Stop UserName="R_TAU1_Channel4_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel4_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel4_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel4_Set_SoftwareTriggerOn UserName="R_TAU1_Channel4_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel4> + <Channel5 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <R_TAU1_Channel5_Start UserName="R_TAU1_Channel5_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel5_Stop UserName="R_TAU1_Channel5_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel5_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel5_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel5> + <Channel6 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <R_TAU1_Channel6_Start UserName="R_TAU1_Channel6_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel6_Stop UserName="R_TAU1_Channel6_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel6_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel6_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel6_Set_SoftwareTriggerOn UserName="R_TAU1_Channel6_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel6> + <Channel7 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <R_TAU1_Channel7_Start UserName="R_TAU1_Channel7_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel7_Stop UserName="R_TAU1_Channel7_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel7_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel7_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel7> + </TAU1> + <TMRJ0 InUse=""> + <R_TMR_RJ0_Create UserName="R_TMR_RJ0_Create" LibName="R_TMR_RJn_Create" InUse="" Init="2" InitMode="" /> + <R_TMR_RJ0_Start UserName="R_TMR_RJ0_Start" LibName="R_TMR_RJn_Start" InUse="" /> + <R_TMR_RJ0_Stop UserName="R_TMR_RJ0_Stop" LibName="R_TMR_RJn_Stop" InUse="" /> + <R_TMR_RJ0_Get_PulseWidth UserName="R_TMR_RJ0_Get_PulseWidth" LibName="R_TMR_RJn_Get_PulseWidth" InUse="" /> + <R_TMR_RJ0_Set_PowerOff UserName="R_TMR_RJ0_Set_PowerOff" LibName="R_TMR_RJn_Set_PowerOff" InUse="" /> + </TMRJ0> + <TMRD0 InUse=""> + <R_TMR_RD0_Create UserName="R_TMR_RD0_Create" LibName="R_TMR_RDn_Create" InUse="" Init="2" InitMode="" /> + <R_TMR_RD0_Start UserName="R_TMR_RD0_Start" LibName="R_TMR_RDn_Start" InUse="" /> + <R_TMR_RD0_Stop UserName="R_TMR_RD0_Stop" LibName="R_TMR_RDn_Stop" InUse="" /> + <R_TMR_RD0_Get_PulseWidth UserName="R_TMR_RD0_Get_PulseWidth" LibName="R_TMR_RDn_Get_PulseWidth" InUse="" /> + <R_TMR_RD0_Set_PowerOff UserName="R_TMR_RD0_Set_PowerOff" LibName="R_TMR_RDn_Set_PowerOff" InUse="" /> + <R_TMR_RD0_ForcedOutput_Start UserName="R_TMR_RD0_ForcedOutput_Start" LibName="R_TMR_RDn_ForcedOutput_Start" InUse="" /> + <R_TMR_RD0_ForcedOutput_Stop UserName="R_TMR_RD0_ForcedOutput_Stop" LibName="R_TMR_RDn_ForcedOutput_Stop" InUse="" /> + </TMRD0> + <TMRD1 InUse=""> + <R_TMR_RD1_Create UserName="R_TMR_RD1_Create" LibName="R_TMR_RDn_Create" InUse="" Init="2" InitMode="" /> + <R_TMR_RD1_Start UserName="R_TMR_RD1_Start" LibName="R_TMR_RDn_Start" InUse="" /> + <R_TMR_RD1_Stop UserName="R_TMR_RD1_Stop" LibName="R_TMR_RDn_Stop" InUse="" /> + <R_TMR_RD1_Get_PulseWidth UserName="R_TMR_RD1_Get_PulseWidth" LibName="R_TMR_RDn_Get_PulseWidth" InUse="" /> + <R_TMR_RD1_Set_PowerOff UserName="R_TMR_RD1_Set_PowerOff" LibName="R_TMR_RDn_Set_PowerOff" InUse="" /> + <R_TMR_RD1_ForcedOutput_Start UserName="R_TMR_RD1_ForcedOutput_Start" LibName="R_TMR_RDn_ForcedOutput_Start" InUse="" /> + <R_TMR_RD1_ForcedOutput_Stop UserName="R_TMR_RD1_ForcedOutput_Stop" LibName="R_TMR_RDn_ForcedOutput_Stop" InUse="" /> + </TMRD1> + </r_cg_timer.c> + <r_cg_timer_user.c UserName="r_cg_timer_user.c" LibName="_user.c" InUse=""> + <Type R_TAU_Create_UserInit="void R_TAUn_Create_UserInit(void)" r_tau_channeln_interrupt="__interrupt static void r_tau_channeln_interrupt(void)" r_tau_channeln_higher8bits_interrupt="__interrupt static void r_tau_channeln_higher8bits_interrupt(void)" R_WUTM_Create_UserInit="void R_WUTM_Create_UserInit(void)" r_wutm_interrupt="__interrupt static void r_wutm_interrupt(void)" /> + <TAU0> + <R_TAU0_Create_UserInit UserName="R_TAU0_Create_UserInit" LibName="R_TAU_Create_UserInit" InUse="" /> + <Channel0 InUse=""> + <r_tau0_channel0_interrupt UserName="r_tau0_channel0_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <r_tau0_channel1_interrupt UserName="r_tau0_channel1_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau0_channel1_higher8bits_interrupt UserName="r_tau0_channel1_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <r_tau0_channel2_interrupt UserName="r_tau0_channel2_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <r_tau0_channel3_interrupt UserName="r_tau0_channel3_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau0_channel3_higher8bits_interrupt UserName="r_tau0_channel3_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel3> + <Channel4 InUse=""> + <r_tau0_channel4_interrupt UserName="r_tau0_channel4_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel4> + <Channel5 InUse=""> + <r_tau0_channel5_interrupt UserName="r_tau0_channel5_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel5> + <Channel6 InUse=""> + <r_tau0_channel6_interrupt UserName="r_tau0_channel6_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel6> + <Channel7 InUse=""> + <r_tau0_channel7_interrupt UserName="r_tau0_channel7_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel7> + </TAU0> + <TAU1> + <R_TAU1_Create_UserInit UserName="R_TAU1_Create_UserInit" LibName="R_TAU_Create_UserInit" InUse="" /> + <Channel0 InUse=""> + <r_tau1_channel0_interrupt UserName="r_tau1_channel0_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <r_tau1_channel1_interrupt UserName="r_tau1_channel1_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau1_channel1_higher8bits_interrupt UserName="r_tau1_channel1_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <r_tau1_channel2_interrupt UserName="r_tau1_channel2_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <r_tau1_channel3_interrupt UserName="r_tau1_channel3_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau1_channel3_higher8bits_interrupt UserName="r_tau1_channel3_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel3> + <Channel4 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <r_tau1_channel4_interrupt UserName="r_tau1_channel4_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel4> + <Channel5 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <r_tau1_channel5_interrupt UserName="r_tau1_channel5_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel5> + <Channel6 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <r_tau1_channel6_interrupt UserName="r_tau1_channel6_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel6> + <Channel7 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <r_tau1_channel7_interrupt UserName="r_tau1_channel7_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel7> + </TAU1> + <TMRJ0 InUse=""> + <R_TMR_RJ0_Create_UserInit UserName="R_TMR_RJ0_Create_UserInit" LibName="R_TMR_RJn_Create_UserInit" InUse="" /> + <r_tmr_rj0_interrupt UserName="r_tmr_rj0_interrupt" LibName="r_tmr_rjn_interrupt" INTHandle="" InUse="" /> + </TMRJ0> + <TMRD0 InUse=""> + <R_TMR_RD0_Create_UserInit UserName="R_TMR_RD0_Create_UserInit" LibName="R_TMR_RDn_Create_UserInit" InUse="" /> + <r_tmr_rd0_interrupt UserName="r_tmr_rd0_interrupt" LibName="r_tmr_rdn_interrupt" INTHandle="" InUse="" /> + </TMRD0> + <TMRD1 InUse=""> + <R_TMR_RD1_Create_UserInit UserName="R_TMR_RD1_Create_UserInit" LibName="R_TMR_RDn_Create_UserInit" InUse="" /> + <r_tmr_rd1_interrupt UserName="r_tmr_rd1_interrupt" LibName="r_tmr_rdn_interrupt" INTHandle="" InUse="" /> + </TMRD1> + </r_cg_timer_user.c> + <r_cg_timer.h UserName="r_cg_timer.h" LibName=".h" InUse="" /> + </TAU> + <WDT> + <r_cg_wdt.c UserName="r_cg_wdt.c" LibName=".c" InUse="1"> + <Type R_WDT_Create="void R_WDT_Create(void)" R_WDT_Restart="void R_WDT_Restart(void)" /> + <R_WDT_Create UserName="R_WDT_Create" LibName="R_WDT_Create" InUse="1" Init="1" InitMode="" /> + <R_WDT_Restart UserName="R_WDT_Restart" LibName="R_WDT_Restart" InUse="1" /> + </r_cg_wdt.c> + <r_cg_wdt_user.c UserName="r_cg_wdt_user.c" LibName="_user.c" InUse="1"> + <Type R_WDT_Create_UserInit="void R_WDT_Create_UserInit(void)" r_wdt_interrupt="__interrupt static void r_wdt_interrupt(void)" /> + <R_WDT_Create_UserInit UserName="R_WDT_Create_UserInit" LibName="R_WDT_Create_UserInit" InUse="" /> + <r_wdt_interrupt UserName="r_wdt_interrupt" INTHandle="" LibName="r_wdt_interrupt" InUse="1" /> + </r_cg_wdt_user.c> + <r_cg_wdt.h UserName="r_cg_wdt.h" LibName=".h" InUse="1" /> + </WDT> + <RTC> + <r_cg_rtc.c UserName="r_cg_rtc.c" LibName=".c" InUse=""> + <Type R_RTC_Create="void R_RTC_Create(void)" R_RTC_Start="void R_RTC_Start(void)" R_RTC_Stop="void R_RTC_Stop(void)" R_RTC_Set_HourSystem="MD_STATUS R_RTC_SetHourSystem(rtc_hour_system_t hour_system)" R_RTC_Get_CounterValue="MD_STATUS R_RTC_Get_CounterValue(rtc_counter_value_t * const counter_read_val)" R_RTC_Set_CounterValue="MD_STATUS R_RTC_Set_CounterValue(rtc_counter_value_t counter_write_val)" R_RTC_Set_AlarmOn="void R_RTC_Set_AlarmOn(void)" R_RTC_Set_AlarmOff="void R_RTC_Set_AlarmOff(void)" R_RTC_Set_AlarmValue="void R_RTC_Set_AlarmValue(rtc_alarm_value_t alarm_val)" R_RTC_Get_AlarmValue="void R_RTC_Get_AlarmValue(rtc_alarm_value_t * const alarm_val)" R_RTC_Set_ConstPeriodInterruptOn="MD_STATUS R_RTC_Set_ConstPeriodInterruptOn(rtc_int_period_t period)" R_RTC_Set_ConstPeriodInterruptOff="void R_RTC_Set_ConstPeriodInterruptOff(void)" R_RTC_Set_RTC1HZOn="void R_RTC_Set_RTC1HZOn(void)" R_RTC_Set_RTC1HZOff="void R_RTC_Set_RTC1HZOff(void)" R_RTC_Set_PowerOff="void R_RTC_Set_PowerOff(void)" /> + <R_RTC_Create UserName="R_RTC_Create" LibName="R_RTC_Create" InUse="" Init="1" InitMode="" /> + <R_RTC_Start UserName="R_RTC_Start" LibName="R_RTC_Start" InUse="" /> + <R_RTC_Stop UserName="R_RTC_Stop" LibName="R_RTC_Stop" InUse="" /> + <R_RTC_Set_HourSystem UserName="R_RTC_Set_HourSystem" LibName="R_RTC_Set_HourSystem" InUse="" /> + <R_RTC_Get_CounterValue UserName="R_RTC_Get_CounterValue" LibName="R_RTC_Get_CounterValue" InUse="" /> + <R_RTC_Set_CounterValue UserName="R_RTC_Set_CounterValue" LibName="R_RTC_Set_CounterValue" InUse="" /> + <R_RTC_Set_AlarmOn UserName="R_RTC_Set_AlarmOn" LibName="R_RTC_Set_AlarmOn" InUse="" /> + <R_RTC_Set_AlarmOff UserName="R_RTC_Set_AlarmOff" LibName="R_RTC_Set_AlarmOff" InUse="" /> + <R_RTC_Set_AlarmValue UserName="R_RTC_Set_AlarmValue" LibName="R_RTC_Set_AlarmValue" InUse="" /> + <R_RTC_Get_AlarmValue UserName="R_RTC_Get_AlarmValue" LibName="R_RTC_Get_AlarmValue" InUse="" /> + <R_RTC_Set_ConstPeriodInterruptOn UserName="R_RTC_Set_ConstPeriodInterruptOn" LibName="R_RTC_Set_ConstPeriodInterruptOn" InUse="" /> + <R_RTC_Set_ConstPeriodInterruptOff UserName="R_RTC_Set_ConstPeriodInterruptOff" LibName="R_RTC_Set_ConstPeriodInterruptOff" InUse="" /> + <R_RTC_Set_RTC1HZOn UserName="R_RTC_Set_RTC1HZOn" LibName="R_RTC_Set_RTC1HZOn" InUse="" /> + <R_RTC_Set_RTC1HZOff UserName="R_RTC_Set_RTC1HZOff" LibName="R_RTC_Set_RTC1HZOff" InUse="" /> + <R_RTC_Set_PowerOff UserName="R_RTC_Set_PowerOff" LibName="R_RTC_Set_PowerOff" InUse="" /> + </r_cg_rtc.c> + <r_cg_rtc_user.c UserName="r_cg_rtc_user.c" LibName="_user.c" InUse=""> + <Type R_RTC_Create_UserInit="void R_RTC_Create_UserInit(void)" r_rtc_interrupt="__interrupt static void r_rtc_interrupt(void)" r_rtc_callback_constperiod="static void r_rtc_callback_constperiod(void)" r_rtc_callback_alarm="static void r_rtc_callback_alarm(void)" /> + <R_RTC_Create_UserInit UserName="R_RTC_Create_UserInit" LibName="R_RTC_Create_UserInit" InUse="" /> + <r_rtc_interrupt UserName="r_rtc_interrupt" INTHandle="" LibName="r_rtc_interrupt" InUse="" /> + <r_rtc_callback_constperiod UserName="r_rtc_callback_constperiod" LibName="r_rtc_callback_constperiod" InUse="" /> + <r_rtc_callback_alarm UserName="r_rtc_callback_alarm" LibName="r_rtc_callback_alarm" InUse="" /> + </r_cg_rtc_user.c> + <r_cg_rtc.h UserName="r_cg_rtc.h" LibName=".h" InUse="" /> + </RTC> + <DAC InUse=""> + <r_cg_dac.c UserName="r_cg_dac.c" LibName=".c" InUse=""> + <Type R_DAC_Create="void R_DAC_Create(void)" R_DACn_Start="void R_DACn_Start(void)" R_DACn_Stop="void R_DACn_Stop(void)" R_DACn_Set_ConversionValue="void R_DACn_Set_ConversionValue(uint8_t reg_value)" R_DAC_Set_PowerOff="void R_DAC_Set_PowerOff(void)" /> + <R_DAC_Create UserName="R_DAC_Create" LibName="R_DAC_Create" InUse="" Init="2" InitMode="" /> + <DAC0 InUse=""> + <R_DAC0_Start UserName="R_DAC0_Start" LibName="R_DACn_Start" InUse="" /> + <R_DAC0_Stop UserName="R_DAC0_Stop" LibName="R_DACn_Stop" InUse="" /> + <R_DAC0_Set_ConversionValue UserName="R_DAC0_Set_ConversionValue" LibName="R_DACn_Set_ConversionValue" InUse="" /> + </DAC0> + <R_DAC_Set_PowerOff UserName="R_DAC_Set_PowerOff" LibName="R_DAC_Set_PowerOff" InUse="" /> + </r_cg_dac.c> + <r_cg_dac_user.c UserName="r_cg_dac_user.c" LibName="_user.c" InUse=""> + <Type R_DAC_Create_UserInit="void R_DAC_Create_UserInit(void)" /> + <R_DAC_Create_UserInit UserName="R_DAC_Create_UserInit" LibName="R_DAC_Create_UserInit" InUse="" /> + </r_cg_dac_user.c> + <r_cg_dac.h UserName="r_cg_dac.h" LibName=".h" InUse="" /> + </DAC> + <DTC InUse=""> + <r_cg_dtc.c UserName="r_cg_dtc.c" LibName=".c" InUse=""> + <Type R_DTC_Create="void R_DTC_Create(void)" R_DTCDn_Start="void R_DTCDn_Start(void)" R_DTCDn_Stop="void R_DTCDn_Stop(void)" R_DTC_Set_PowerOff="void R_DTC_Set_PowerOff(void)" /> + <R_DTC_Create UserName="R_DTC_Create" LibName="R_DTC_Create" InUse="" Init="2" InitMode="" /> + <DTCD0> + <R_DTCD0_Start LibName="R_DTCDn_Start" InUse="" Visible="False" /> + <R_DTCD0_Stop LibName="R_DTCDn_Stop" InUse="" Visible="False" /> + </DTCD0> + <DTCD1> + <R_DTCD1_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD1_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD1> + <DTCD2> + <R_DTCD2_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD2_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD2> + <DTCD3> + <R_DTCD3_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD3_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD3> + <DTCD4> + <R_DTCD4_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD4_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD4> + <DTCD5> + <R_DTCD5_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD5_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD5> + <DTCD6> + <R_DTCD6_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD6_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD6> + <DTCD7> + <R_DTCD7_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD7_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD7> + <DTCD8> + <R_DTCD8_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD8_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD8> + <DTCD9> + <R_DTCD9_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD9_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD9> + <DTCD10> + <R_DTCD10_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD10_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD10> + <DTCD11> + <R_DTCD11_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD11_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD11> + <DTCD12> + <R_DTCD12_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD12_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD12> + <DTCD13> + <R_DTCD13_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD13_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD13> + <DTCD14> + <R_DTCD14_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD14_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD14> + <DTCD15> + <R_DTCD15_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD15_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD15> + <DTCD16> + <R_DTCD16_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD16_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD16> + <DTCD17> + <R_DTCD17_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD17_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD17> + <DTCD18> + <R_DTCD18_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD18_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD18> + <DTCD19> + <R_DTCD19_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD19_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD19> + <DTCD20> + <R_DTCD20_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD20_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD20> + <DTCD21> + <R_DTCD21_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD21_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD21> + <DTCD22> + <R_DTCD22_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD22_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD22> + <DTCD23> + <R_DTCD23_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD23_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD23> + <DTCH0> + <R_DTCH0_Start LibName="R_DTCHn_Start" InUse="" Visible="false" /> + <R_DTCH0_Stop LibName="R_DTCHn_Stop" InUse="" Visible="false" /> + </DTCH0> + <DTCH1> + <R_DTCH1_Start LibName="R_DTCHn_Start" InUse="" Visible="false" /> + <R_DTCH1_Stop LibName="R_DTCHn_Stop" InUse="" Visible="false" /> + </DTCH1> + <R_DTC_Set_PowerOff UserName="R_DTC_Set_PowerOff" LibName="R_DTC_Set_PowerOff" InUse="" /> + </r_cg_dtc.c> + <r_cg_dtc_user.c UserName="r_cg_dtc_user.c" LibName="_user.c" InUse=""> + <Type R_DTC_Create_UserInit="void R_DTC_Create_UserInit(void)" /> + <R_DTC_Create_UserInit UserName="R_DTC_Create_UserInit" LibName="R_DTC_Create_UserInit" InUse="" /> + </r_cg_dtc_user.c> + <r_cg_dtc.h UserName="r_cg_dtc.h" LibName=".h" InUse="" /> + </DTC> + <PCLBUZ Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <r_cg_pclbuz.c UserName="r_cg_pclbuz.c" LibName=".c" InUse=""> + <Type R_PCLBUZn_Create="void R_PCLBUZn_Create(void) " R_PCLBUZn_Start="void R_PCLBUZn_Start(void)" R_PCLBUZn_Stop="void R_PCLBUZn_Stop(void)" /> + <PCLBUZ0 InUse=""> + <R_PCLBUZ0_Create UserName="R_PCLBUZ0_Create" LibName="R_PCLBUZn_Create" InUse="" Init="1" InitMode="" /> + <R_PCLBUZ0_Start UserName="R_PCLBUZ0_Start" LibName="R_PCLBUZn_Start" InUse="" /> + <R_PCLBUZ0_Stop UserName="R_PCLBUZ0_Stop" LibName="R_PCLBUZn_Stop" InUse="" /> + </PCLBUZ0> + </r_cg_pclbuz.c> + <r_cg_pclbuz_user.c UserName="r_cg_pclbuz_user.c" LibName="_user.c" InUse=""> + <Type R_PCLBUZn_Create_UserInit="void R_PCLBUZn_Create_UserInit(void) " /> + <PCLBUZ0 InUse=""> + <R_PCLBUZ0_Create_UserInit UserName="R_PCLBUZ0_Create_UserInit" LibName="R_PCLBUZn_Create_UserInit" InUse="" Init="1" /> + </PCLBUZ0> + </r_cg_pclbuz_user.c> + <r_cg_pclbuz.h UserName="r_cg_pclbuz.h" LibName=".h" InUse="" /> + </PCLBUZ> + <COMP> + <r_cg_comp.c UserName="r_cg_comp.c" LibName=".c" InUse=""> + <Type R_COMP_Create="void R_COMP_Create(void)" R_COMP0_Start="void R_COMP0_Start(void)" R_COMP0_Stop="void R_COMP0_Stop(void)" /> + <R_COMP_Create UserName="R_COMP_Create" LibName="R_COMP_Create" InUse="" Init="1" InitMode="" /> + <COMP0 InUse=""> + <R_COMP0_Start UserName="R_COMP0_Start" NotSubMacro="" LibName="R_COMP0_Start" InUse="" /> + <R_COMP0_Stop UserName="R_COMP0_Stop" NotSubMacro="" LibName="R_COMP0_Stop" InUse="" /> + </COMP0> + </r_cg_comp.c> + <r_cg_comp_user.c UserName="r_cg_comp_user.c" LibName="_user.c" InUse=""> + <Type R_COMP_Create_UserInit="void R_COMP_Create_UserInit(void)" r_comp0_interrupt="__interrupt static void r_comp0_interrupt(void)" /> + <R_COMP_Create_UserInit UserName="R_COMP_Create_UserInit" LibName="R_COMP_Create_UserInit" InUse="" /> + <COMP0 InUse=""> + <r_comp0_interrupt UserName="r_comp0_interrupt" NotSubMacro="" LibName="r_comp0_interrupt" INTHandle="" InUse="" /> + </COMP0> + </r_cg_comp_user.c> + <r_cg_comp.h UserName="r_cg_comp.h" LibName=".h" InUse="" /> + </COMP> + <ELC> + <r_cg_elc.c UserName="r_cg_elc.c" LibName=".c" InUse=""> + <Type R_ELC_Create="void R_ELC_Create(void)" R_ELC_Stop="void R_ELC_Stop(uint32_t event)" /> + <R_ELC_Create UserName="R_ELC_Create" LibName="R_ELC_Create" InUse="" Init="2" InitMode="" /> + <R_ELC_Stop UserName="R_ELC_Stop" LibName="R_ELC_Stop" InUse="" /> + </r_cg_elc.c> + <r_cg_elc_user.c UserName="r_cg_elc_user.c" LibName="_user.c" InUse=""> + <Type R_ELC_Create_UserInit="void R_ELC_Create_UserInit(void)" /> + <R_ELC_Create_UserInit UserName="R_ELC_Create_UserInit" LibName="R_ELC_Create_UserInit" InUse="" /> + </r_cg_elc_user.c> + <r_cg_elc.h UserName="r_cg_elc.h" LibName=".h" InUse="" /> + </ELC> + <LVD> + <r_cg_lvd.c UserName="r_cg_lvd.c" LibName=".c" InUse=""> + <Type R_LVD_Create="void R_LVD_Create(void)" R_LVD_InterruptMode_Start="void R_LVD_InterruptMode_Start(void)" /> + <R_LVD_Create UserName="R_LVD_Create" LibName="R_LVD_Create" InUse="" Init="1" InitMode="" /> + <R_LVD_InterruptMode_Start UserName="R_LVD_InterruptMode_Start" LibName="R_LVD_InterruptMode_Start" InUse="" /> + </r_cg_lvd.c> + <r_cg_lvd_user.c UserName="r_cg_lvd_user.c" LibName="_user.c" InUse=""> + <Type R_LVD_Create_UserInit="void R_LVD_Create_UserInit(void)" r_lvd_interrupt="__interrupt static void r_lvd_interrupt(void)" /> + <R_LVD_Create_UserInit UserName="R_LVD_Create_UserInit" LibName="R_LVD_Create_UserInit" InUse="" /> + <r_lvd_interrupt UserName="r_lvd_interrupt" INTHandle="" LibName="r_lvd_interrupt" InUse="" /> + </r_cg_lvd_user.c> + <r_cg_lvd.h UserName="r_cg_lvd.h" LibName=".h" InUse="" /> + </LVD> + </FUNC> + <TAG> + <GlobleUserTag> + <cg_security3 Name="cg_security3" Value="00" /> + <cg_security8 Name="cg_security8" Value="00" /> + <cg_security4 Name="cg_security4" Value="00" /> + <cg_iawctl_value Name="cg_iawctl_value" Value="00" /> + <cg_crc_area Name="cg_crc_area" Value="00" /> + <cg_security0 Name="cg_security0" Value="00" /> + <cg_security9 Name="cg_security9" Value="00" /> + <cg_option Name="cg_option" Value="04" /> + <pior_value8 Name="pior_value8" Value="00" /> + <cg_security5 Name="cg_security5" Value="00" /> + <wdt_option Name="wdt_option" Value="FF" /> + <lvi_option Name="lvi_option" Value="FF" /> + <pior_value4 Name="pior_value4" Value="00" /> + <pior_value5 Name="pior_value5" Value="00" /> + <cg_security6 Name="cg_security6" Value="00" /> + <cg_security1 Name="cg_security1" Value="00" /> + <pior_value0 Name="pior_value0" Value="00" /> + <pior_value1 Name="pior_value1" Value="00" /> + <pior_value6 Name="pior_value6" Value="00" /> + <pior_value7 Name="pior_value7" Value="00" /> + <cg_security7 Name="cg_security7" Value="00" /> + <ocdstart Name="ocdstart" Value="3FE00" /> + <cg_security2 Name="cg_security2" Value="00" /> + <clock_option Name="clock_option" Value="F8" /> + <pior_value2 Name="pior_value2" Value="00" /> + <pior_value3 Name="pior_value3" Value="00" /> + </GlobleUserTag> + </TAG> + </DIR> + <MACRO> + <CGC Prepared="true" SetFlag="True" NeedRefresh="True"> + <CGC SetFlag="True" MacroName="cgc" /> + </CGC> + <PORT HelpID="port" Prepared="true" SetFlag="" NeedRefresh="False"> + <PORT SetFlag="" MacroName="PORT" /> + </PORT> + <INTC SetFlag="" HelpID="int" NeedRefresh="False"> + <INTP Accelerate="No" MacroName="INTP" /> + <KEY Chip="RL78F14_80pin,RL78F14_100pin" PIOR50="0" MacroName="KEY" /> + </INTC> + <Serial SetFlag="" HelpID="serial" NeedRefresh="False"> + <SAU0 Accelerate="No" MacroName="SAU" Channel="0"> + <Channel0 UART="0" CSI="00" IIC="00" Channel="0" /> + <Channel1 Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0" UART="0" CSI="01" IIC="01" Channel="1" /> + <Channel1 Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin" PIOR41="1" UART="0" CSI="01" Channel="1" /> + </SAU0> + <SAU1 Accelerate="No" MacroName="SAU" Channel="1" Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR43="1" PIOR42="1"> + <Channel0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" UART="1" CSI="10" Channel="0" /> + <Channel1 Chip="RL78F14_100pin" UART="1" CSI="11" Channel="1" /> + </SAU1> + <SAU1 Accelerate="No" MacroName="SAU" Channel="1" Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin" PIOR43="0" PIOR42="1"> + <Channel0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" UART="1" CSI="10" Channel="0" /> + <Channel1 Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin" UART="1" CSI="11" IIC="11" Channel="1" /> + </SAU1> + <SAU1 Accelerate="No" MacroName="SAU" Channel="1" Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin" PIOR42="0"> + <Channel0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin" UART="1" CSI="10" IIC="10" Channel="0" /> + <Channel1 Chip="RL78F14_100pin" PIOR43="0" UART="1" CSI="11" IIC="11" Channel="1" /> + <Channel1 Chip="RL78F14_100pin" PIOR43="1" UART="1" CSI="11" Channel="1" /> + </SAU1> + <IICA0 Accelerate="No" Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" MacroName="IICA" Channel="0" /> + </Serial> + <ADC SetFlag="" HelpID="adc" NeedRefresh="False"> + <ADC SetFlag="" MacroName="ADC" /> + </ADC> + <TAU SetFlag="false" HelpID="timer" NeedRefresh="False"> + <TAU0 Accelerate="No" MacroName="TAU" Channel="0" ChannelNum="0,1,2,3,4,5,6,7" /> + <TAU1 Accelerate="No" Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" MacroName="TAU" Channel="1" ChannelNum="0,1,2,3,4,5,6,7" /> + <TMRJ0 SetFlag="" MacroName="TMRJ" Channel="0" /> + <TMRD0 SetFlag="" MacroName="TMRD" Channel="0" /> + <TMRD1 SetFlag="" MacroName="TMRD" Channel="1" /> + </TAU> + <WDT Prepared="true" SetFlag="true" HelpID="watchdogtimer" NeedRefresh="False"> + <WDT SetFlag="true" MacroName="WDT" /> + </WDT> + <RTC SetFlag="" HelpID="rtc" NeedRefresh="False"> + <RTC MacroName="RTC" /> + </RTC> + <DAC HelpID="dac" SetFlag="" NeedRefresh="False"> + <DAC SetFlag="" MacroName="DAC" /> + </DAC> + <DTC HelpID="dtc" SetFlag="" NeedRefresh="False"> + <DTC SetFlag="" MacroName="DTC" /> + </DTC> + <PCLBUZ Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" SetFlag="" HelpID="PCLBUZ" NeedRefresh="False"> + <PCLBUZ0 MacroName="PCLBUZ" Channel="0" /> + </PCLBUZ> + <COMP SetFlag="" HelpID="comparator" NeedRefresh="False"> + <COMP SetFlag="" MacroName="COMP" /> + </COMP> + <ELC SetFlag="" HelpID="elc" NeedRefresh="False"> + <ELC Accelerate="No" MacroName="ELC" /> + </ELC> + <LVD SetFlag="" Prepared="true" NeedRefresh="False"> + <LVD MacroName="LVD" /> + </LVD> + </MACRO> + <SETTING> + <CGC> + <setting name="PIN_ASSIGNMENT_FIX_SETTING" value="true" /> + <setting name="OPERATION_MODE_HS_27_55" value="false" /> + <setting name="OPERATION_MODE_HS_40_55" value="true" /> + <setting name="MAIN_CLOCK_SELECT_HIGH_SYSTEM_CLOCK" value="false" /> + <setting name="MAIN_CLOCK_SELECT_HIGH_INTERNAL_CLOCK" value="true" /> + <setting name="INTERNAL_HIGH_CLOCK_OPERATION" value="true" /> + <setting name="INTERNAL_HIGH_CLOCK_FREQUENCY" value="8" /> + <setting name="HIGH_SYSTEM_CLOCK_OPERATION" value="false" /> + <setting name="HIGH_SYSTEM_CLOCK_SELECT_EXTERNAL_CLOCK" value="false" /> + <setting name="HIGH_SYSTEM_CLOCK_SELECT_X1_CLOCK" value="true" /> + <setting name="X1_CLOCK_STABLE_TIME" value="7" /> + <setting name="HIGH_SYSTEM_CLOCK_FREQUENCY" value="5" /> + <setting name="SUBCLOCK_SELECT_XT1_CLOCK" value="true" /> + <setting name="SUBCLOCK_XT1_OSCILLATION_MODE" value="0" /> + <setting name="SUBCLOCK_OPERATION" value="false" /> + <setting name="SUBCLOCK_SELECT_EXTERNAL_CLOCK" value="false" /> + <setting name="SUBCLOCK_HALT_STOP_STATUS" value="0" /> + <setting name="CPU_PERIPHERAL_CLOCK_FREQUENCY" value="0" /> + <setting name="FPLL_FREQUENCY_VALUE" value="0" /> + <setting name="FPLL_FREQUENCY_OPERATION" value="false" /> + <setting name="FPLL_LOCKUP_WAIT_COUNTER" value="0" /> + <setting name="FMP_FREQUENCY_VALUE" value="0" /> + <setting name="TRD_FREQUENCY_VALUE" value="0" /> + <setting name="FSL_FREQUENCY_VALUE" value="0" /> + <setting name="RTC_IT_CLOCK" value="0" /> + <setting name="OCD_UNUSED" value="true" /> + <setting name="OCD_USED" value="false" /> + <setting name="RRM_UNUSED" value="false" /> + <setting name="RRM_USED" value="true" /> + <setting name="TRACE_UNUSED" value="false" /> + <setting name="TRACE_USED" value="true" /> + <setting name="HOTPLUG_UNUSED" value="true" /> + <setting name="HOTPLUG_USED" value="false" /> + <setting name="SECURITY_ID_AUTHENTICATION_ERASE" value="true" /> + <setting name="SECURITY_ID_AUTHENTICATION_NOT_ERASE" value="false" /> + <setting name="SECURITY_ID_SELECT" value="true" /> + <setting name="SECURITY_ID_VALUE" value="0x00000000000000000000" /> + <setting name="RESET_SOURCE_FUNCTION_OUTPUT" value="true" /> + <setting name="RESOUT_UNUSED" value="true" /> + <setting name="RESOUT_USED" value="false" /> + <setting name="ILLEGAL_MEMORY_ACCESS_UNUSED" value="true" /> + <setting name="ILLEGAL_MEMORY_ACCESS_USED" value="false" /> + <setting name="RAM_GUARD_UNUSED" value="true" /> + <setting name="RAM_GUARD_USED" value="false" /> + <setting name="RAM_GUARD_AREA" value="0" /> + <setting name="PORT_GUARD_UNUSED" value="true" /> + <setting name="PORT_GUARD_USED" value="false" /> + <setting name="INTERRUPT_GUARD_UNUSED" value="true" /> + <setting name="INTERRUPT_GUARD_USED" value="false" /> + <setting name="CHIP_CONTROL_GUARD_UNUSED" value="true" /> + <setting name="CHIP_CONTROL_GUARD_USED" value="false" /> + <setting name="STACKPOINTER_INTERRUPT_PRIORITY" value="3" /> + <setting name="STACKPOINTER_INTERRUPT_USED" value="true" /> + <setting name="CLOCK_MONITOR_INTERRUPT_PRIORITY" value="3" /> + <setting name="CLOCK_MONITOR_INTERRUPT_USED" value="true" /> + <setting name="CLOCK_MONITOR_UNUSED" value="true" /> + <setting name="CLOCK_MONITOR_USED" value="false" /> + <setting name="STACK_POINTER_UNUSED" value="true" /> + <setting name="STACK_POINTER_USED" value="false" /> + <setting name="STACK_POINTER_UNDERFLOW_DATA" value="0x0000" /> + <setting name="STACK_POINTER_OVERFLOW_DATA" value="0xFFFE" /> + <setting name="RAM_ECC_INTERRUPT_USED" value="false" /> + <setting name="RAM_ECC_INTERRUPT_PRIORITY" value="3" /> + <setting name="DataFlash" value="unused" /> + <setting name="ProgramFlash" value="unused" /> + <setting name="Monitor" value="unused" /> + <setting name="StartStop" value="unused" /> + <setting name="Emulator" value="E1" /> + </CGC> + </SETTING> +</RL78F14> + 1.0 + 95279bbe-6d22-4c1c-844e-cd135cf17b88 + + + \ No newline at end of file diff --git a/multical.rcpe b/multical.rcpe new file mode 100644 index 0000000..653b67d --- /dev/null +++ b/multical.rcpe @@ -0,0 +1,2184 @@ + + + + + % + % + + + + cstart.asm + hdwinit.asm + stkinit.asm + main.c + iodefine.h + + + Simulator + + 4000000 + + + + R5F10PPJ + + + + DefaultBuild\cstart.obj + DefaultBuild\hdwinit.obj + DefaultBuild\main.obj + DefaultBuild\stkinit.obj + + + + False + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + BuildOptionChanged + + + + + + None + + + + + <RL78F14> + <VAR> + <fCLK Name="fCLK" Value="32" Comment="4M" Trigger="fCLK"> + <Effect> + <ADC /> + <SAU0 /> + <SAU1 /> + <IICA0 /> + <TAU0 /> + <TAU1 /> + <TMRJ0 /> + <COMP /> + </Effect> + </fCLK> + <ISPullupForPort Name="ISPullupForPort" Text="false" Comment="unused" /> + <fHOCO Name="fHOCO" Value="64" Comment="64M" Trigger="fHOCO" /> + <fIH Name="fIH" Value="64" Comment="32M" /> + <fSUB Name="fSUB" Value="0" Comment="0K" Trigger="fSUB"> + <Effect> + <TAU0 /> + <TAU1 /> + <TMRJ0 /> + </Effect> + </fSUB> + <fIL Name="fIL" Value="15" Comment="15K" Trigger="fIL"> + <Effect> + <TMRJ0 /> + <WDT /> + <TAU0 /> + <TAU1 /> + </Effect> + </fIL> + <fSL Name="fSL" Value="15" Comment="15K" Trigger="fSL"> + <Effect> + <PCLBUZ0 /> + <TMRJ0 /> + <TAU0 /> + <TAU1 /> + </Effect> + </fSL> + <fPLL Name="fPLL" Value="24" Comment="24M" Trigger="fPLL" /> + <fRTC Name="fRTC" Value="524.590163934426" Comment="15k" Trigger="fRTC"> + <Effect> + <RTC /> + </Effect> + </fRTC> + <fTRD Name="fTRD" Value="64" Comment="64M" Trigger="fTRD"> + <Effect> + <TMRD0 /> + <TMRD1 /> + </Effect> + </fTRD> + <fMAIN Name="fMAIN" Value="64" Comment="32M" Trigger="fMAIN"> + <Effect> + <PCLBUZ0 /> + </Effect> + </fMAIN> + <fTRDSource Name="fTRDSource" Trigger="fTRD" Text="fIH" /> + <VDD_MIN Name="VDD_MIN" Value="4" Comment="4.0V" Trigger="VDD"> + <Effect> + <PCLBUZ0 /> + <IICA0 /> + <SAU0 /> + <SAU1 /> + </Effect> + </VDD_MIN> + <VDD_MAX Name="VDD_MAX" Value="5.5" Comment="5.5V" /> + <VDD Name="VDD" Text="false" Comment="used" /> + <VDDValue Name="VDDValue" Value="2.7" Comment="2.7V" Trigger="VDD"> + <Effect> + <ADC /> + </Effect> + </VDDValue> + <COMP_ADPC_USEDPIN Name="COMP_ADPC_USEDPIN" Text="false" /> + <DA_ADPC_USEDPIN Name="DA_ADPC_USEDPIN" Text="false" /> + <DA_INUSE Name="DA_INUSE" Text="false" /> + <AD_ADPC_USEDPIN Name="AD_ADPC_USEDPIN" Text="false" /> + <AD_ADS_USEDPIN Name="AD_ADS_USEDPIN" Text="false" /> + <ADPCForPort3 Name="ADPCForPort3" Value="255" Comment="ADPCForPort3" /> + <ADPCForPort8 Name="ADPCForPort8" Value="255" Comment="ADPCForPort8" /> + <ADPCForPort9 Name="ADPCForPort9" Value="255" Comment="ADPCForPort9" /> + <ADPCForKey Name="ADPCForKey" Value="255" Comment="ADPCForKey" /> + <OnChipDebugTraceDTC Name="GTraceRam" Text="2" Trigger="ocdtraceram"> + <Effect> + <DTC /> + </Effect> + </OnChipDebugTraceDTC> + <OnChipDebugTrace Name="GTrace" Text="2" /> + <OnChipDebugHotPlugDTC Name="GHotPlugRam" Text="2" Trigger="ocdhotplugram"> + <Effect> + <DTC /> + </Effect> + </OnChipDebugHotPlugDTC> + <KR0 Name="KR0" Text="false" Comment="unused" Trigger="KR0"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR0> + <KR1 Name="KR1" Text="false" Comment="unused" Trigger="KR1"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR1> + <KR2 Name="KR2" Text="false" Comment="unused" Trigger="KR2"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR2> + <KR3 Name="KR3" Text="false" Comment="unused" Trigger="KR3"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR3> + <KR4 Name="KR4" Text="false" Comment="unused" Trigger="KR4"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR4> + <KR5 Name="KR5" Text="false" Comment="unused" Trigger="KR5"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR5> + <KR6 Name="KR6" Text="false" Comment="unused" Trigger="KR6"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR6> + <KR7 Name="KR7" Text="false" Comment="unused" Trigger="KR7"> + <Effect> + <PORT Forcible="" /> + </Effect> + </KR7> + <OnChipDebugHotPlug Name="GHotPlug" Text="2" /> + <IIC00 Name="IIC00" Text="false" Comment="unused" Trigger="IIC00"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IIC00> + <IIC01 Name="IIC01" Text="false" Comment="unused" Trigger="IIC01"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IIC01> + <IIC10 Name="IIC10" Text="false" Comment="unused" Trigger="IIC10"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IIC10> + <IIC11 Name="IIC11" Text="false" Comment="unused" Trigger="IIC11"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IIC11> + <IICA0 Name="IICA0" Text="false" Comment="unused" Trigger="IICA0"> + <Effect> + <PORT Forcible="" /> + </Effect> + </IICA0> + <PIOR00Value Name="PIOR00Value" Text="0" /> + <PIOR01Value Name="PIOR01Value" Text="0" /> + <PIOR02Value Name="PIOR02Value" Text="0" /> + <PIOR03Value Name="PIOR03Value" Text="0" /> + <PIOR04Value Name="PIOR04Value" Text="0" /> + <PIOR05Value Name="PIOR05Value" Text="0" /> + <PIOR06Value Name="PIOR06Value" Text="0" /> + <PIOR07Value Name="PIOR07Value" Text="0" /> + <PIOR10Value Name="PIOR10Value" Text="0" /> + <PIOR11Value Name="PIOR11Value" Text="0" /> + <PIOR12Value Name="PIOR12Value" Text="0" /> + <PIOR13Value Name="PIOR13Value" Text="0" /> + <PIOR14Value Name="PIOR14Value" Text="0" /> + <PIOR15Value Name="PIOR15Value" Text="0" /> + <PIOR16Value Name="PIOR16Value" Text="0" /> + <PIOR17Value Name="PIOR17Value" Text="0" /> + <PIOR20Value Name="PIOR20Value" Text="0" /> + <PIOR21Value Name="PIOR21Value" Text="0" /> + <PIOR22Value Name="PIOR22Value" Text="0" /> + <PIOR23Value Name="PIOR23Value" Text="0" /> + <PIOR24Value Name="PIOR24Value" Text="0" /> + <PIOR25Value Name="PIOR25Value" Text="0" /> + <PIOR26Value Name="PIOR26Value" Text="0" /> + <PIOR27Value Name="PIOR27Value" Text="0" /> + <PIOR30Value Name="PIOR30Value" Text="0" /> + <PIOR31Value Name="PIOR31Value" Text="0" /> + <PIOR32Value Name="PIOR32Value" Text="0" /> + <PIOR33Value Name="PIOR33Value" Text="0" /> + <PIOR34Value Name="PIOR34Value" Text="0" /> + <PIOR35Value Name="PIOR35Value" Text="0" /> + <PIOR36Value Name="PIOR36Value" Text="0" /> + <PIOR37Value Name="PIOR37Value" Text="0" /> + <PIOR40Value Name="PIOR40Value" Text="0" /> + <PIOR41Value Name="PIOR41Value" Text="0" /> + <PIOR42Value Name="PIOR42Value" Text="0" /> + <PIOR43Value Name="PIOR43Value" Text="0" /> + <PIOR44Value Name="PIOR44Value" Text="0" /> + <PIOR45Value Name="PIOR45Value" Text="0" /> + <PIOR46Value Name="PIOR46Value" Text="0" /> + <PIOR50Value Name="PIOR50Value" Text="0" /> + <PIOR52Value Name="PIOR52Value" Text="0" /> + <PIOR53Value Name="PIOR53Value" Text="0" /> + <PIOR60Value Name="PIOR60Value" Text="0" /> + <PIOR61Value Name="PIOR61Value" Text="0" /> + <PIOR62Value Name="PIOR62Value" Text="0" /> + <PIOR63Value Name="PIOR63Value" Text="0" /> + <PIOR64Value Name="PIOR64Value" Text="0" /> + <PIOR65Value Name="PIOR65Value" Text="0" /> + <PIOR66Value Name="PIOR66Value" Text="0" /> + <PIOR67Value Name="PIOR67Value" Text="0" /> + <PIOR70Value Name="PIOR70Value" Text="0" /> + <PIOR71Value Name="PIOR71Value" Text="0" /> + <PIOR73Value Name="PIOR73Value" Text="0" /> + <PIOR80Value Name="PIOR80Value" Text="0" /> + <ELC_TARGET0 Name="ELC_TARGET0" Text="disable" /> + <ELC_TARGET1 Name="ELC_TARGET1" Text="disable" /> + <ELC_TARGET2 Name="ELC_TARGET2" Text="disable" /> + <ELC_TARGET3 Name="ELC_TARGET3" Text="disable" /> + <ELC_TARGET4 Name="ELC_TARGET4" Text="disable" /> + <ELC_TARGET5 Name="ELC_TARGET5" Text="disable" /> + <ELC_TARGET6 Name="ELC_TARGET6" Text="disable" /> + <ELC_TARGET7 Name="ELC_TARGET7" Text="disable" /> + <ELC_TARGET8 Name="ELC_TARGET8" Text="disable" /> + <RTC1HZ Name="RTC1HZ" Text="disable" Trigger="RTC1HZ"> + <Effect> + <TAU0 /> + <TAU1 /> + </Effect> + </RTC1HZ> + <RXD0 Name="RXD0" Text="disable" /> + <ProjectName Name="PrjName" Text="multical" /> + <ProjectPath Name="PrjPath" Text="C:\Users\temp\Desktop\multical" /> + <ProjectKind Name="PrjKind" Text="Project78K0R" /> + <DeviceName Name="DeviceName" Fixed="" Text="RL78F14" /> + <MCUName Name="MCUName" Text="RL78F14_100pin" /> + <ChipName Name="ChipName" Text="R5F10PPJ" /> + <ChipID Name="ChipID" Text="R5F10PPJ" /> + <CPUCoreType Name="CPUCoreType" Fixed="" Text="1" /> + <MCUType Name="MCUType" Fixed="" Text="RL78" /> + <Compiler Name="Compiler" Text="CCRL" /> + <UseSecurityId Name="GI" Text="0" /> + <SecurityId Name="GIValue" Text="00000000000000000000" /> + <LinkDirectiveFile Name="D0" Text="lk.dr" /> + <OnChipDebugOptionBytes Name="GO" Text="1" /> + <OnChipDebugOptionBytesValue Name="GOValue" Text="04" /> + <StartAddressOfOnChipDebugOptionBytes Name="GOStart" Text="3FE00" /> + <SizeOfOnChipDebugOptionBytesArea Name="GOSizeValue" Text="512" /> + <UserOptionBytes Name="GB" Text="1" /> + <UserOptionBytesValue Name="GBValue" Text="FFFFF8" /> + <RAMStartAddress Chip="R5F10PGJ,R5F10PLJ,R5F10PMJ,R5F10PPJ" Name="RAMStartAddress" Fixed="" Text="000FAF00" /> + <RAMEndAddress Name="RAMEndAddress" Fixed="" Text="000FFEFF" /> + <ROMEndAddress Chip="R5F10PGJ,R5F10PLJ,R5F10PMJ,R5F10PPJ" Name="ROMEndAddress" Fixed="" Text="0003FFFF" /> + <REF_VOLTAGE_VALUE Name="REF_VOLTAGE_VALUE" Text="NO_INPUT"> + <Effect> + <DAC /> + <COMP /> + </Effect> + </REF_VOLTAGE_VALUE> + <ANO0_ANALOG_OUTPUT Name="ANO0_ANALOG_OUTPUT" Value="0"> + <Effect> + <DAC /> + <COMP /> + </Effect> + </ANO0_ANALOG_OUTPUT> + <MirrorROM Chip="R5F10PGJ,R5F10PLJ,R5F10PMJ,R5F10PPJ" Name="MirrorROM" Fixed="" Text="31.75" /> + <TAUUsedRTC1Hz Name="TAUUsedRTC1Hz" Text="false" Comment="unused" Trigger="RTC1HZ"> + <Effect> + <RTC /> + </Effect> + </TAUUsedRTC1Hz> + <TRDCLKUSE1 Name="TRDCLKUSE1" Value="0" Comment="unused" Trigger="TRDCLK input"> + <Effect> + <TMRD0 /> + </Effect> + </TRDCLKUSE1> + <fMP Name="fMP" Value="64" /> + <GroupName Name="GroupName" Text="groupe" /> + <CodePath Name="CodePath" Text=".\" /> + <ReportType Name="ReportType" Text="Html" /> + <CreationDateType Name="CreationDateType" Text="OutputDate" /> + <GenerateType Name="GenerateType" Text="Merge" /> + <APIOutputType Name="APIOutputType" Text="Default" /> + <FileRegister Name="FileRegister" Text="Yes" /> + <PinReflect Name="PinReflect" Text="Reflected" /> + <fCLKSource Name="fCLKSource" Text="fIH" /> + <UseFDL Name="UseFDL" Text="no" /> + <DataFlash Name="DataFlash" Text="0" /> + <OCDROM Name="OCDROM" Text="Unused" /> + <OCDROM_Address Name="OCDROM_Address" Text="0003FE00" /> + <OCDROM_Length Name="OCDROM_Length" Text="512" /> + <HasRRMRam Name="HasRRMRam" Text="" /> + <HasTraceRam Name="HasTraceRam" Text="" /> + <HasHotRam Name="HasHotRam" Text="" /> + <PrjVersion Name="PrjVersion" Text="1.2.0.1" /> + <ProductVersion Name="ProductVersion" Text="4.08.06.01" /> + </VAR> + <DIR> + <PIN> + <CGC> + <X1 Port="P121" Point="-" /> + <X2 Port="P122" Point="-" /> + <EXCLK Port="P122" Point="I" /> + <XT1 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P123" Point="-" /> + <XT2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P124" Point="-" /> + <EXCLKS Port="P124" Point="I" /> + <TOOL0 Port="P40" Point="I/O" /> + <RESOUT Port="P130" Point="O" /> + </CGC> + <PORT> + <Port0 Chip="RL78F14_100pin" Pullup="true"> + <P00 Name="P00/TI05/TO05/INTP9" AltFunc="" Point="I/O" /> + <P01 Name="P01/TI04/TO04" AltFunc="" Point="I/O" /> + <P02 Name="P02/TI06/TO06" AltFunc="" Point="I/O" /> + <P03 Name="P03" AltFunc="" Point="I/O" /> + </Port0> + <Port1 Pullup="true"> + <P10 Name="P10/TI13/TO13/TRJO0/_SCK10/SCL10/LTXD1/CTXD0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P11 Name="P11/TI12/TO12/TRDIOB0/SI10/SDA10/RXD1/LRXD1/CRXD0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P12 Name="P12/TI11/TO11/TRDIOD0/INTP5/SO10/TXD1/SNZOUT3" Nch="true" AltFunc="" Point="I/O" /> + <P13 Name="P13/TI04/TO04/TRDIOA0/TRDCLK0/SI01/SDA01/LTXD0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P14 Name="P14/TI06/TO06/TRDIOC0/_SCK01/SCL01/LRXD0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P15 Name="P15/TI05/TO05/TRDIOA1/TRDIOA0/TRDCLK0/SO00/TXD0/TOOLTXD/RTC1HZ" Nch="true" AltFunc="" Point="I/O" /> + <P16 Name="P16/TI02/TO02/TRDIOC1/SI00/SDA00/RXD0/TOOLRXD" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P17 Name="P17/TI00/TO00/TRDIOB1/_SCK00/SCL00/INTP3" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + </Port1> + <Port3 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <P30 Name="P30/TI01/TO01/TRDIOD1/_SSI00/INTP2/SNZOUT0" TTL="true" PITHL="true" Pullup="true" AltFunc="" Point="I/O" /> + <P31 Name="P31/TI14/TO14/STOPST/INTP2" Pullup="true" AltFunc="" Point="I/O" /> + <P32 Name="P32/TI16/TO16/INTP7" Pullup="true" AltFunc="" Point="I/O" /> + <P33 Name="P33/AVREFP/ANI00" AltFunc="" Point="I/O" /> + <P34 Name="P34/AVREFM/ANI01" AltFunc="" Point="I/O" /> + </Port3> + <Port4 Chip="RL78F14_80pin,RL78F14_100pin" Pullup="true"> + <P40 Name="P40/TOOL0" AltFunc="" Point="I/O" /> + <P41 Name="P41/TI10/TO10/TRJIO0/VCOUT0/SNZOUT2" AltFunc="" Point="I/O" /> + <P42 Name="P42/LTXD0" AltFunc="" Point="I/O" /> + <P43 Name="P43/LRXD0" PITHL="true" AltFunc="" Point="I/O" /> + <P44 Name="P44/TI07/TO07" AltFunc="" Point="I/O" /> + <P45 Name="P45/TI10/TO10" AltFunc="" Point="I/O" /> + <P46 Name="P46/TI12/TO12" AltFunc="" Point="I/O" /> + <P47 Name="P47/INTP13" AltFunc="" Point="I/O" /> + </Port4> + <Port5 Chip="RL78F14_80pin,RL78F14_100pin" Pullup="true"> + <P50 Name="P50/_SSI01/INTP3" PITHL="true" AltFunc="" Point="I/O" /> + <P51 Name="P51/SO01/INTP11" AltFunc="" Point="I/O" /> + <P52 Name="P52/_SCK01/SCL01/STOPST" PITHL="true" AltFunc="" Point="I/O" /> + <P53 Name="P53/SI01/SDA01/INTP10" PITHL="true" AltFunc="" Point="I/O" /> + <P54 Name="P54/TI11/TO11/_SSI10" TTL="true" PITHL="true" AltFunc="" Point="I/O" /> + <P55 Name="P55/TI13/TO13" AltFunc="" Point="I/O" /> + <P56 Name="P56/TI15/TO15/SNZOUT1" AltFunc="" Point="I/O" /> + <P57 Name="P57/TI17/TO17/SNZOUT0" AltFunc="" Point="I/O" /> + </Port5> + <Port6 Chip="RL78F14_80pin,RL78F14_100pin" Pullup="true"> + <P60 Name="P60/_SCK00/SCL00" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P61 Name="P61/SI00/SDA00/RXD0" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P62 Name="P62/SO00/TXD0/SCLA0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P63 Name="P63/_SSI00/SDAA0" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P64 Name="P64/TI14/TO14/SNZOUT3" AltFunc="" Point="I/O" /> + <P65 Name="P65/TI16/TO16/SNZOUT2" AltFunc="" Point="I/O" /> + <P66 Name="P66/TI00/TO00" AltFunc="" Point="I/O" /> + <P67 Name="P67/TI02/TO02" AltFunc="" Point="I/O" /> + </Port6> + <Port7 Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" Pullup="true"> + <P70 Name="P70/ANI26/KR0/TI15/TO15/INTP8/SI11/SDA11/SNZOUT4/KR0" DIN="true" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P71 Name="P71/ANI27/KR1/TI17/TO17/INTP6/_SCK11/SCL11/SNZOUT5/KR1" DIN="true" TTL="true" PITHL="true" Nch="true" AltFunc="" Point="I/O" /> + <P72 Name="P72/ANI28/KR2/CTXD0/SO11/SNZOUT6/KR2" DIN="true" Nch="true" AltFunc="" Point="I/O" /> + <P73 Name="P73/ANI29/KR3/CRXD0/_SSI11/SNZOUT7/KR3" DIN="true" TTL="true" PITHL="true" AltFunc="" Point="I/O" /> + <P74 Name="P74/ANI30/KR4/SO10/TXD1/KR4" DIN="true" AltFunc="" Point="I/O" /> + <P75 Name="P75/KR5/SI10/SDA10/RXD1/KR5" PITHL="true" AltFunc="" Point="I/O" /> + <P76 Name="P76/KR6/_SCK10/SCL10/KR6" PITHL="true" AltFunc="" Point="I/O" /> + <P77 Name="P77/KR7/_SSI10/INTP12/KR7" PITHL="true" AltFunc="" Point="I/O" /> + </Port7> + <Port8 Chip="RL78F14_30pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <P80 Name="P80/ANI02/ANO0" AltFunc="" Point="I/O" /> + <P81 Name="P81/ANI03/IVCMP00" AltFunc="" Point="I/O" /> + <P82 Name="P82/ANI04/IVCMP01" AltFunc="" Point="I/O" /> + <P83 Name="P83/ANI05/IVCMP02" AltFunc="" Point="I/O" /> + <P84 Name="P84/ANI06/IVCMP03" AltFunc="" Point="I/O" /> + <P85 Name="P85/ANI07/IVREF0" AltFunc="" Point="I/O" /> + <P86 Name="P86/ANI08" AltFunc="" Point="I/O" /> + <P87 Name="P87/ANI09" AltFunc="" Point="I/O" /> + </Port8> + <Port9 Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ"> + <P90 Name="P90/ANI10" AltFunc="" Point="I/O" /> + <P91 Name="P91/ANI11" AltFunc="" Point="I/O" /> + <P92 Name="P92/ANI12" AltFunc="" Point="I/O" /> + <P93 Name="P93/ANI13" AltFunc="" Point="I/O" /> + <P94 Name="P94/ANI14" AltFunc="" Point="I/O" /> + <P95 Name="P95/ANI15" AltFunc="" Point="I/O" /> + <P96 Name="P96/ANI16" AltFunc="" Point="I/O" /> + <P97 Name="P97/ANI17" AltFunc="" Point="I/O" /> + </Port9> + <Port10 Chip="RL78F14_100pin"> + <P100 Name="P100/ANI18" AltFunc="" Point="I/O" /> + <P101 Name="P101/ANI19" AltFunc="" Point="I/O" /> + <P102 Name="P102/ANI20" AltFunc="" Point="I/O" /> + <P103 Name="P103/ANI21" AltFunc="" Point="I/O" /> + <P104 Name="P104/ANI22" AltFunc="" Point="I/O" /> + <P105 Name="P105/ANI23" AltFunc="" Point="I/O" /> + <P106 Name="P106/LTXD1" Pullup="true" AltFunc="" Point="I/O" /> + <P107 Name="P107/LRXD1" PITHL="true" Pullup="true" AltFunc="" Point="I/O" /> + </Port10> + <Port12 Chip="RL78F14_100pin"> + <P120 Name="P120/ANI25/TI07/TO07/TRDIOD0/SO01/INTP4" DIN="true" Nch="true" Pullup="true" AltFunc="" Point="I/O" /> + <P121 Name="P121/X1" AltFunc="" Point="I" /> + <P122 Name="P122/X2/EXCLK" AltFunc="" Point="I" /> + <P123 Name="P123/XT1" AltFunc="" Point="I" /> + <P124 Name="P124/XT2/EXCLKS" AltFunc="" Point="I" /> + <P125 Name="P125/ANI24/TI03/TO03/TRDIOB0/_SSI01/INTP1/SNZOUT1" DIN="true" TTL="true" PITHL="true" Pullup="true" AltFunc="" Point="I/O" /> + <P126 Name="P126/TI01/TO01" Pullup="true" AltFunc="" Point="I/O" /> + <P127 Name="P127/TI03/TO03" Pullup="true" AltFunc="" Point="I/O" /> + </Port12> + <Port13 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <P130 Name="P130/RESOUT" AltFunc="" Point="O" /> + <P137 Name="P137/INTP0" AltFunc="" Point="I" /> + </Port13> + <Port14 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Pullup="true"> + <P140 Name="P140/PCLBUZ0" AltFunc="" Point="I/O" /> + </Port14> + <Port15 Chip="RL78F14_100pin" Pullup="true"> + <P150 Name="P150/_SSI11" PITHL="true" AltFunc="" Point="I/O" /> + <P151 Name="P151/SO11" AltFunc="" Point="I/O" /> + <P152 Name="P152/SI11/SDA11" PITHL="true" AltFunc="" Point="I/O" /> + <P153 Name="P153/_SCK11/SCL11" PITHL="true" AltFunc="" Point="I/O" /> + <P154 Name="P154/SNZOUT7" AltFunc="" Point="I/O" /> + <P155 Name="P155/SNZOUT6" AltFunc="" Point="I/O" /> + <P156 Name="P156/SNZOUT5" AltFunc="" Point="I/O" /> + <P157 Name="P157/SNZOUT4" AltFunc="" Point="I/O" /> + </Port15> + </PORT> + <INTC> + <INTP> + <INTP0 Port="P137" Point="I" /> + <INTP1 Port="P125" Point="I" /> + <INTP2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin,RL78F14_30pin,RL78F14_32pin" PIOR52="0" Port="P30" Point="I" /> + <INTP2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR52="1" Port="P31" Point="I" /> + <INTP3 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin,RL78F14_30pin,RL78F14_32pin" PIOR53="0" Port="P17" Point="I" /> + <INTP3 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR53="1" Port="P50" Point="I" /> + <INTP4 Port="P120" Point="I" /> + <INTP5 Port="P12" Point="I" /> + <INTP6 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P71" Point="I" /> + <INTP7 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P32" Point="I" /> + <INTP8 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P70" Point="I" /> + <INTP9 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P00" Point="I" /> + <INTP10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P53" Point="I" /> + <INTP11 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P51" Point="I" /> + <INTP12 Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" Port="P77" Point="I" /> + <INTP13 Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" Port="P47" Point="I" /> + </INTP> + <KEY> + <KR0 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P70" Point="I" /> + <KR1 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P71" Point="I" /> + <KR2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P72" Point="I" /> + <KR3 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P73" Point="I" /> + <KR4 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P74" Point="I" /> + <KR5 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P75" Point="I" /> + <KR6 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P76" Point="I" /> + <KR7 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR50="0" Port="P77" Point="I" /> + </KEY> + </INTC> + <ADC> + <ANI0 Port="P33" Point="I" UnConflict="CMP_ANALOG_0,DAC_ANALOG_0" /> + <ANI1 Port="P34" Point="I" UnConflict="CMP_ANALOG_0,DAC_ANALOG_0,CMP_ANALOG_1,DAC_ANALOG_1" /> + <ANI2 Port="P80" Point="I" UnConflict="IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI3 Port="P81" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI4 Port="P82" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI5 Port="P83" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7," /> + <ANI6 Port="P84" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI7 Port="P85" Point="I" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANI8 Chip="RL78F14_30pin, RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P86" Point="I" /> + <ANI9 Chip="RL78F14_30pin, RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P87" Point="I" /> + <ANI10 Chip="RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P90" Point="I" /> + <ANI11 Chip="RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P91" Point="I" /> + <ANI12 Chip="RL78F14_48pin, RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P92" Point="I" /> + <ANI13 Chip="RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P93" Point="I" /> + <ANI14 Chip="RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P94" Point="I" /> + <ANI15 Chip="RL78F14_64pin, RL78F14_80pin, RL78F14_100pin" Port="P95" Point="I" /> + <ANI16 Chip="R5F10PLG, R5F10PLH, R5F10PLJ, R5F10PMG, R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P96" Point="I" /> + <ANI17 Chip="R5F10PMG, R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P97" Point="I" /> + <ANI18 Chip="RL78F14_100pin" Port="P100" Point="I" /> + <ANI19 Chip="RL78F14_100pin" Port="P101" Point="I" /> + <ANI20 Chip="RL78F14_100pin" Port="P102" Point="I" /> + <ANI21 Chip="RL78F14_100pin" Port="P103" Point="I" /> + <ANI22 Chip="RL78F14_100pin" Port="P104" Point="I" /> + <ANI23 Chip="RL78F14_100pin" Port="P105" Point="I" /> + <ANI24 Port="P125" Point="I" /> + <ANI25 Port="P120" Point="I" /> + <ANI26 Chip="R5F10PGG, R5F10PGH, R5F10PGJ, R5F10PLG, R5F10PLH, R5F10PLJ, R5F10PMG, R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P70" Point="I" /> + <ANI27 Chip="R5F10PGG, R5F10PGH, R5F10PGJ, R5F10PLG, R5F10PLH, R5F10PLJ, R5F10PMG, R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P71" Point="I" /> + <ANI28 Chip="R5F10PGG, R5F10PGH, R5F10PGJ, R5F10PMG,R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P72" Point="I" /> + <ANI29 Chip="R5F10PMG,R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P73" Point="I" /> + <ANI30 Chip="R5F10PMG,R5F10PMH, R5F10PMJ, RL78F14_100pin" Port="P74" Point="I" /> + <AVREFP Port="P33" Point="I" UnConflict="CMP_ANALOG_0,DAC_ANALOG_0" /> + <AVREFM Port="P34" Point="I" UnConflict="CMP_ANALOG_0,DAC_ANALOG_0,CMP_ANALOG_1,DAC_ANALOG_1" /> + <ANALOG_0 Port="P33" Point="I" RealName="ANI0" UnConflict="CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_1 Port="P34" Point="I" RealName="ANI1" UnConflict="CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_2 Port="P80" Point="I" RealName="ANI2" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_3 Port="P81" Point="I" RealName="ANI3" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_4 Port="P82" Point="I" RealName="ANI4" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_5 Port="P83" Point="I" RealName="ANI5" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_6 Port="P84" Point="I" RealName="ANI6" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_7 Port="P85" Point="I" RealName="ANI7" UnConflict="ANO0_COMP,ANO0_DAC,IVCMP00,IVCMP01,IVCMP02,IVCMP03,IVREF0,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <ANALOG_8 Port="P86" Point="I" RealName="ANI8" /> + <ANALOG_9 Port="P87" Point="I" RealName="ANI9" /> + <ANALOG_10 Port="P90" Point="I" RealName="ANI10" /> + <ANALOG_11 Port="P91" Point="I" RealName="ANI11" /> + <ANALOG_12 Port="P92" Point="I" RealName="ANI12" /> + <ANALOG_13 Port="P93" Point="I" RealName="ANI13" /> + <ANALOG_14 Port="P94" Point="I" RealName="ANI14" /> + <ANALOG_15 Port="P95" Point="I" RealName="ANI15" /> + <ANALOG_16 Port="P96" Point="I" RealName="ANI16" /> + <ANALOG_17 Port="P97" Point="I" RealName="ANI17" /> + <ANALOG_18 Port="P100" Point="I" RealName="ANI18" /> + <ANALOG_19 Port="P101" Point="I" RealName="ANI19" /> + <ANALOG_20 Port="P102" Point="I" RealName="ANI20" /> + <ANALOG_21 Port="P103" Point="I" RealName="ANI21" /> + <ANALOG_22 Port="P104" Point="I" RealName="ANI22" /> + <ANALOG_23 Port="P105" Point="I" RealName="ANI23" /> + </ADC> + <Serial> + <SAU0> + <UART0> + <RXD0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P16" Point="I" /> + <RXD0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P61" Point="I" /> + <TXD0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P15" Point="O" /> + <TXD0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P62" Point="O" /> + </UART0> + <CSI00> + <SO00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P15" Point="O" /> + <SO00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P62" Point="O" /> + <SI00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P16" Point="I" /> + <SI00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P61" Point="I" /> + <SCK00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" RealName="_SCK00" Port="P17" Point="I/O" /> + <SCK00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK00" PIOR40="1" Port="P60" Point="I/O" /> + <SSI00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" RealName="_SSI00" Port="P30" Point="I" /> + <SSI00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" RealName="_SSI00" Port="P63" Point="I" /> + </CSI00> + <CSI01> + <SO01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" Port="P120" Point="O" /> + <SO01 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="1" Port="P51" Point="O" /> + <SI01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" Port="P13" Point="I" /> + <SI01 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="1" Port="P53" Point="I" /> + <SCK01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK01" PIOR41="0" Port="P14" Point="I/O" /> + <SCK01 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK01" PIOR41="1" Port="P52" Point="I/O" /> + <SSI01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" RealName="_SSI01" Port="P125" Point="I" /> + <SSI01 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="1" RealName="_SSI01" Port="P50" Point="I" /> + </CSI01> + <IIC00> + <SCL00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P17" Point="O" CheckNch="true" /> + <SCL00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P60" Point="O" CheckNch="true" /> + <SDA00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="0" Port="P16" Point="O" CheckNch="true" /> + <SDA00 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR40="1" Port="P61" Point="O" CheckNch="true" /> + </IIC00> + <IIC01> + <SCL01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" Port="P14" Point="O" CheckNch="true" /> + <SDA01 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR41="0" Port="P13" Point="O" CheckNch="true" /> + </IIC01> + </SAU0> + <SAU1> + <UART1> + <RXD1 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="0" Port="P11" Point="I" /> + <RXD1 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" Port="P75" Point="I" /> + <TXD1 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="0" Port="P12" Point="O" /> + <TXD1 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" Port="P74" Point="O" /> + </UART1> + <CSI10> + <SO10 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="0" Port="P12" Point="O" /> + <SO10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" Port="P74" Point="O" /> + <SI10 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="0" Port="P11" Point="I" /> + <SI10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" Port="P75" Point="I" /> + <SCK10 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK10" PIOR42="0" Port="P10" Point="I/O" /> + <SCK10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" RealName="_SCK10" PIOR42="1" Port="P76" Point="I/O" /> + <SSI10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR42="0" RealName="_SSI10" Port="P54" Point="I" /> + <SSI10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR42="1" RealName="_SSI10" Port="P77" Point="I" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <SO11 PIOR43="0" Port="P72" Point="O" /> + <SO11 Chip="RL78F14_100pin" PIOR43="1" Port="P151" Point="O" /> + <SI11 PIOR43="0" Port="P70" Point="I" /> + <SI11 Chip="RL78F14_100pin" PIOR43="1" Port="P152" Point="I" /> + <SCK11 PIOR43="0" RealName="_SCK11" Port="P71" Point="I/O" /> + <SCK11 Chip="RL78F14_100pin" RealName="_SCK11" PIOR43="1" Port="P153" Point="I/O" /> + <SSI11 PIOR43="0" RealName="_SSI11" Port="P73" Point="I" /> + <SSI11 Chip="RL78F14_100pin" PIOR43="1" RealName="_SSI11" Port="P150" Point="I" /> + </CSI11> + <IIC10> + <SCL10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin,RL78F14_32pin,RL78F14_48pin" PIOR42="0" Port="P10" Point="O" CheckNch="true" /> + <SDA10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin,RL78F14_32pin,RL78F14_48pin" PIOR42="0" Port="P11" Point="O" CheckNch="true" /> + </IIC10> + <IIC11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <SCL11 PIOR43="0" Port="P71" Point="O" CheckNch="true" /> + <SDA11 PIOR43="0" Port="P70" Point="O" CheckNch="true" /> + </IIC11> + </SAU1> + <IICA0> + <SCLA0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P62" Point="I/O" /> + <SDAA0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" Port="P63" Point="I/O" /> + </IICA0> + </Serial> + <TAU> + <TAU0> + <Channel0> + <TI00 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR00="0" Port="P17" Point="I" /> + <TI00 Chip="RL78F14_80pin,RL78F14_100pin" PIOR00="1" Port="P66" Point="I" /> + <TO00 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR10="0" Port="P17" Point="O" /> + <TO00 Chip="RL78F14_80pin,RL78F14_100pin" PIOR10="1" Port="P66" Point="O" /> + </Channel0> + <Channel1> + <TI01 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR01="0" Port="P30" Point="I" /> + <TI01 Chip="RL78F14_80pin,RL78F14_100pin" PIOR01="1" Port="P126" Point="I" /> + <TO01 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR11="0" Port="P30" Point="O" /> + <TO01 Chip="RL78F14_80pin,RL78F14_100pin" PIOR11="1" Port="P126" Point="O" /> + </Channel1> + <Channel2> + <TI02 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR02="0" Port="P16" Point="I" /> + <TI02 Chip="RL78F14_80pin,RL78F14_100pin" PIOR02="1" Port="P67" Point="I" /> + <TO02 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR12="0" Port="P16" Point="O" /> + <TO02 Chip="RL78F14_80pin,RL78F14_100pin" PIOR12="1" Port="P67" Point="O" /> + </Channel2> + <Channel3> + <TI03 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR03="0" Port="P125" Point="I" /> + <TI03 Chip="RL78F14_100pin" PIOR03="1" Port="P127" Point="I" /> + <TO03 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR13="0" Port="P125" Point="O" /> + <TO03 Chip="RL78F14_100pin" PIOR13="1" Port="P127" Point="O" /> + </Channel3> + <Channel4> + <TI04 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR04="0" Port="P13" Point="I" /> + <TI04 Chip="RL78F14_80pin,RL78F14_100pin" PIOR04="1" Port="P01" Point="I" /> + <TO04 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR14="0" Port="P13" Point="O" /> + <TO04 Chip="RL78F14_80pin,RL78F14_100pin" PIOR14="1" Port="P01" Point="O" /> + </Channel4> + <Channel5> + <TI05 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR05="0" Port="P15" Point="I" /> + <TI05 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR05="1" Port="P00" Point="I" /> + <TO05 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR15="0" Port="P15" Point="O" /> + <TO05 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR15="1" Port="P00" Point="O" /> + </Channel5> + <Channel6> + <TI06 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR06="0" Port="P14" Point="I" /> + <TI06 Chip="RL78F14_80pin,RL78F14_100pin" PIOR06="1" Port="P02" Point="I" /> + <TO06 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR16="0" Port="P14" Point="O" /> + <TO06 Chip="RL78F14_80pin,RL78F14_100pin" PIOR16="1" Port="P02" Point="O" /> + </Channel6> + <Channel7> + <TI07 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR07="0" Port="P120" Point="I" /> + <TI07 Chip="RL78F14_80pin,RL78F14_100pin" PIOR07="1" Port="P44" Point="I" /> + <TO07 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR17="0" Port="P120" Point="O" /> + <TO07 Chip="RL78F14_80pin,RL78F14_100pin" PIOR17="1" Port="P44" Point="O" /> + </Channel7> + </TAU0> + <TAU1> + <Channel0> + <TI10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR20="0" Port="P41" Point="I" /> + <TI10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR20="1" Port="P45" Point="I" /> + <TO10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR30="0" Port="P41" Point="O" /> + <TO10 Chip="RL78F14_80pin,RL78F14_100pin" PIOR30="1" Port="P45" Point="O" /> + </Channel0> + <Channel1> + <TI11 Chip="RL78F14_80pin,RL78F14_100pin" PIOR21="0" Port="P12" Point="I" /> + <TI11 Chip="RL78F14_80pin,RL78F14_100pin" PIOR21="1" Port="P54" Point="I" /> + <TO11 Chip="RL78F14_80pin,RL78F14_100pin" PIOR31="0" Port="P12" Point="O" /> + <TO11 Chip="RL78F14_80pin,RL78F14_100pin" PIOR31="1" Port="P54" Point="O" /> + </Channel1> + <Channel2> + <TI12 Chip="RL78F14_80pin,RL78F14_100pin" PIOR22="0" Port="P11" Point="I" /> + <TI12 Chip="RL78F14_80pin,RL78F14_100pin" PIOR22="1" Port="P46" Point="I" /> + <TO12 Chip="RL78F14_80pin,RL78F14_100pin" PIOR32="0" Port="P11" Point="O" /> + <TO12 Chip="RL78F14_80pin,RL78F14_100pin" PIOR32="1" Port="P46" Point="O" /> + </Channel2> + <Channel3> + <TI13 Chip="RL78F14_80pin,RL78F14_100pin" PIOR23="0" Port="P10" Point="I" /> + <TI13 Chip="RL78F14_80pin,RL78F14_100pin" PIOR23="1" Port="P55" Point="I" /> + <TO13 Chip="RL78F14_80pin,RL78F14_100pin" PIOR33="0" Port="P10" Point="O" /> + <TO13 Chip="RL78F14_80pin,RL78F14_100pin" PIOR33="1" Port="P55" Point="O" /> + </Channel3> + <Channel4 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin"> + <TI14 Chip="RL78F14_80pin,RL78F14_100pin" PIOR24="0" Port="P31" Point="I" /> + <TI14 Chip="RL78F14_80pin,RL78F14_100pin" PIOR24="1" Port="P64" Point="I" /> + <TO14 Chip="RL78F14_80pin,RL78F14_100pin" PIOR34="0" Port="P31" Point="O" /> + <TO14 Chip="RL78F14_80pin,RL78F14_100pin" PIOR34="1" Port="P64" Point="O" /> + </Channel4> + <Channel5 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin"> + <TI15 Chip="RL78F14_80pin,RL78F14_100pin" PIOR25="0" Port="P70" Point="I" /> + <TI15 Chip="RL78F14_80pin,RL78F14_100pin" PIOR25="1" Port="P56" Point="I" /> + <TO15 Chip="RL78F14_80pin,RL78F14_100pin" PIOR35="0" Port="P70" Point="O" /> + <TO15 Chip="RL78F14_80pin,RL78F14_100pin" PIOR35="1" Port="P56" Point="O" /> + </Channel5> + <Channel6 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin"> + <TI16 Chip="RL78F14_80pin,RL78F14_100pin" PIOR26="0" Port="P32" Point="I" /> + <TI16 Chip="RL78F14_80pin,RL78F14_100pin" PIOR26="1" Port="P65" Point="I" /> + <TO16 Chip="RL78F14_80pin,RL78F14_100pin" PIOR36="0" Port="P32" Point="O" /> + <TO16 Chip="RL78F14_80pin,RL78F14_100pin" PIOR36="1" Port="P65" Point="O" /> + </Channel6> + <Channel7 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin"> + <TI17 Chip="RL78F14_80pin,RL78F14_100pin" PIOR27="0" Port="P71" Point="I" /> + <TI17 Chip="RL78F14_80pin,RL78F14_100pin" PIOR27="1" Port="P57" Point="I" /> + <TO17 Chip="RL78F14_80pin,RL78F14_100pin" PIOR37="0" Port="P71" Point="O" /> + <TO17 Chip="RL78F14_80pin,RL78F14_100pin" PIOR37="1" Port="P57" Point="O" /> + </Channel7> + </TAU1> + <TMRJ0> + <TRJIO0 Port="P41" Point="I/O" /> + <TRJO0 Port="P10" Point="O" /> + </TMRJ0> + <TMRD0> + <TRDCLK_P13_0 PIOR70="0" Port="P13" Point="I/O" UnConflict="TRDCLK_P13_1" RealName="TRDCLK0" /> + <TRDCLK_P15_0 PIOR70="1" Port="P15" Point="I/O" UnConflict="TRDCLK_P15_1,TRDIOA1_P15_0" RealName="TRDCLK0" /> + <TRDIOA0_P13 PIOR70="0" Port="P13" Point="I/O" UnConflict="TRDCLK_P13_0" RealName="TRDIOA0" /> + <TRDIOA0_P15 PIOR70="1" Port="P15" Point="I/O" UnConflict="TRDCLK_P15_0" RealName="TRDIOA0" /> + <TRDIOB0_P125 PIOR71="0" Port="P125" Point="I/O" RealName="TRDIOB0" /> + <TRDIOB0_P11 PIOR71="1" Port="P11" Point="I/O" RealName="TRDIOB0" /> + <TRDIOC0_P14 Port="P14" Point="I/O" RealName="TRDIOC0" /> + <TRDIOD0_P120 PIOR73="0" Port="P120" Point="I/O" RealName="TRDIOD0" /> + <TRDIOD0_P12 PIOR73="1" Port="P12" Point="I/O" RealName="TRDIOD0" /> + <TRDIOA1_P15_0 Port="P15" Point="I/O" UnConflict="TRDIOA1_P15" RealName="TRDIOA1" /> + <TRDIOB1_P17_0 Port="P17" Point="I/O" UnConflict="TRDIOB1_P17" RealName="TRDIOB1" /> + <TRDIOC1_P16_0 Port="P16" Point="I/O" UnConflict="TRDIOC1_P16" RealName="TRDIOC1" /> + <TRDIOD1_P30_0 Port="P30" Point="I/O" UnConflict="TRDIOD1_P30" RealName="TRDIOD1" /> + </TMRD0> + <TMRD1> + <TRDCLK_P13_1 PIOR70="0" Port="P13" Point="I/O" UnConflict="TRDCLK_P13_0,TRDIOA0_P13" RealName="TRDCLK0" /> + <TRDCLK_P15_1 PIOR70="1" Port="P15" Point="I/O" UnConflict="TRDCLK_P15_0,TRDIOA0_P15" RealName="TRDCLK0" /> + <TRDIOA1_P15 Port="P15" Point="I/O" UnConflict="TRDIOA1_P15_0" RealName="TRDIOA1" /> + <TRDIOB1_P17 Port="P17" Point="I/O" UnConflict="TRDIOB1_P17_0" RealName="TRDIOB1" /> + <TRDIOC1_P16 Port="P16" Point="I/O" UnConflict="TRDIOC1_P16_0" RealName="TRDIOC1" /> + <TRDIOD1_P30 Port="P30" Point="I/O" UnConflict="TRDIOD1_P30_0" RealName="TRDIOD1" /> + </TMRD1> + </TAU> + <RTC> + <RTC1HZ Chip="RL78F14_100pin" PIOR80="0" Port="P15" Point="O" /> + <RTC1HZ Chip="RL78F14_100pin" PIOR80="1" Port="P03" Point="O" /> + </RTC> + <PCLBUZ> + <PCLBUZ0> + <PCLBUZ0 Port="P140" Point="O" /> + </PCLBUZ0> + </PCLBUZ> + <DAC> + <ANO0_DAC Port="P80" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" Point="I" RealName="ANO0" /> + <DAC_ANALOG_0 Port="P33" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" Point="I" RealName="ANI0/AVREFP" /> + <DAC_ANALOG_1 Port="P34" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" Point="I" RealName="ANI1/AVREFM" /> + </DAC> + <COMP> + <IVCMP00 Port="P81" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <IVCMP01 Port="P82" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <IVCMP02 Port="P83" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <IVCMP03 Port="P84" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <IVREF0 Port="P85" Point="I" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <VCOUT0 Port="P41" Point="O" /> + <ANO0_COMP Port="P80" UnConflict="ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" Point="0" RealName="ANO0" /> + <CMP_ANALOG_0 Port="P33" RealName="ANI0/AVREFP" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_1 Port="P34" RealName="ANI1/AVREFM" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_2 Port="P80" RealName="ANO0" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,ANO0_COMP,ANO0_DAC,CMP_ANALOG_0,CMP_ANALOG_1" /> + <CMP_ANALOG_3 Port="P81" RealName="IVCMP00" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_4 Port="P82" RealName="IVCMP01" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_5 Port="P83" RealName="IVCMP02" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_6 Port="P84" RealName="IVCMP03" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + <CMP_ANALOG_7 Port="P85" RealName="IVREF0" Point="I" UnConflict="ANI0,ANI1,ANI2,ANI3,ANI4,ANI5,ANI6,ANI7,AVREFP,AVREFM,ANALOG_0,ANALOG_1,ANALOG_2,ANALOG_3,ANALOG_4,ANALOG_5,ANALOG_6,ANALOG_7,CMP_ANALOG_0,CMP_ANALOG_1,CMP_ANALOG_2,CMP_ANALOG_3,CMP_ANALOG_4,CMP_ANALOG_5,CMP_ANALOG_6,CMP_ANALOG_7,DAC_ANALOG_0,DAC_ANALOG_1" /> + </COMP> + <SNOOZE Chip="RL78F14_100pin"> + <SNZOUT0 PIOR60="0" Port="P30" Point="O" /> + <SNZOUT0 PIOR60="1" Port="P57" Point="O" /> + <SNZOUT1 PIOR61="0" Port="P125" Point="O" /> + <SNZOUT1 PIOR61="1" Port="P56" Point="O" /> + <SNZOUT2 PIOR62="0" Port="P41" Point="O" /> + <SNZOUT2 PIOR62="1" Port="P65" Point="O" /> + <SNZOUT3 PIOR63="0" Port="P12" Point="O" /> + <SNZOUT3 PIOR63="1" Port="P64" Point="O" /> + <SNZOUT4 PIOR64="0" Port="P70" Point="O" /> + <SNZOUT4 PIOR64="1" Port="P157" Point="O" /> + <SNZOUT5 PIOR65="0" Port="P71" Point="O" /> + <SNZOUT5 PIOR65="1" Port="P156" Point="O" /> + <SNZOUT6 PIOR66="0" Port="P72" Point="O" /> + <SNZOUT6 PIOR66="1" Port="P155" Point="O" /> + <SNZOUT7 PIOR67="0" Port="P73" Point="O" /> + <SNZOUT7 PIOR67="1" Port="P154" Point="O" /> + </SNOOZE> + <LIN Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin"> + <LTxD0 PIOR44="0" Port="P13" Point="O" /> + <LTxD0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR44="1" Port="P42" Point="O" /> + <LRxD0 PIOR44="0" Port="P14" Point="I" /> + <LRxD0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR44="1" Port="P43" Point="I" /> + <LTxD1 Chip="RL78F14_100pin,R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ" PIOR45="0" Port="P10" Point="O" /> + <LTxD1 Chip="RL78F14_100pin" PIOR45="1" Port="P106" Point="O" /> + <LRxD1 Chip="RL78F14_100pin,R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ" PIOR45="0" Port="P11" Point="I" /> + <LRxD1 Chip="RL78F14_100pin" PIOR45="1" Port="P107" Point="I" /> + </LIN> + <CAN Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin"> + <CTxD0 PIOR46="0" Port="P10" Point="O" /> + <CTxD0 PIOR46="1" Port="P72" Point="O" /> + <CRxD0 PIOR46="0" Port="P11" Point="I" /> + <CRxD0 PIOR46="1" Port="P73" Point="I" /> + </CAN> + <Others> + <VDD AltFunc="VDD" Point="-" /> + <VSS AltFunc="VSS" Point="-" /> + <EVDD0 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" AltFunc="EVDD0" Point="-" /> + <EVSS0 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" AltFunc="EVSS0" Point="-" /> + <EVDD1 Chip="RL78F14_100pin" AltFunc="EVDD1" Point="-" /> + <EVSS1 Chip="RL78F14_100pin" AltFunc="EVSS1" Point="-" /> + <REGC AltFunc="REGC" Point="-" /> + <_RESET AltFunc="_RESET" RealName="_RESET" Point="I" /> + </Others> + </PIN> + <INT> + <CGC> + <INTCLM InUse="0" ISR="r_cgc_clockmonitor_interrupt" /> + <INTRAM InUse="0" ISR="r_cgc_ram_ecc_interrupt" /> + <INTSPM InUse="0" ISR="r_cgc_stackpointer_interrupt" /> + </CGC> + <INTC> + <INTP> + <INTP0 InUse="0" ISR="r_intc0_interrupt" /> + <INTP1 InUse="0" ISR="r_intc1_interrupt" /> + <INTP2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin," InUse="0" ISR="r_intc2_interrupt" /> + <INTP3 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc3_interrupt" /> + <INTP4 InUse="0" ISR="r_intc4_interrupt" /> + <INTP5 InUse="0" ISR="r_intc5_interrupt" /> + <INTP6 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc6_interrupt" /> + <INTP7 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc7_interrupt" /> + <INTP8 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc8_interrupt" /> + <INTP9 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc9_interrupt" /> + <INTP10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc10_interrupt" /> + <INTP11 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse="0" ISR="r_intc11_interrupt" /> + <INTP12 Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" InUse="0" ISR="r_intc12_interrupt" /> + <INTP13 Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" InUse="0" ISR="r_intc13_interrupt" /> + </INTP> + <KEY> + <INTKR Chip="RL78F14_80pin,RL78F14_100pin" PIOR50="0" InUse="0" ISR="r_key_interrupt" /> + </KEY> + </INTC> + <Serial> + <SAU0> + <INTCSI00 InUse="0" ISR="r_csi00_interrupt" /> + <INTCSI01 InUse="0" ISR="r_csi01_interrupt" /> + <INTST0 InUse="0" ISR="r_uart0_interrupt_send" /> + <INTSR0 InUse="0" ISR="r_uart0_interrupt_receive" /> + <INTIIC00 InUse="0" ISR="r_iic00_interrupt" /> + <INTIIC01 InUse="0" ISR="r_iic01_interrupt" /> + </SAU0> + <SAU1> + <INTCSI10 InUse="0" ISR="r_csi10_interrupt" /> + <INTCSI11 InUse="0" ISR="r_csi11_interrupt" /> + <INTST1 InUse="0" ISR="r_uart1_interrupt_send" /> + <INTSR1 InUse="0" ISR="r_uart1_interrupt_receive" /> + <INTIIC10 InUse="0" ISR="r_iic10_interrupt" /> + <INTIIC11 InUse="0" ISR="r_iic11_interrupt" /> + </SAU1> + <IICA0> + <INTIICA0 InUse="0" ISR="r_iica0_interrupt" /> + </IICA0> + </Serial> + <ADC> + <INTAD InUse="0" ISR="r_adc_interrupt" IsDMATrigger="true" /> + </ADC> + <TAU> + <TAU0> + <Channel0> + <INTTM00 InUse="0" ISR="r_tau0_channel0_interrupt" /> + </Channel0> + <Channel1> + <INTTM01 InUse="0" ISR="r_tau0_channel1_interrupt" /> + <INTTM01H InUse="0" ISR="r_tau0_channel1_higher8bits_interrupt" /> + </Channel1> + <Channel2> + <INTTM02 InUse="0" ISR="r_tau0_channel2_interrupt" /> + </Channel2> + <Channel3> + <INTTM03 InUse="0" ISR="r_tau0_channel3_interrupt" /> + <INTTM03H InUse="0" ISR="r_tau0_channel3_higher8bits_interrupt" /> + </Channel3> + <Channel4> + <INTTM04 InUse="0" ISR="r_tau0_channel4_interrupt" /> + </Channel4> + <Channel5> + <INTTM05 InUse="0" ISR="r_tau0_channel5_interrupt" /> + </Channel5> + <Channel6> + <INTTM06 InUse="0" ISR="r_tau0_channel6_interrupt" /> + </Channel6> + <Channel7> + <INTTM07 InUse="0" ISR="r_tau0_channel7_interrupt" /> + </Channel7> + </TAU0> + <TAU1> + <Channel0> + <INTTM10 InUse="0" ISR="r_tau1_channel0_interrupt" /> + </Channel0> + <Channel1> + <INTTM11 InUse="0" ISR="r_tau1_channel1_interrupt" /> + <INTTM11H InUse="0" ISR="r_tau1_channel1_higher8bits_interrupt" /> + </Channel1> + <Channel2> + <INTTM12 InUse="0" ISR="r_tau1_channel2_interrupt" /> + </Channel2> + <Channel3> + <INTTM13 InUse="0" ISR="r_tau1_channel3_interrupt" /> + <INTTM13H InUse="0" ISR="r_tau1_channel3_higher8bits_interrupt" /> + </Channel3> + <Channel4> + <INTTM14 InUse="0" ISR="r_tau1_channel4_interrupt" /> + </Channel4> + <Channel5> + <INTTM15 InUse="0" ISR="r_tau1_channel5_interrupt" /> + </Channel5> + <Channel6> + <INTTM16 InUse="0" ISR="r_tau1_channel6_interrupt" /> + </Channel6> + <Channel7> + <INTTM17 InUse="0" ISR="r_tau1_channel7_interrupt" /> + </Channel7> + </TAU1> + <TMRJ0> + <INTTRJ0 InUse="0" ISR="r_tmr_rj0_interrupt" /> + </TMRJ0> + <TMRD0> + <INTTRD0 InUse="0" ISR="r_tmr_rd0_interrupt" /> + </TMRD0> + <TMRD1> + <INTTRD1 InUse="0" ISR="r_tmr_rd1_interrupt" /> + </TMRD1> + </TAU> + <RTC> + <INTRTC InUse="0" ISR="r_rtc_interrupt" /> + </RTC> + <WDT> + <INTWDTI InUse="1" ISR="r_wdt_interrupt" /> + </WDT> + <LVD> + <INTLVI InUse="0" ISR="r_lvd_interrupt" IsDMATrigger="true" /> + </LVD> + <COMP> + <INTCMP0 InUse="0" ISR="r_comp0_interrupt" /> + </COMP> + </INT> + <FUNC> + <Common> + <r_main.c UserName="r_main.c" LibName="main.c" IsLibrary="false" InUse="2"> + <Type main="void main(void)" R_MAIN_UserInit="void R_MAIN_UserInit(void)" /> + <main UserName="main" LibName="main" FixedName="" InUse="2" ForRTOS="false" Init="" /> + <R_MAIN_UserInit UserName="R_MAIN_UserInit" LibName="R_MAIN_UserInit" InUse="2" /> + </r_main.c> + <r_systeminit.c UserName="r_systeminit.c" LibName="systeminit.c" Compiler="CARL78,ICCRL78,CCRL" InUse="1"> + <Type systeminit="void R_Systeminit(void)" hdwinit="void hdwinit(void)" low_level_init="int __low_level_init(void)" inti_handler="void inti_handler(void)" idle_handler="void idle_handler(void)" /> + <R_Systeminit UserName="R_Systeminit" LibName="systeminit" InUse="1" Init="" /> + <hdwinit UserName="hdwinit" LibName="hdwinit" FixedName="" Compiler="CARL78,CCRL" InUse="1" Init="" /> + <__low_level_init UserName="" LibName="low_level_init" FixedName="" Compiler="ICCRL78" InUse="1" Init="" /> + </r_systeminit.c> + <r_hardware_setup.c UserName="" LibName="hardwaresetup.c" Compiler="GCCRL78" InUse="1"> + <Type systeminit="void R_Systeminit(void)" hardwaresetup="void HardwareSetup(void)" /> + <R_Systeminit UserName="" LibName="systeminit" InUse="1" Init="" /> + <HardwareSetup UserName="" LibName="hardwaresetup" FixedName="" InUse="1" Init="" /> + </r_hardware_setup.c> + <r_cg_vector_table.c UserName="" LibName="vectortable.c" Compiler="GCCRL78" InUse="1"> + <Type R_Dummy="void R_Dummy(void)" /> + <R_Dummy UserName="R_Dummy" LibName="R_Dummy" InUse="1" /> + </r_cg_vector_table.c> + <r_reset_program.asm UserName="" LibName="resetprogram.s" Compiler="GCCRL78" InUse="1" /> + <r_cg_interrupt_handlers.h UserName="" LibName="interrupthandlers.h" Compiler="GCCRL78" InUse="1" /> + <r_cg_macrodriver.h UserName="r_cg_macrodriver.h" LibName="macrodriver1.h" InUse="1" /> + <r_cg_userdefine.h UserName="r_cg_userdefine.h" LibName="userdefine.h" InUse="1" /> + <r_lk.dr UserName="" LibName="lk.dr" IsLibrary="false" Compiler="CARL78" InUse="1" /> + <r_mdlnk.xcl UserName="" LibName="md_lnk.xcl" Visible="false" IsLibrary="false" Compiler="ICCRL78" InUse="1" /> + <iodefine.head UserName="" LibName="iodefine.head" Visible="false" IsLibrary="false" Compiler="GCCRL78" InUse="1" /> + <iodefineext.head UserName="" LibName="iodefineext.head" Visible="false" IsLibrary="false" Compiler="GCCRL78" InUse="1" /> + <mdt.customdebuglinker UserName="" LibName="mdt.customdebuglinker" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.debuglinker UserName="" LibName="mdt.debuglinker" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.hardwaredebuglinker UserName="" LibName="mdt.hardwaredebuglinker" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.releaselinker UserName="" LibName="mdt.releaselinker" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.project UserName="" LibName="mdt.project" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.cproject UserName="" LibName="mdt.cproject" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <mdt.info UserName="" LibName="mdt.info" Visible="false" IsLibrary="false" Compiler="GCCRL78" ForAP="true" InUse="1" /> + <r_mdt.ipcf UserName="" LibName="mdt.ipcf" Visible="false" IsLibrary="false" Compiler="ICCRL78" ForAP="true" InUse="1" /> + <r_mdt.eww UserName="" LibName="mdt.eww" Visible="false" IsLibrary="false" Compiler="ICCRL78" ForAP="true" InUse="1" /> + <r_mdt.ewp UserName="" LibName="rl78mdt.ewp" Visible="false" IsLibrary="false" Compiler="ICCRL78" ForAP="true" InUse="1" /> + <r_mdt.txt UserName="r_mdt.txt" LibName="mdt.txt" Visible="false" IsLibrary="false" Compiler="CARL78,CCRL" ForAP="true" InUse="1" /> + </Common> + <CGC> + <r_cg_cgc.c UserName="r_cg_cgc.c" LibName=".c" InUse="1"> + <Type R_CGC_Create="void R_CGC_Create(void)" R_CGC_Set_ClockMode="MD_STATUS R_CGC_Set_ClockMode(enum ClockMode mode)" R_CGC_ClockMonitor_Start="void R_CGC_ClockMonitor_Start(void)" R_CGC_ClockMonitor_Stop="void R_CGC_ClockMonitor_Stop(void)" R_CGC_StackPointer_Start="void R_CGC_StackPointer_Start(void)" R_CGC_StackPointer_Stop="void R_CGC_StackPointer_Stop(void)" R_CGC_RAMECC_Start="void R_CGC_RAMECC_Start(void)" R_CGC_RAMECC_Stop="void R_CGC_RAMECC_Stop(void)" /> + <R_CGC_Create UserName="R_CGC_Create" LibName="R_CGC_Create" InUse="1" Init="1" InitMode="" /> + <R_CGC_Set_ClockMode UserName="R_CGC_Set_ClockMode" LibName="R_CGC_Set_ClockMode" InUse="0" /> + <R_CGC_ClockMonitor_Start UserName="R_CGC_ClockMonitor_Start" LibName="R_CGC_ClockMonitor_Start" InUse="0" /> + <R_CGC_ClockMonitor_Stop UserName="R_CGC_ClockMonitor_Stop" LibName="R_CGC_ClockMonitor_Stop" InUse="0" /> + <R_CGC_StackPointer_Start UserName="R_CGC_StackPointer_Start" LibName="R_CGC_StackPointer_Start" InUse="0" /> + <R_CGC_StackPointer_Stop UserName="R_CGC_StackPointer_Stop" LibName="R_CGC_StackPointer_Stop" InUse="0" /> + <R_CGC_RAMECC_Start UserName="R_CGC_RAMECC_Start" LibName="R_CGC_RAMECC_Start" InUse="0" /> + <R_CGC_RAMECC_Stop UserName="R_CGC_RAMECC_Stop" LibName="R_CGC_RAMECC_Stop" InUse="0" /> + </r_cg_cgc.c> + <r_cg_cgc_user.c UserName="r_cg_cgc_user.c" LibName="_user.c" InUse="1"> + <Type R_CGC_Get_ResetSource="void R_CGC_Get_ResetSource(void)" R_CGC_Create_UserInit="void R_CGC_Create_UserInit(void)" r_cgc_clockmonitor_interrupt="__interrupt static void r_cgc_clockmonitor_interrupt(void)" r_cgc_stackpointer_interrupt="__interrupt static void r_cgc_stackpointer_interrupt(void)" r_cgc_ram_ecc_interrupt="__interrupt static void r_cgc_ram_ecc_interrupt(void)" /> + <R_CGC_Create_UserInit UserName="R_CGC_Create_UserInit" LibName="R_CGC_Create_UserInit" InUse="0" /> + <R_CGC_Get_ResetSource UserName="R_CGC_Get_ResetSource" LibName="R_CGC_Get_ResetSource" Init="0" InUse="1" /> + <r_cgc_clockmonitor_interrupt UserName="r_cgc_clockmonitor_interrupt" INTHandle="" LibName="r_cgc_clockmonitor_interrupt" InUse="0" /> + <r_cgc_stackpointer_interrupt UserName="r_cgc_stackpointer_interrupt" INTHandle="" LibName="r_cgc_stackpointer_interrupt" InUse="0" /> + <r_cgc_ram_ecc_interrupt UserName="r_cgc_ram_ecc_interrupt" INTHandle="" LibName="r_cgc_ram_ecc_interrupt" InUse="0" /> + </r_cg_cgc_user.c> + <r_cg_cgc.h UserName="r_cg_cgc.h" LibName=".h" InUse="1" /> + <r_cg_pfdl.c UserName="r_cg_pfdl.c" LibName="_pfdl.c" InUse="1"> + <Type R_FDL_Create="void R_FDL_Create(void)" R_FDL_Write="pfdl_status_t R_FDL_Write(pfdl_u16 index, __near pfdl_u08* buffer, pfdl_u16 bytecount)" R_FDL_Read="pfdl_status_t R_FDL_Read(pfdl_u16 index, __near pfdl_u08* buffer, pfdl_u16 bytecount)" R_FDL_Erase="pfdl_status_t R_FDL_Erase(pfdl_u16 blockno)" R_FDL_Open="void R_FDL_Open(void)" R_FDL_Close="void PFDL_Close(void)" R_FDL_BlankCheck="pfdl_status_t R_FDL_BlankCheck(pfdl_u16 index, pfdl_u16 bytecount)" R_FDL_IVerify="pfdl_status_t R_FDL_IVerify(pfdl_u16 index, pfdl_u16 bytecount)" /> + <R_FDL_Create UserName="R_FDL_Create" LibName="R_FDL_Create" InUse="0" InitMode="" /> + <R_FDL_Write UserName="R_FDL_Write" LibName="R_FDL_Write" InUse="0" /> + <R_FDL_Read UserName="R_FDL_Read" LibName="R_FDL_Read" InUse="0" /> + <R_FDL_Erase UserName="R_FDL_Erase" LibName="R_FDL_Erase" InUse="0" /> + <R_FDL_Open UserName="R_FDL_Open" LibName="R_FDL_Open" InUse="0" /> + <R_FDL_Close UserName="R_FDL_Close" LibName="R_FDL_Close" InUse="0" /> + <R_FDL_BlankCheck UserName="R_FDL_BlankCheck" LibName="R_FDL_BlankCheck" InUse="0" /> + <R_FDL_IVerify UserName="R_FDL_IVerify" LibName="R_FDL_IVerify" InUse="0" /> + </r_cg_pfdl.c> + <r_cg_pfdl.h UserName="r_cg_pfdl.h" LibName="_pfdl.h" InUse="0" /> + </CGC> + <PORT> + <r_cg_port.c UserName="r_cg_port.c" LibName=".c"> + <Type R_PORT_Create="void R_PORT_Create(void)" /> + <R_PORT_Create UserName="R_PORT_Create" LibName="R_PORT_Create" Init="1" InitMode="" /> + </r_cg_port.c> + <r_cg_port_user.c UserName="r_cg_port_user.c" LibName="_user.c"> + <Type R_PORT_Create_UserInit="void R_PORT_Create_UserInit(void)" /> + <R_PORT_Create_UserInit UserName="R_PORT_Create_UserInit" LibName="R_PORT_Create_UserInit" /> + </r_cg_port_user.c> + <r_cg_port.h UserName="r_cg_port.h" LibName=".h" /> + </PORT> + <INTC> + <r_cg_intc.c UserName="r_cg_intc.c" LibName=".c" InUse=""> + <Type R_INTC_Create="void R_INTC_Create(void)" R_INTCn_Start="void R_INTCn_Start(void)" R_INTCn_Stop="void R_INTCn_Stop(void)" R_KEY_Create="void R_KEY_Create(void)" R_KEY_Start="void R_KEY_Start(void)" R_KEY_Stop="void R_KEY_Stop(void)" /> + <INTP> + <R_INTC_Create UserName="R_INTC_Create" LibName="R_INTC_Create" InUse="" Init="2" InitMode="" /> + <INTP0> + <R_INTC0_Start UserName="R_INTC0_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC0_Stop UserName="R_INTC0_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP0> + <INTP1> + <R_INTC1_Start UserName="R_INTC1_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC1_Stop UserName="R_INTC1_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP1> + <INTP2 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC2_Start UserName="R_INTC2_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC2_Stop UserName="R_INTC2_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP2> + <INTP3 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC3_Start UserName="R_INTC3_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC3_Stop UserName="R_INTC3_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP3> + <INTP4> + <R_INTC4_Start UserName="R_INTC4_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC4_Stop UserName="R_INTC4_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP4> + <INTP5> + <R_INTC5_Start UserName="R_INTC5_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC5_Stop UserName="R_INTC5_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP5> + <INTP6 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC6_Start UserName="R_INTC6_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC6_Stop UserName="R_INTC6_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP6> + <INTP7 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC7_Start UserName="R_INTC7_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC7_Stop UserName="R_INTC7_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP7> + <INTP8 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC8_Start UserName="R_INTC8_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC8_Stop UserName="R_INTC8_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP8> + <INTP9 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC9_Start UserName="R_INTC9_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC9_Stop UserName="R_INTC9_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP9> + <INTP10 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC10_Start UserName="R_INTC10_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC10_Stop UserName="R_INTC10_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP10> + <INTP11 Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <R_INTC11_Start UserName="R_INTC11_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC11_Stop UserName="R_INTC11_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP11> + <INTP12 Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ"> + <R_INTC12_Start UserName="R_INTC12_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC12_Stop UserName="R_INTC12_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP12> + <INTP13 Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ"> + <R_INTC13_Start UserName="R_INTC13_Start" LibName="R_INTCn_Start" InUse="" /> + <R_INTC13_Stop UserName="R_INTC13_Stop" LibName="R_INTCn_Stop" InUse="" /> + </INTP13> + </INTP> + <KEY Chip="RL78F14_80pin,RL78F14_100pin" PIOR50="0"> + <R_KEY_Create UserName="R_KEY_Create" LibName="R_KEY_Create" InUse="" Init="2" InitMode="" /> + <R_KEY_Start UserName="R_KEY_Start" LibName="R_KEY_Start" InUse="" /> + <R_KEY_Stop UserName="R_KEY_Stop" LibName="R_KEY_Stop" InUse="" /> + </KEY> + </r_cg_intc.c> + <r_cg_intc_user.c UserName="r_cg_intc_user.c" LibName="_user.c" InUse=""> + <Type R_INTC_Create_UserInit="void R_INTC_Create_UserInit(void)" r_intc0_interrupt="__interrupt static void r_intc0_interrupt(void)" r_intc1_interrupt="__interrupt static void r_intc1_interrupt(void)" r_intc2_interrupt="__interrupt static void r_intc2_interrupt(void)" r_intc3_interrupt="__interrupt static void r_intc3_interrupt(void)" r_intc4_interrupt="__interrupt static void r_intc4_interrupt(void)" r_intc5_interrupt="__interrupt static void r_intc5_interrupt(void)" r_intc6_interrupt="__interrupt static void r_intc6_interrupt(void)" r_intc7_interrupt="__interrupt static void r_intc7_interrupt(void)" r_intc8_interrupt="__interrupt static void r_intc8_interrupt(void)" r_intc9_interrupt="__interrupt static void r_intc9_interrupt(void)" r_intc10_interrupt="__interrupt static void r_intc10_interrupt(void)" r_intc11_interrupt="__interrupt static void r_intc11_interrupt(void)" r_intc12_interrupt="__interrupt static void r_intc12_interrupt(void)" r_intc13_interrupt="__interrupt static void r_intc13_interrupt(void)" R_KEY_Create_UserInit="void R_KEY_Create_UserInit(void)" r_key_interrupt="__interrupt static void r_key_interrupt(void)" /> + <INTP> + <R_INTC_Create_UserInit UserName="R_INTC_Create_UserInit" LibName="R_INTC_Create_UserInit" InUse="" /> + <r_intc0_interrupt UserName="r_intc0_interrupt" LibName="r_intc0_interrupt" INTHandle="" InUse="" /> + <r_intc1_interrupt UserName="r_intc1_interrupt" LibName="r_intc1_interrupt" INTHandle="" InUse="" /> + <r_intc2_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc2_interrupt" LibName="r_intc2_interrupt" INTHandle="" InUse="" /> + <r_intc3_interrupt Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc3_interrupt" LibName="r_intc3_interrupt" INTHandle="" InUse="" /> + <r_intc4_interrupt UserName="r_intc4_interrupt" LibName="r_intc4_interrupt" INTHandle="" InUse="" /> + <r_intc5_interrupt UserName="r_intc5_interrupt" LibName="r_intc5_interrupt" INTHandle="" InUse="" /> + <r_intc6_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc6_interrupt" LibName="r_intc6_interrupt" INTHandle="" InUse="" /> + <r_intc7_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc7_interrupt" LibName="r_intc7_interrupt" INTHandle="" InUse="" /> + <r_intc8_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc8_interrupt" LibName="r_intc8_interrupt" INTHandle="" InUse="" /> + <r_intc9_interrupt Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc9_interrupt" LibName="r_intc9_interrupt" INTHandle="" InUse="" /> + <r_intc10_interrupt Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc10_interrupt" LibName="r_intc10_interrupt" INTHandle="" InUse="" /> + <r_intc11_interrupt Chip="RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" UserName="r_intc11_interrupt" LibName="r_intc11_interrupt" INTHandle="" InUse="" /> + <r_intc12_interrupt Chip="R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" UserName="r_intc12_interrupt" LibName="r_intc12_interrupt" INTHandle="" InUse="" /> + <r_intc13_interrupt Chip="R5F10PMG,R5F10PMH,R5F10PMJ,R5F10PPE,R5F10PPF,R5F10PPG,R5F10PPH,R5F10PPJ" UserName="r_intc13_interrupt" LibName="r_intc13_interrupt" INTHandle="" InUse="" /> + </INTP> + <KEY Chip="RL78F14_80pin,RL78F14_100pin" PIOR50="0"> + <R_KEY_Create_UserInit UserName="R_KEY_Create_UserInit" LibName="R_KEY_Create_UserInit" InUse="" /> + <r_key_interrupt UserName="r_key_interrupt" LibName="r_key_interrupt" INTHandle="" InUse="" /> + </KEY> + </r_cg_intc_user.c> + <r_cg_intc.h UserName="r_cg_intc.h" LibName=".h" InUse="" /> + </INTC> + <Serial> + <r_cg_serial.c UserName="r_cg_serial.c" LibName=".c" InUse=""> + <Type R_SAUn_Create="void R_SAUn_Create(void)" R_SAUn_Set_PowerOff="void R_SAUn_Set_PowerOff(void)" R_SAUn_Set_SnoozeOn="void R_SAUn_Set_SnoozeOn(void)" R_SAUn_Set_SnoozeOff="void R_SAUn_Set_SnoozeOff(void)" R_UARTn_Create="void R_UARTn_Create(void)" R_UARTn_Send="MD_STATUS R_UARTn_Send(uint8_t const * tx_buf, uint16_t tx_num)" R_UARTn_Receive="MD_STATUS R_UARTn_Receive(uint8_t const * rx_buf, uint16_t rx_num)" R_UARTn_Start="void R_UARTn_Start(void)" R_UARTn_Stop="void R_UARTn_Stop(void)" R_CSIn_Create="void R_CSIn_Create(void)" R_CSIn_Send="MD_STATUS R_CSIn_Send(uint8_t const * tx_buf, uint16_t tx_num)" R_CSIn_Receive="MD_STATUS R_CSIn_Receive(uint8_t const * rx_buf, uint16_t rx_num) " R_CSIn_Send_Receive="MD_STATUS R_CSIn_Send_Receive(uint8_t const * tx_buf, uint16_t tx_num, uint8_t const * rx_buf) " R_CSIn_Start="void R_CSIn_Start(void)" R_CSIn_Stop="void R_CSIn_Stop(void)" R_IICn_Create="void R_IICn_Create(void)" R_IICn_Master_Send="void R_IICn_Master_Send(uint8_t adr, uint8_t const * tx_buf, uint16_t txnum)" R_IICn_Master_Receive="void R_IICn_Master_Receive(uint8_t adr, uint8_t const * rx_buf, uint16_t rx_num) " R_IICn_Stop="void R_IICn_Stop(void)" R_IICn_StartCondition="void R_IICn_StartCondition(void)" R_IICn_StopCondition="void R_IICn_StopCondition(void)" R_UARTFn_Create="void R_UARTFn_Create(void)" R_UARTFn_Send="MD_STATUS R_UARTFn_Send(uint8_t * const tx_buf, uint16_t tx_num)" R_UARTFn_Receive="MD_STATUS R_UARTFn_Receive(uint8_t * const rx_buf, uint16_t rx_num)" R_UARTFn_Set_ComparisonData="void R_UARTFn_Set_ComparisonData(uint16_t com_data)" R_UARTFn_Set_DataComparisonOn="void R_UARTFn_Set_DataComparisonOn(void)" R_UARTFn_Set_DataComparisonOff="void R_UARTFn_Set_DataComparisonOff(void)" R_UARTFn_Set_PowerOff="void R_UARTFn_Set_PowerOff(void)" R_IICAn_Create="void R_IICAn_Create(void)" R_IICAn_Master_Send="MD_STATUS R_IICAn_Master_Send(uint8_t adr, uint8_t * const tx_buf, uint16_t tx_num, uint8_t wait)" R_IICAn_Master_Receive="MD_STATUS R_IICAn_Master_Receive(uint8_t adr, uint8_t * const rx_buf, uint16_t rx_num, uint8_t wait)" R_IICAn_Slave_Send="void R_IICAn_Slave_Send(uint8_t * const tx_buf, uint16_t tx_num)" R_IICAn_Slave_Receive="void R_IICAn_Slave_Receive(uint8_t * const rx_buf, uint16_t rx_num)" R_IICAn_Stop="void R_IICAn_Stop(void)" R_IICAn_StopCondition="void R_IICAn_StopCondition(void)" R_IICAn_Set_SnoozeOn="void R_IICAn_Set_SnoozeOn(void)" R_IICAn_Set_SnoozeOff="void R_IICAn_Set_SnoozeOff(void)" R_IICAn_Set_PowerOff="void R_IICAn_Set_PowerOff(void)" /> + <SAU0 InUse=""> + <R_SAU0_Create UserName="R_SAU0_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU0_Set_PowerOff UserName="R_SAU0_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <R_SAU0_Set_SnoozeOn UserName="R_SAU0_Set_SnoozeOn" LibName="R_SAUn_Set_SnoozeOn" InUse="" /> + <R_SAU0_Set_SnoozeOff UserName="R_SAU0_Set_SnoozeOff" LibName="R_SAUn_Set_SnoozeOff" InUse="" /> + <UART0 InUse=""> + <R_UART0_Create UserName="R_UART0_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART0_Start UserName="R_UART0_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART0_Stop UserName="R_UART0_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART0_Send UserName="R_UART0_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART0_Receive UserName="R_UART0_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART0> + <CSI00 InUse=""> + <R_CSI00_Create UserName="R_CSI00_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI00_Start UserName="R_CSI00_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI00_Stop UserName="R_CSI00_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI00_Send UserName="R_CSI00_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI00_Receive UserName="R_CSI00_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI00_Send_Receive UserName="R_CSI00_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI00> + <CSI01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0"> + <R_CSI01_Create UserName="R_CSI01_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI01_Start UserName="R_CSI01_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI01_Stop UserName="R_CSI01_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI01_Send UserName="R_CSI01_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI01_Receive UserName="R_CSI01_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI01_Send_Receive UserName="R_CSI01_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI01> + <CSI01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin" PIOR41="1"> + <R_CSI01_Create UserName="" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI01_Start UserName="" LibName="R_CSIn_Start" InUse="" /> + <R_CSI01_Stop UserName="" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI01_Send UserName="" LibName="R_CSIn_Send" InUse="" /> + <R_CSI01_Receive UserName="" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI01_Send_Receive UserName="" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI01> + <IIC00 InUse=""> + <R_IIC00_Create UserName="R_IIC00_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC00_Master_Send UserName="R_IIC00_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC00_Master_Receive UserName="R_IIC00_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC00_Stop UserName="R_IIC00_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC00_StartCondition UserName="R_IIC00_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC00_StopCondition UserName="R_IIC00_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC00> + <IIC01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0"> + <R_IIC01_Create UserName="R_IIC01_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC01_Master_Send UserName="R_IIC01_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC01_Master_Receive UserName="R_IIC01_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC01_Stop UserName="R_IIC01_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC01_StartCondition UserName="R_IIC01_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC01_StopCondition UserName="R_IIC01_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC01> + </SAU0> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR43="1" PIOR42="1" InUse=""> + <R_SAU1_Create UserName="R_SAU1_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU1_Set_PowerOff UserName="R_SAU1_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <UART1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <R_UART1_Create UserName="R_UART1_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART1_Start UserName="R_UART1_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART1_Stop UserName="R_UART1_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART1_Send UserName="R_UART1_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART1_Receive UserName="R_UART1_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART1> + <CSI10 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <R_CSI10_Create UserName="R_CSI10_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI10_Start UserName="R_CSI10_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI10_Stop UserName="R_CSI10_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI10_Send UserName="R_CSI10_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI10_Receive UserName="R_CSI10_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI10_Send_Receive UserName="R_CSI10_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_100pin" PIOR43="1" InUse=""> + <R_CSI11_Create UserName="" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + </SAU1> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin" PIOR43="0" PIOR42="1" InUse=""> + <R_SAU1_Create UserName="R_SAU1_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU1_Set_PowerOff UserName="R_SAU1_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <UART1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR42="1" InUse=""> + <R_UART1_Create UserName="R_UART1_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART1_Start UserName="R_UART1_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART1_Stop UserName="R_UART1_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART1_Send UserName="R_UART1_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART1_Receive UserName="R_UART1_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART1> + <CSI10 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR42="1" InUse=""> + <R_CSI10_Create UserName="R_CSI10_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI10_Start UserName="R_CSI10_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI10_Stop UserName="R_CSI10_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI10_Send UserName="R_CSI10_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI10_Receive UserName="R_CSI10_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI10_Send_Receive UserName="R_CSI10_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR43="0" InUse=""> + <R_CSI11_Create UserName="" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + <IIC11 Chip="groupe,groupd2" PIOR43="0" InUse=""> + <R_IIC11_Create UserName="R_IIC11_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC11_Master_Send UserName="R_IIC11_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC11_Master_Receive UserName="R_IIC11_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC11_Stop UserName="R_IIC11_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC11_StartCondition UserName="R_IIC11_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC11_StopCondition UserName="R_IIC11_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC11> + </SAU1> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin" PIOR42="0" InUse=""> + <R_SAU1_Create UserName="R_SAU1_Create" LibName="R_SAUn_Create" InUse="" Init="1" InitMode="" /> + <R_SAU1_Set_PowerOff UserName="R_SAU1_Set_PowerOff" LibName="R_SAUn_Set_PowerOff" InUse="" /> + <UART1 Chip="groupe,RL78F14_32pin,groupd2" InUse=""> + <R_UART1_Create UserName="R_UART1_Create" LibName="R_UARTn_Create" InUse="" InitMode="" /> + <R_UART1_Start UserName="R_UART1_Start" LibName="R_UARTn_Start" InUse="" /> + <R_UART1_Stop UserName="R_UART1_Stop" LibName="R_UARTn_Stop" InUse="" /> + <R_UART1_Send UserName="R_UART1_Send" LibName="R_UARTn_Send" InUse="" /> + <R_UART1_Receive UserName="R_UART1_Receive" LibName="R_UARTn_Receive" InUse="" /> + </UART1> + <CSI10 Chip="groupe,RL78F14_32pin,groupd2" InUse=""> + <R_CSI10_Create UserName="R_CSI10_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI10_Start UserName="R_CSI10_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI10_Stop UserName="R_CSI10_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI10_Send UserName="R_CSI10_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI10_Receive UserName="R_CSI10_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI10_Send_Receive UserName="R_CSI10_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR43="0" InUse=""> + <R_CSI11_Create UserName="R_CSI11_Create" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="R_CSI11_Start" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="R_CSI11_Stop" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="R_CSI11_Send" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="R_CSI11_Receive" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="R_CSI11_Send_Receive" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + <CSI11 Chip="RL78F14_100pin" PIOR43="1" InUse=""> + <R_CSI11_Create UserName="" LibName="R_CSIn_Create" InUse="" InitMode="" /> + <R_CSI11_Start UserName="" LibName="R_CSIn_Start" InUse="" /> + <R_CSI11_Stop UserName="" LibName="R_CSIn_Stop" InUse="" /> + <R_CSI11_Send UserName="" LibName="R_CSIn_Send" InUse="" /> + <R_CSI11_Receive UserName="" LibName="R_CSIn_Receive" InUse="" /> + <R_CSI11_Send_Receive UserName="" LibName="R_CSIn_Send_Receive" InUse="" /> + </CSI11> + <IIC10 Chip="groupe,RL78F14_32pin,groupd2" InUse=""> + <R_IIC10_Create UserName="R_IIC10_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC10_Master_Send UserName="R_IIC10_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC10_Master_Receive UserName="R_IIC10_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC10_Stop UserName="R_IIC10_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC10_StartCondition UserName="R_IIC10_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC10_StopCondition UserName="R_IIC10_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC10> + <IIC11 Chip="groupe,groupd2" PIOR43="0" InUse=""> + <R_IIC11_Create UserName="R_IIC11_Create" LibName="R_IICn_Create" InUse="" InitMode="" /> + <R_IIC11_Master_Send UserName="R_IIC11_Master_Send" LibName="R_IICn_Master_Send" InUse="" /> + <R_IIC11_Master_Receive UserName="R_IIC11_Master_Receive" LibName="R_IICn_Master_Receive" InUse="" /> + <R_IIC11_Stop UserName="R_IIC11_Stop" LibName="R_IICn_Stop" InUse="" /> + <R_IIC11_StartCondition UserName="R_IIC11_StartCondition" LibName="R_IICn_StartCondition" InUse="" /> + <R_IIC11_StopCondition UserName="R_IIC11_StopCondition" LibName="R_IICn_StopCondition" InUse="" /> + </IIC11> + </SAU1> + <IICA0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse=""> + <R_IICA0_Create UserName="R_IICA0_Create" LibName="R_IICAn_Create" InUse="" Init="1" InitMode="" /> + <R_IICA0_Master_Send UserName="R_IICA0_Master_Send" LibName="R_IICAn_Master_Send" InUse="" /> + <R_IICA0_Master_Receive UserName="R_IICA0_Master_Receive" LibName="R_IICAn_Master_Receive" InUse="" /> + <R_IICA0_Slave_Send UserName="R_IICA0_Slave_Send" LibName="R_IICAn_Slave_Send" InUse="" /> + <R_IICA0_Slave_Receive UserName="R_IICA0_Slave_Receive" LibName="R_IICAn_Slave_Receive" InUse="" /> + <R_IICA0_Stop UserName="R_IICA0_Stop" LibName="R_IICAn_Stop" InUse="" /> + <R_IICA0_StopCondition UserName="R_IICA0_StopCondition" LibName="R_IICAn_StopCondition" InUse="" /> + <R_IICA0_Set_SnoozeOn UserName="R_IICA0_Set_SnoozeOn" LibName="R_IICAn_Set_SnoozeOn" InUse="" /> + <R_IICA0_Set_SnoozeOff UserName="R_IICA0_Set_SnoozeOff" LibName="R_IICAn_Set_SnoozeOff" InUse="" /> + <R_IICA0_Set_PowerOff UserName="R_IICA0_Set_PowerOff" LibName="R_IICAn_Set_PowerOff" InUse="" /> + </IICA0> + </r_cg_serial.c> + <r_cg_serial_user.c UserName="r_cg_serial_user.c" LibName="_user.c" InUse=""> + <Type R_SAUn_Create_UserInit="void R_SAUn_Create_UserInit(void)" r_uartn_interrupt_receive="__interrupt void r_uartn_interrupt_receive(void)" r_uartn_interrupt_error="__interrupt void r_uartn_interrupt_error(void)" r_uartn_interrupt_send="__interrupt void r_uartn_interrupt_send(void)" r_uartn_callback_sendend="void r_uartn_callback_sendend(void)" r_uartn_callback_receiveend="void r_uartn_callback_receiveend(void)" r_uartn_callback_error="void r_uartn_callback_error(uint16_t err_type)" r_uartn_callback_softwareoverrun="void r_uartn_callback_softwareoverrun(uint16_t err_type)" r_csin_interrupt="__interrupt void r_csin_interrupt(void)" r_csin_callback_receiveend="void r_csin_callback_receiveend(void)" r_csin_callback_error="void r_csin_callback_error(uint16_t err_type)" r_csin_callback_sendend="void r_csin_callback_sendend(void)" r_iicn_interrupt="__interrupt void r_iicn_interrupt(void)" r_iicn_callback_master_receiveend="void r_iicn_callback_master_receiveend(void)" r_iicn_callback_master_sendend="void r_iicn_callback_master_sendend(void)" r_iicn_callback_master_error="void r_iicn_callback_master_error(MD_STATUS flag)" R_UARTFn_Create_UserInit="void R_UARTFn_Create_UserInit(void)" r_uartfn_interrupt_receive="__interrupt static void r_uartfn_interrupt_receive(void)" r_uartfn_interrupt_error="__interrupt static void r_uartfn_interrupt_error(void)" r_uartfn_interrupt_send="__interrupt static void r_uartfn_interrupt_send(void)" r_uartfn_callback_receiveend="static void r_uartfn_callback_receiveend(void)" r_uartfn_callback_sendend="static void r_uartfn_callback_sendend(void)" r_uartfn_callback_error="static void r_uartfn_callback_error(void)" r_uartfn_callback_softwareoverrun="static void r_uartfn_callback_softwareoverrun(uint16_t rx_data)" r_uartfn_callback_expbitdetect="static void r_uartfn_callback_expbitdetect(void)" r_uartfn_callback_idmatch="static void r_uartfn_callback_idmatch(void)" R_IICAn_Create_UserInit="void R_IICAn_Create_UserInit(void)" r_iican_interrupt="__interrupt static r_iican_interrupt(void)" r_iican_callback_master_sendend="static void r_iican_callback_master_sendend(void)" r_iican_callback_master_receiveend="static void r_iican_callback_master_receiveend(void)" r_iican_callback_slave_sendend="static void r_iican_callback_slave_sendend(void)" r_iican_callback_slave_receiveend="static void r_iican_callback_slave_receiveend(void)" r_iican_callback_master_error="static void r_iican_callback_master_error(MD_STATUS flag)" r_iican_callback_slave_error="static void r_iican_callback_slave_error(MD_STATUS flag)" r_iican_callback_getstopcondition="static void r_iican_callback_getstopcondition(void)" /> + <SAU0 InUse=""> + <R_SAU0_Create_UserInit UserName="R_SAU0_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART0 InUse=""> + <r_uart0_interrupt_receive UserName="r_uart0_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart0_interrupt_send UserName="r_uart0_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart0_callback_receiveend UserName="r_uart0_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart0_callback_sendend UserName="r_uart0_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart0_callback_error UserName="r_uart0_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart0_callback_softwareoverrun UserName="r_uart0_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART0> + <CSI00 InUse=""> + <r_csi00_interrupt UserName="r_csi00_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi00_callback_receiveend UserName="r_csi00_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi00_callback_error UserName="r_csi00_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi00_callback_sendend UserName="r_csi00_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI00> + <CSI01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0"> + <r_csi01_interrupt UserName="r_csi01_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi01_callback_receiveend UserName="r_csi01_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi01_callback_error UserName="r_csi01_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi01_callback_sendend UserName="r_csi01_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI01> + <CSI01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin" PIOR41="1"> + <r_csi01_interrupt UserName="" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi01_callback_receiveend UserName="" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi01_callback_error UserName="" LibName="r_csin_callback_error" InUse="" /> + <r_csi01_callback_sendend UserName="" LibName="r_csin_callback_sendend" InUse="" /> + </CSI01> + <IIC00 InUse=""> + <r_iic00_interrupt UserName="r_iic00_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic00_callback_master_receiveend UserName="r_iic00_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic00_callback_master_sendend UserName="r_iic00_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic00_callback_master_error UserName="r_iic00_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC00> + <IIC01 InUse="" Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0"> + <r_iic01_interrupt UserName="r_iic01_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic01_callback_master_receiveend UserName="r_iic01_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic01_callback_master_sendend UserName="r_iic01_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic01_callback_master_error UserName="r_iic01_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC01> + </SAU0> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR43="1" PIOR42="1" InUse=""> + <R_SAU1_Create_UserInit UserName="R_SAU1_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <r_uart1_interrupt_receive UserName="r_uart1_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart1_interrupt_send UserName="r_uart1_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart1_callback_receiveend UserName="r_uart1_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart1_callback_sendend UserName="r_uart1_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart1_callback_error UserName="r_uart1_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart1_callback_softwareoverrun UserName="r_uart1_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART1> + <CSI10 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <r_csi10_interrupt UserName="r_csi10_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi10_callback_receiveend UserName="r_csi10_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi10_callback_error UserName="r_csi10_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi10_callback_sendend UserName="r_csi10_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_100pin" PIOR43="1" InUse=""> + <r_csi11_interrupt UserName="" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + </SAU1> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin" PIOR43="0" PIOR42="1" InUse=""> + <R_SAU1_Create_UserInit UserName="R_SAU1_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR42="1" InUse=""> + <r_uart1_interrupt_receive UserName="r_uart1_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart1_interrupt_send UserName="r_uart1_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart1_callback_receiveend UserName="r_uart1_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart1_callback_sendend UserName="r_uart1_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart1_callback_error UserName="r_uart1_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart1_callback_softwareoverrun UserName="r_uart1_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART1> + <CSI10 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" InUse=""> + <r_csi10_interrupt UserName="r_csi10_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi10_callback_receiveend UserName="r_csi10_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi10_callback_error UserName="r_csi10_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi10_callback_sendend UserName="r_csi10_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse=""> + <r_csi11_interrupt UserName="" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + <IIC11 Chip="groupe,groupd2" PIOR43="0" InUse=""> + <r_iic11_interrupt UserName="r_iic11_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic11_callback_master_receiveend UserName="r_iic11_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic11_callback_master_sendend UserName="r_iic11_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic11_callback_master_error UserName="r_iic11_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC11> + </SAU1> + <SAU1 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin" PIOR42="0" InUse=""> + <R_SAU1_Create_UserInit UserName="R_SAU1_Create_UserInit" LibName="R_SAUn_Create_UserInit" InUse="" /> + <UART1 Chip="groupe,RL78F14_32pin,groupd2" InUse=""> + <r_uart1_interrupt_receive UserName="r_uart1_interrupt_receive" INTHandle="" LibName="r_uartn_interrupt_receive" InUse="" /> + <r_uart1_interrupt_send UserName="r_uart1_interrupt_send" INTHandle="" LibName="r_uartn_interrupt_send" InUse="" /> + <r_uart1_callback_receiveend UserName="r_uart1_callback_receiveend" LibName="r_uartn_callback_receiveend" InUse="" /> + <r_uart1_callback_sendend UserName="r_uart1_callback_sendend" LibName="r_uartn_callback_sendend" InUse="" /> + <r_uart1_callback_error UserName="r_uart1_callback_error" LibName="r_uartn_callback_error" InUse="" /> + <r_uart1_callback_softwareoverrun UserName="r_uart1_callback_softwareoverrun" LibName="r_uartn_callback_softwareoverrun" InUse="" /> + </UART1> + <CSI10 Chip="groupe,groupd2,RL78F14_32pin" InUse=""> + <r_csi10_interrupt UserName="r_csi10_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi10_callback_receiveend UserName="r_csi10_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi10_callback_error UserName="r_csi10_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi10_callback_sendend UserName="r_csi10_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI10> + <CSI11 Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" PIOR43="0" InUse=""> + <r_csi11_interrupt UserName="r_csi11_interrupt" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="r_csi11_callback_receiveend" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="r_csi11_callback_error" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="r_csi11_callback_sendend" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + <CSI11 Chip="RL78F14_100pin" PIOR43="1" InUse=""> + <r_csi11_interrupt UserName="" INTHandle="" LibName="r_csin_interrupt" InUse="" /> + <r_csi11_callback_receiveend UserName="" LibName="r_csin_callback_receiveend" InUse="" /> + <r_csi11_callback_error UserName="" LibName="r_csin_callback_error" InUse="" /> + <r_csi11_callback_sendend UserName="" LibName="r_csin_callback_sendend" InUse="" /> + </CSI11> + <IIC10 Chip="groupe,groupd2,RL78F14_32pin" InUse=""> + <r_iic10_interrupt UserName="r_iic10_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic10_callback_master_receiveend UserName="r_iic10_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic10_callback_master_sendend UserName="r_iic10_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic10_callback_master_error UserName="r_iic10_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC10> + <IIC11 Chip="groupe,groupd2" PIOR43="0" InUse=""> + <r_iic11_interrupt UserName="r_iic11_interrupt" INTHandle="" LibName="r_iicn_interrupt" InUse="" /> + <r_iic11_callback_master_receiveend UserName="r_iic11_callback_master_receiveend" LibName="r_iicn_callback_master_receiveend" InUse="" /> + <r_iic11_callback_master_sendend UserName="r_iic11_callback_master_sendend" LibName="r_iicn_callback_master_sendend" InUse="" /> + <r_iic11_callback_master_error UserName="r_iic11_callback_master_error" LibName="r_iicn_callback_master_error" InUse="" /> + </IIC11> + </SAU1> + <IICA0 Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" InUse=""> + <R_IICA0_Create_UserInit UserName="R_IICA0_Create_UserInit" LibName="R_IICAn_Create_UserInit" InUse="" /> + <r_iica0_interrupt UserName="r_iica0_interrupt" INTHandle="" LibName="r_iican_interrupt" InUse="" /> + <r_iica0_callback_master_sendend UserName="r_iica0_callback_master_sendend" LibName="r_iican_callback_master_sendend" InUse="" /> + <r_iica0_callback_master_receiveend UserName="r_iica0_callback_master_receiveend" LibName="r_iican_callback_master_receiveend" InUse="" /> + <r_iica0_callback_slave_sendend UserName="r_iica0_callback_slave_sendend" LibName="r_iican_callback_slave_sendend" InUse="" /> + <r_iica0_callback_slave_receiveend UserName="r_iica0_callback_slave_receiveend" LibName="r_iican_callback_slave_receiveend" InUse="" /> + <r_iica0_callback_master_error UserName="r_iica0_callback_master_error" LibName="r_iican_callback_master_error" InUse="" /> + <r_iica0_callback_slave_error UserName="r_iica0_callback_slave_error" LibName="r_iican_callback_slave_error" InUse="" /> + <r_iica0_callback_getstopcondition UserName="r_iica0_callback_getstopcondition" LibName="r_iican_callback_getstopcondition" InUse="" /> + </IICA0> + </r_cg_serial_user.c> + <r_cg_serial.h UserName="r_cg_serial.h" LibName=".h" InUse="" /> + </Serial> + <ADC> + <r_cg_adc.c UserName="r_cg_adc.c" LibName=".c" InUse=""> + <Type R_ADC_Create="void R_ADC_Create(void)" R_ADC_Start="void R_ADC_Start(void)" R_ADC_Stop="void R_ADC_Stop(void)" R_ADC_Set_OperationOn="void R_ADC_Set_OperationOn(void)" R_ADC_Set_OperationOff="void R_ADC_Set_OperationOff(void)" R_ADC_Get_Result="void R_ADC_Get_Result(uint16_t * const buffer)" R_ADC_Get_Result_8bit="void R_ADC_Get_Result_8bit(uint8_t * const buffer)" R_ADC_Set_ADChannel="MD_STATUS R_ADC_Set_ADChannel(ad_channel_t channel)" R_ADC_Set_SnoozeOn="void R_ADC_Set_SnoozeOn(void)" R_ADC_Set_SnoozeOff="void R_ADC_Set_SnoozeOff(void)" R_ADC_Set_TestChannel="MD_STATUS R_ADC_Set_TestChannel(test_channel_t channel)" R_ADC_Set_PowerOff="void R_ADC_Set_PowerOff(void)" /> + <R_ADC_Create UserName="R_ADC_Create" LibName="R_ADC_Create" InUse="" Init="1" InitMode="" /> + <R_ADC_Start UserName="R_ADC_Start" LibName="R_ADC_Start" InUse="" /> + <R_ADC_Stop UserName="R_ADC_Stop" LibName="R_ADC_Stop" InUse="" /> + <R_ADC_Set_OperationOn UserName="R_ADC_Set_OperationOn" LibName="R_ADC_Set_OperationOn" InUse="" /> + <R_ADC_Set_OperationOff UserName="R_ADC_Set_OperationOff" LibName="R_ADC_Set_OperationOff" InUse="" /> + <R_ADC_Get_Result UserName="R_ADC_Get_Result" LibName="R_ADC_Get_Result" InUse="" /> + <R_ADC_Get_Result_8bit UserName="R_ADC_Get_Result_8bit" LibName="R_ADC_Get_Result_8bit" InUse="" /> + <R_ADC_Set_ADChannel UserName="R_ADC_Set_ADChannel" LibName="R_ADC_Set_ADChannel" InUse="" /> + <R_ADC_Set_SnoozeOn UserName="R_ADC_Set_SnoozeOn" LibName="R_ADC_Set_SnoozeOn" InUse="" /> + <R_ADC_Set_SnoozeOff UserName="R_ADC_Set_SnoozeOff" LibName="R_ADC_Set_SnoozeOff" InUse="" /> + <R_ADC_Set_TestChannel UserName="R_ADC_Set_TestChannel" LibName="R_ADC_Set_TestChannel" InUse="" /> + <R_ADC_Set_PowerOff UserName="R_ADC_Set_PowerOff" LibName="R_ADC_Set_PowerOff" InUse="" /> + </r_cg_adc.c> + <r_cg_adc_user.c UserName="r_cg_adc_user.c" LibName="_user.c" InUse=""> + <Type R_ADC_Create_UserInit="void R_ADC_Create_UserInit(void)" r_adc_interrupt="__interrupt static void r_adc_interrupt(void)" /> + <R_ADC_Create_UserInit UserName="R_ADC_Create_UserInit" LibName="R_ADC_Create_UserInit" InUse="" /> + <r_adc_interrupt UserName="r_adc_interrupt" INTHandle="" LibName="r_adc_interrupt" InUse="" /> + </r_cg_adc_user.c> + <r_cg_adc.h UserName="r_cg_adc.h" LibName=".h" InUse="" /> + </ADC> + <TAU> + <r_cg_timer.c UserName="r_cg_timer.c" LibName=".c" InUse=""> + <Type R_TAU_Create="void R_TAU_Create(void)" R_TAU_Set_PowerOff="void R_TAU_Set_PowerOff(void)" R_TAU_Channeln_Start="void R_TAU_Channeln_Start(void)" R_TAU_Channeln_Higher8bits_Start="void R_TAU_Channeln_Higher8bits_Start(void)" R_TAU_Channeln_Lower8bits_Start="void R_TAU_Channeln_Lower8bits_Start(void)" R_TAU_Channeln_Stop="void R_TAU_Channeln_Stop(void)" R_TAU_Channeln_Higher8bits_Stop="void R_TAU_Channeln_Higher8bits_Stop(void)" R_TAU_Channeln_Lower8bits_Stop="void R_TAU_Channeln_Lower8bits_Stop(void)" R_TAU_Channeln_Get_PulseWidth="void R_TAU_Channeln_Get_PulseWidth(uint32_t * const width)" R_TAU_Channeln_Set_SoftwareTriggerOn="void R_TAU_Channeln_Set_SoftwareTriggerOn(void)" R_WUTM_Create="void R_WUTM_Create(void)" R_WUTM_Start="void R_WUTM_Start(void)" R_WUTM_Stop="void R_WUTM_Stop(void)" R_WUTM_Set_PowerOff="void R_WUTM_Set_PowerOff(void)" /> + <TAU0> + <R_TAU0_Create UserName="R_TAU0_Create" LibName="R_TAU_Create" InUse="" Init="1" InitMode="" /> + <R_TAU0_Set_PowerOff UserName="R_TAU0_Set_PowerOff" LibName="R_TAU_Set_PowerOff" InUse="" /> + <Channel0 InUse=""> + <R_TAU0_Channel0_Start UserName="R_TAU0_Channel0_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel0_Stop UserName="R_TAU0_Channel0_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel0_Get_PulseWidth Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_80pin,RL78F14_100pin" UserName="R_TAU0_Channel0_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU0_Channel0_Set_SoftwareTriggerOn UserName="R_TAU0_Channel0_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <R_TAU0_Channel1_Start UserName="R_TAU0_Channel1_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel1_Higher8bits_Start UserName="R_TAU0_Channel1_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU0_Channel1_Lower8bits_Start UserName="R_TAU0_Channel1_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU0_Channel1_Stop UserName="R_TAU0_Channel1_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel1_Higher8bits_Stop UserName="R_TAU0_Channel1_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU0_Channel1_Lower8bits_Stop UserName="R_TAU0_Channel1_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU0_Channel1_Get_PulseWidth UserName="R_TAU0_Channel1_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <R_TAU0_Channel2_Start UserName="R_TAU0_Channel2_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel2_Stop UserName="R_TAU0_Channel2_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel2_Get_PulseWidth Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_80pin,RL78F14_100pin" UserName="R_TAU0_Channel2_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU0_Channel2_Set_SoftwareTriggerOn UserName="R_TAU0_Channel2_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <R_TAU0_Channel3_Start UserName="R_TAU0_Channel3_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel3_Higher8bits_Start UserName="R_TAU0_Channel3_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU0_Channel3_Lower8bits_Start UserName="R_TAU0_Channel3_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU0_Channel3_Stop UserName="R_TAU0_Channel3_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel3_Higher8bits_Stop UserName="R_TAU0_Channel3_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU0_Channel3_Lower8bits_Stop UserName="R_TAU0_Channel3_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU0_Channel3_Get_PulseWidth Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_100pin" UserName="R_TAU0_Channel3_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel3> + <Channel4 InUse=""> + <R_TAU0_Channel4_Start UserName="R_TAU0_Channel4_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel4_Stop UserName="R_TAU0_Channel4_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel4_Get_PulseWidth Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_80pin,RL78F14_100pin" UserName="R_TAU0_Channel4_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU0_Channel4_Set_SoftwareTriggerOn UserName="R_TAU0_Channel4_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel4> + <Channel5 InUse=""> + <R_TAU0_Channel5_Start UserName="R_TAU0_Channel5_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel5_Stop UserName="R_TAU0_Channel5_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel5_Get_PulseWidth UserName="R_TAU0_Channel5_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel5> + <Channel6 InUse=""> + <R_TAU0_Channel6_Start UserName="R_TAU0_Channel6_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel6_Stop UserName="R_TAU0_Channel6_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel6_Get_PulseWidth UserName="R_TAU0_Channel6_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU0_Channel6_Set_SoftwareTriggerOn Chip="RL78F14_30pin,RL78F14_32pin,RL78F14_80pin,RL78F14_100pin" UserName="R_TAU0_Channel6_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel6> + <Channel7 InUse=""> + <R_TAU0_Channel7_Start UserName="R_TAU0_Channel7_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU0_Channel7_Stop UserName="R_TAU0_Channel7_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU0_Channel7_Get_PulseWidth UserName="R_TAU0_Channel7_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel7> + </TAU0> + <TAU1> + <R_TAU1_Create UserName="R_TAU1_Create" LibName="R_TAU_Create" InUse="" Init="1" InitMode="" /> + <R_TAU1_Set_PowerOff UserName="R_TAU1_Set_PowerOff" LibName="R_TAU_Set_PowerOff" InUse="" /> + <Channel0 InUse=""> + <R_TAU1_Channel0_Start UserName="R_TAU1_Channel0_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel0_Stop UserName="R_TAU1_Channel0_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel0_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel0_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel0_Set_SoftwareTriggerOn UserName="R_TAU1_Channel0_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <R_TAU1_Channel1_Start UserName="R_TAU1_Channel1_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel1_Higher8bits_Start UserName="R_TAU1_Channel1_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU1_Channel1_Lower8bits_Start UserName="R_TAU1_Channel1_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU1_Channel1_Stop UserName="R_TAU1_Channel1_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel1_Higher8bits_Stop UserName="R_TAU1_Channel1_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU1_Channel1_Lower8bits_Stop UserName="R_TAU1_Channel1_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU1_Channel1_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel1_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <R_TAU1_Channel2_Start UserName="R_TAU1_Channel2_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel2_Stop UserName="R_TAU1_Channel2_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel2_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel2_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel2_Set_SoftwareTriggerOn UserName="R_TAU1_Channel2_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <R_TAU1_Channel3_Start UserName="R_TAU1_Channel3_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel3_Higher8bits_Start UserName="R_TAU1_Channel3_Higher8bits_Start" LibName="R_TAU_Channeln_Higher8bits_Start" InUse="" /> + <R_TAU1_Channel3_Lower8bits_Start UserName="R_TAU1_Channel3_Lower8bits_Start" LibName="R_TAU_Channeln_Lower8bits_Start" InUse="" /> + <R_TAU1_Channel3_Stop UserName="R_TAU1_Channel3_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel3_Higher8bits_Stop UserName="R_TAU1_Channel3_Higher8bits_Stop" LibName="R_TAU_Channeln_Higher8bits_Stop" InUse="" /> + <R_TAU1_Channel3_Lower8bits_Stop UserName="R_TAU1_Channel3_Lower8bits_Stop" LibName="R_TAU_Channeln_Lower8bits_Stop" InUse="" /> + <R_TAU1_Channel3_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel3_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel3> + <Channel4 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <R_TAU1_Channel4_Start UserName="R_TAU1_Channel4_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel4_Stop UserName="R_TAU1_Channel4_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel4_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel4_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel4_Set_SoftwareTriggerOn UserName="R_TAU1_Channel4_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel4> + <Channel5 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <R_TAU1_Channel5_Start UserName="R_TAU1_Channel5_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel5_Stop UserName="R_TAU1_Channel5_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel5_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel5_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel5> + <Channel6 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <R_TAU1_Channel6_Start UserName="R_TAU1_Channel6_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel6_Stop UserName="R_TAU1_Channel6_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel6_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel6_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + <R_TAU1_Channel6_Set_SoftwareTriggerOn UserName="R_TAU1_Channel6_Set_SoftwareTriggerOn" LibName="R_TAU_Channeln_Set_SoftwareTriggerOn" InUse="" /> + </Channel6> + <Channel7 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <R_TAU1_Channel7_Start UserName="R_TAU1_Channel7_Start" LibName="R_TAU_Channeln_Start" InUse="" /> + <R_TAU1_Channel7_Stop UserName="R_TAU1_Channel7_Stop" LibName="R_TAU_Channeln_Stop" InUse="" /> + <R_TAU1_Channel7_Get_PulseWidth Chip="RL78F14_80pin,RL78F14_100pin" UserName="R_TAU1_Channel7_Get_PulseWidth" LibName="R_TAU_Channeln_Get_PulseWidth" InUse="" /> + </Channel7> + </TAU1> + <TMRJ0 InUse=""> + <R_TMR_RJ0_Create UserName="R_TMR_RJ0_Create" LibName="R_TMR_RJn_Create" InUse="" Init="2" InitMode="" /> + <R_TMR_RJ0_Start UserName="R_TMR_RJ0_Start" LibName="R_TMR_RJn_Start" InUse="" /> + <R_TMR_RJ0_Stop UserName="R_TMR_RJ0_Stop" LibName="R_TMR_RJn_Stop" InUse="" /> + <R_TMR_RJ0_Get_PulseWidth UserName="R_TMR_RJ0_Get_PulseWidth" LibName="R_TMR_RJn_Get_PulseWidth" InUse="" /> + <R_TMR_RJ0_Set_PowerOff UserName="R_TMR_RJ0_Set_PowerOff" LibName="R_TMR_RJn_Set_PowerOff" InUse="" /> + </TMRJ0> + <TMRD0 InUse=""> + <R_TMR_RD0_Create UserName="R_TMR_RD0_Create" LibName="R_TMR_RDn_Create" InUse="" Init="2" InitMode="" /> + <R_TMR_RD0_Start UserName="R_TMR_RD0_Start" LibName="R_TMR_RDn_Start" InUse="" /> + <R_TMR_RD0_Stop UserName="R_TMR_RD0_Stop" LibName="R_TMR_RDn_Stop" InUse="" /> + <R_TMR_RD0_Get_PulseWidth UserName="R_TMR_RD0_Get_PulseWidth" LibName="R_TMR_RDn_Get_PulseWidth" InUse="" /> + <R_TMR_RD0_Set_PowerOff UserName="R_TMR_RD0_Set_PowerOff" LibName="R_TMR_RDn_Set_PowerOff" InUse="" /> + <R_TMR_RD0_ForcedOutput_Start UserName="R_TMR_RD0_ForcedOutput_Start" LibName="R_TMR_RDn_ForcedOutput_Start" InUse="" /> + <R_TMR_RD0_ForcedOutput_Stop UserName="R_TMR_RD0_ForcedOutput_Stop" LibName="R_TMR_RDn_ForcedOutput_Stop" InUse="" /> + </TMRD0> + <TMRD1 InUse=""> + <R_TMR_RD1_Create UserName="R_TMR_RD1_Create" LibName="R_TMR_RDn_Create" InUse="" Init="2" InitMode="" /> + <R_TMR_RD1_Start UserName="R_TMR_RD1_Start" LibName="R_TMR_RDn_Start" InUse="" /> + <R_TMR_RD1_Stop UserName="R_TMR_RD1_Stop" LibName="R_TMR_RDn_Stop" InUse="" /> + <R_TMR_RD1_Get_PulseWidth UserName="R_TMR_RD1_Get_PulseWidth" LibName="R_TMR_RDn_Get_PulseWidth" InUse="" /> + <R_TMR_RD1_Set_PowerOff UserName="R_TMR_RD1_Set_PowerOff" LibName="R_TMR_RDn_Set_PowerOff" InUse="" /> + <R_TMR_RD1_ForcedOutput_Start UserName="R_TMR_RD1_ForcedOutput_Start" LibName="R_TMR_RDn_ForcedOutput_Start" InUse="" /> + <R_TMR_RD1_ForcedOutput_Stop UserName="R_TMR_RD1_ForcedOutput_Stop" LibName="R_TMR_RDn_ForcedOutput_Stop" InUse="" /> + </TMRD1> + </r_cg_timer.c> + <r_cg_timer_user.c UserName="r_cg_timer_user.c" LibName="_user.c" InUse=""> + <Type R_TAU_Create_UserInit="void R_TAUn_Create_UserInit(void)" r_tau_channeln_interrupt="__interrupt static void r_tau_channeln_interrupt(void)" r_tau_channeln_higher8bits_interrupt="__interrupt static void r_tau_channeln_higher8bits_interrupt(void)" R_WUTM_Create_UserInit="void R_WUTM_Create_UserInit(void)" r_wutm_interrupt="__interrupt static void r_wutm_interrupt(void)" /> + <TAU0> + <R_TAU0_Create_UserInit UserName="R_TAU0_Create_UserInit" LibName="R_TAU_Create_UserInit" InUse="" /> + <Channel0 InUse=""> + <r_tau0_channel0_interrupt UserName="r_tau0_channel0_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <r_tau0_channel1_interrupt UserName="r_tau0_channel1_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau0_channel1_higher8bits_interrupt UserName="r_tau0_channel1_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <r_tau0_channel2_interrupt UserName="r_tau0_channel2_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <r_tau0_channel3_interrupt UserName="r_tau0_channel3_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau0_channel3_higher8bits_interrupt UserName="r_tau0_channel3_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel3> + <Channel4 InUse=""> + <r_tau0_channel4_interrupt UserName="r_tau0_channel4_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel4> + <Channel5 InUse=""> + <r_tau0_channel5_interrupt UserName="r_tau0_channel5_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel5> + <Channel6 InUse=""> + <r_tau0_channel6_interrupt UserName="r_tau0_channel6_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel6> + <Channel7 InUse=""> + <r_tau0_channel7_interrupt UserName="r_tau0_channel7_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel7> + </TAU0> + <TAU1> + <R_TAU1_Create_UserInit UserName="R_TAU1_Create_UserInit" LibName="R_TAU_Create_UserInit" InUse="" /> + <Channel0 InUse=""> + <r_tau1_channel0_interrupt UserName="r_tau1_channel0_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel0> + <Channel1 InUse=""> + <r_tau1_channel1_interrupt UserName="r_tau1_channel1_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau1_channel1_higher8bits_interrupt UserName="r_tau1_channel1_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel1> + <Channel2 InUse=""> + <r_tau1_channel2_interrupt UserName="r_tau1_channel2_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel2> + <Channel3 InUse=""> + <r_tau1_channel3_interrupt UserName="r_tau1_channel3_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + <r_tau1_channel3_higher8bits_interrupt UserName="r_tau1_channel3_higher8bits_interrupt" INTHandle="" LibName="r_tau_channeln_higher8bits_interrupt" InUse="" /> + </Channel3> + <Channel4 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <r_tau1_channel4_interrupt UserName="r_tau1_channel4_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel4> + <Channel5 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <r_tau1_channel5_interrupt UserName="r_tau1_channel5_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel5> + <Channel6 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <r_tau1_channel6_interrupt UserName="r_tau1_channel6_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel6> + <Channel7 Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" InUse=""> + <r_tau1_channel7_interrupt UserName="r_tau1_channel7_interrupt" INTHandle="" LibName="r_tau_channeln_interrupt" InUse="" /> + </Channel7> + </TAU1> + <TMRJ0 InUse=""> + <R_TMR_RJ0_Create_UserInit UserName="R_TMR_RJ0_Create_UserInit" LibName="R_TMR_RJn_Create_UserInit" InUse="" /> + <r_tmr_rj0_interrupt UserName="r_tmr_rj0_interrupt" LibName="r_tmr_rjn_interrupt" INTHandle="" InUse="" /> + </TMRJ0> + <TMRD0 InUse=""> + <R_TMR_RD0_Create_UserInit UserName="R_TMR_RD0_Create_UserInit" LibName="R_TMR_RDn_Create_UserInit" InUse="" /> + <r_tmr_rd0_interrupt UserName="r_tmr_rd0_interrupt" LibName="r_tmr_rdn_interrupt" INTHandle="" InUse="" /> + </TMRD0> + <TMRD1 InUse=""> + <R_TMR_RD1_Create_UserInit UserName="R_TMR_RD1_Create_UserInit" LibName="R_TMR_RDn_Create_UserInit" InUse="" /> + <r_tmr_rd1_interrupt UserName="r_tmr_rd1_interrupt" LibName="r_tmr_rdn_interrupt" INTHandle="" InUse="" /> + </TMRD1> + </r_cg_timer_user.c> + <r_cg_timer.h UserName="r_cg_timer.h" LibName=".h" InUse="" /> + </TAU> + <WDT> + <r_cg_wdt.c UserName="r_cg_wdt.c" LibName=".c" InUse="1"> + <Type R_WDT_Create="void R_WDT_Create(void)" R_WDT_Restart="void R_WDT_Restart(void)" /> + <R_WDT_Create UserName="R_WDT_Create" LibName="R_WDT_Create" InUse="1" Init="1" InitMode="" /> + <R_WDT_Restart UserName="R_WDT_Restart" LibName="R_WDT_Restart" InUse="1" /> + </r_cg_wdt.c> + <r_cg_wdt_user.c UserName="r_cg_wdt_user.c" LibName="_user.c" InUse="1"> + <Type R_WDT_Create_UserInit="void R_WDT_Create_UserInit(void)" r_wdt_interrupt="__interrupt static void r_wdt_interrupt(void)" /> + <R_WDT_Create_UserInit UserName="R_WDT_Create_UserInit" LibName="R_WDT_Create_UserInit" InUse="" /> + <r_wdt_interrupt UserName="r_wdt_interrupt" INTHandle="" LibName="r_wdt_interrupt" InUse="1" /> + </r_cg_wdt_user.c> + <r_cg_wdt.h UserName="r_cg_wdt.h" LibName=".h" InUse="1" /> + </WDT> + <RTC> + <r_cg_rtc.c UserName="r_cg_rtc.c" LibName=".c" InUse=""> + <Type R_RTC_Create="void R_RTC_Create(void)" R_RTC_Start="void R_RTC_Start(void)" R_RTC_Stop="void R_RTC_Stop(void)" R_RTC_Set_HourSystem="MD_STATUS R_RTC_SetHourSystem(rtc_hour_system_t hour_system)" R_RTC_Get_CounterValue="MD_STATUS R_RTC_Get_CounterValue(rtc_counter_value_t * const counter_read_val)" R_RTC_Set_CounterValue="MD_STATUS R_RTC_Set_CounterValue(rtc_counter_value_t counter_write_val)" R_RTC_Set_AlarmOn="void R_RTC_Set_AlarmOn(void)" R_RTC_Set_AlarmOff="void R_RTC_Set_AlarmOff(void)" R_RTC_Set_AlarmValue="void R_RTC_Set_AlarmValue(rtc_alarm_value_t alarm_val)" R_RTC_Get_AlarmValue="void R_RTC_Get_AlarmValue(rtc_alarm_value_t * const alarm_val)" R_RTC_Set_ConstPeriodInterruptOn="MD_STATUS R_RTC_Set_ConstPeriodInterruptOn(rtc_int_period_t period)" R_RTC_Set_ConstPeriodInterruptOff="void R_RTC_Set_ConstPeriodInterruptOff(void)" R_RTC_Set_RTC1HZOn="void R_RTC_Set_RTC1HZOn(void)" R_RTC_Set_RTC1HZOff="void R_RTC_Set_RTC1HZOff(void)" R_RTC_Set_PowerOff="void R_RTC_Set_PowerOff(void)" /> + <R_RTC_Create UserName="R_RTC_Create" LibName="R_RTC_Create" InUse="" Init="1" InitMode="" /> + <R_RTC_Start UserName="R_RTC_Start" LibName="R_RTC_Start" InUse="" /> + <R_RTC_Stop UserName="R_RTC_Stop" LibName="R_RTC_Stop" InUse="" /> + <R_RTC_Set_HourSystem UserName="R_RTC_Set_HourSystem" LibName="R_RTC_Set_HourSystem" InUse="" /> + <R_RTC_Get_CounterValue UserName="R_RTC_Get_CounterValue" LibName="R_RTC_Get_CounterValue" InUse="" /> + <R_RTC_Set_CounterValue UserName="R_RTC_Set_CounterValue" LibName="R_RTC_Set_CounterValue" InUse="" /> + <R_RTC_Set_AlarmOn UserName="R_RTC_Set_AlarmOn" LibName="R_RTC_Set_AlarmOn" InUse="" /> + <R_RTC_Set_AlarmOff UserName="R_RTC_Set_AlarmOff" LibName="R_RTC_Set_AlarmOff" InUse="" /> + <R_RTC_Set_AlarmValue UserName="R_RTC_Set_AlarmValue" LibName="R_RTC_Set_AlarmValue" InUse="" /> + <R_RTC_Get_AlarmValue UserName="R_RTC_Get_AlarmValue" LibName="R_RTC_Get_AlarmValue" InUse="" /> + <R_RTC_Set_ConstPeriodInterruptOn UserName="R_RTC_Set_ConstPeriodInterruptOn" LibName="R_RTC_Set_ConstPeriodInterruptOn" InUse="" /> + <R_RTC_Set_ConstPeriodInterruptOff UserName="R_RTC_Set_ConstPeriodInterruptOff" LibName="R_RTC_Set_ConstPeriodInterruptOff" InUse="" /> + <R_RTC_Set_RTC1HZOn UserName="R_RTC_Set_RTC1HZOn" LibName="R_RTC_Set_RTC1HZOn" InUse="" /> + <R_RTC_Set_RTC1HZOff UserName="R_RTC_Set_RTC1HZOff" LibName="R_RTC_Set_RTC1HZOff" InUse="" /> + <R_RTC_Set_PowerOff UserName="R_RTC_Set_PowerOff" LibName="R_RTC_Set_PowerOff" InUse="" /> + </r_cg_rtc.c> + <r_cg_rtc_user.c UserName="r_cg_rtc_user.c" LibName="_user.c" InUse=""> + <Type R_RTC_Create_UserInit="void R_RTC_Create_UserInit(void)" r_rtc_interrupt="__interrupt static void r_rtc_interrupt(void)" r_rtc_callback_constperiod="static void r_rtc_callback_constperiod(void)" r_rtc_callback_alarm="static void r_rtc_callback_alarm(void)" /> + <R_RTC_Create_UserInit UserName="R_RTC_Create_UserInit" LibName="R_RTC_Create_UserInit" InUse="" /> + <r_rtc_interrupt UserName="r_rtc_interrupt" INTHandle="" LibName="r_rtc_interrupt" InUse="" /> + <r_rtc_callback_constperiod UserName="r_rtc_callback_constperiod" LibName="r_rtc_callback_constperiod" InUse="" /> + <r_rtc_callback_alarm UserName="r_rtc_callback_alarm" LibName="r_rtc_callback_alarm" InUse="" /> + </r_cg_rtc_user.c> + <r_cg_rtc.h UserName="r_cg_rtc.h" LibName=".h" InUse="" /> + </RTC> + <DAC InUse=""> + <r_cg_dac.c UserName="r_cg_dac.c" LibName=".c" InUse=""> + <Type R_DAC_Create="void R_DAC_Create(void)" R_DACn_Start="void R_DACn_Start(void)" R_DACn_Stop="void R_DACn_Stop(void)" R_DACn_Set_ConversionValue="void R_DACn_Set_ConversionValue(uint8_t reg_value)" R_DAC_Set_PowerOff="void R_DAC_Set_PowerOff(void)" /> + <R_DAC_Create UserName="R_DAC_Create" LibName="R_DAC_Create" InUse="" Init="2" InitMode="" /> + <DAC0 InUse=""> + <R_DAC0_Start UserName="R_DAC0_Start" LibName="R_DACn_Start" InUse="" /> + <R_DAC0_Stop UserName="R_DAC0_Stop" LibName="R_DACn_Stop" InUse="" /> + <R_DAC0_Set_ConversionValue UserName="R_DAC0_Set_ConversionValue" LibName="R_DACn_Set_ConversionValue" InUse="" /> + </DAC0> + <R_DAC_Set_PowerOff UserName="R_DAC_Set_PowerOff" LibName="R_DAC_Set_PowerOff" InUse="" /> + </r_cg_dac.c> + <r_cg_dac_user.c UserName="r_cg_dac_user.c" LibName="_user.c" InUse=""> + <Type R_DAC_Create_UserInit="void R_DAC_Create_UserInit(void)" /> + <R_DAC_Create_UserInit UserName="R_DAC_Create_UserInit" LibName="R_DAC_Create_UserInit" InUse="" /> + </r_cg_dac_user.c> + <r_cg_dac.h UserName="r_cg_dac.h" LibName=".h" InUse="" /> + </DAC> + <DTC InUse=""> + <r_cg_dtc.c UserName="r_cg_dtc.c" LibName=".c" InUse=""> + <Type R_DTC_Create="void R_DTC_Create(void)" R_DTCDn_Start="void R_DTCDn_Start(void)" R_DTCDn_Stop="void R_DTCDn_Stop(void)" R_DTC_Set_PowerOff="void R_DTC_Set_PowerOff(void)" /> + <R_DTC_Create UserName="R_DTC_Create" LibName="R_DTC_Create" InUse="" Init="2" InitMode="" /> + <DTCD0> + <R_DTCD0_Start LibName="R_DTCDn_Start" InUse="" Visible="False" /> + <R_DTCD0_Stop LibName="R_DTCDn_Stop" InUse="" Visible="False" /> + </DTCD0> + <DTCD1> + <R_DTCD1_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD1_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD1> + <DTCD2> + <R_DTCD2_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD2_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD2> + <DTCD3> + <R_DTCD3_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD3_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD3> + <DTCD4> + <R_DTCD4_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD4_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD4> + <DTCD5> + <R_DTCD5_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD5_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD5> + <DTCD6> + <R_DTCD6_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD6_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD6> + <DTCD7> + <R_DTCD7_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD7_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD7> + <DTCD8> + <R_DTCD8_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD8_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD8> + <DTCD9> + <R_DTCD9_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD9_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD9> + <DTCD10> + <R_DTCD10_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD10_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD10> + <DTCD11> + <R_DTCD11_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD11_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD11> + <DTCD12> + <R_DTCD12_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD12_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD12> + <DTCD13> + <R_DTCD13_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD13_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD13> + <DTCD14> + <R_DTCD14_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD14_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD14> + <DTCD15> + <R_DTCD15_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD15_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD15> + <DTCD16> + <R_DTCD16_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD16_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD16> + <DTCD17> + <R_DTCD17_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD17_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD17> + <DTCD18> + <R_DTCD18_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD18_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD18> + <DTCD19> + <R_DTCD19_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD19_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD19> + <DTCD20> + <R_DTCD20_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD20_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD20> + <DTCD21> + <R_DTCD21_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD21_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD21> + <DTCD22> + <R_DTCD22_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD22_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD22> + <DTCD23> + <R_DTCD23_Start LibName="R_DTCDn_Start" InUse="" Visible="false" /> + <R_DTCD23_Stop LibName="R_DTCDn_Stop" InUse="" Visible="false" /> + </DTCD23> + <DTCH0> + <R_DTCH0_Start LibName="R_DTCHn_Start" InUse="" Visible="false" /> + <R_DTCH0_Stop LibName="R_DTCHn_Stop" InUse="" Visible="false" /> + </DTCH0> + <DTCH1> + <R_DTCH1_Start LibName="R_DTCHn_Start" InUse="" Visible="false" /> + <R_DTCH1_Stop LibName="R_DTCHn_Stop" InUse="" Visible="false" /> + </DTCH1> + <R_DTC_Set_PowerOff UserName="R_DTC_Set_PowerOff" LibName="R_DTC_Set_PowerOff" InUse="" /> + </r_cg_dtc.c> + <r_cg_dtc_user.c UserName="r_cg_dtc_user.c" LibName="_user.c" InUse=""> + <Type R_DTC_Create_UserInit="void R_DTC_Create_UserInit(void)" /> + <R_DTC_Create_UserInit UserName="R_DTC_Create_UserInit" LibName="R_DTC_Create_UserInit" InUse="" /> + </r_cg_dtc_user.c> + <r_cg_dtc.h UserName="r_cg_dtc.h" LibName=".h" InUse="" /> + </DTC> + <PCLBUZ Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin"> + <r_cg_pclbuz.c UserName="r_cg_pclbuz.c" LibName=".c" InUse=""> + <Type R_PCLBUZn_Create="void R_PCLBUZn_Create(void) " R_PCLBUZn_Start="void R_PCLBUZn_Start(void)" R_PCLBUZn_Stop="void R_PCLBUZn_Stop(void)" /> + <PCLBUZ0 InUse=""> + <R_PCLBUZ0_Create UserName="R_PCLBUZ0_Create" LibName="R_PCLBUZn_Create" InUse="" Init="1" InitMode="" /> + <R_PCLBUZ0_Start UserName="R_PCLBUZ0_Start" LibName="R_PCLBUZn_Start" InUse="" /> + <R_PCLBUZ0_Stop UserName="R_PCLBUZ0_Stop" LibName="R_PCLBUZn_Stop" InUse="" /> + </PCLBUZ0> + </r_cg_pclbuz.c> + <r_cg_pclbuz_user.c UserName="r_cg_pclbuz_user.c" LibName="_user.c" InUse=""> + <Type R_PCLBUZn_Create_UserInit="void R_PCLBUZn_Create_UserInit(void) " /> + <PCLBUZ0 InUse=""> + <R_PCLBUZ0_Create_UserInit UserName="R_PCLBUZ0_Create_UserInit" LibName="R_PCLBUZn_Create_UserInit" InUse="" Init="1" /> + </PCLBUZ0> + </r_cg_pclbuz_user.c> + <r_cg_pclbuz.h UserName="r_cg_pclbuz.h" LibName=".h" InUse="" /> + </PCLBUZ> + <COMP> + <r_cg_comp.c UserName="r_cg_comp.c" LibName=".c" InUse=""> + <Type R_COMP_Create="void R_COMP_Create(void)" R_COMP0_Start="void R_COMP0_Start(void)" R_COMP0_Stop="void R_COMP0_Stop(void)" /> + <R_COMP_Create UserName="R_COMP_Create" LibName="R_COMP_Create" InUse="" Init="1" InitMode="" /> + <COMP0 InUse=""> + <R_COMP0_Start UserName="R_COMP0_Start" NotSubMacro="" LibName="R_COMP0_Start" InUse="" /> + <R_COMP0_Stop UserName="R_COMP0_Stop" NotSubMacro="" LibName="R_COMP0_Stop" InUse="" /> + </COMP0> + </r_cg_comp.c> + <r_cg_comp_user.c UserName="r_cg_comp_user.c" LibName="_user.c" InUse=""> + <Type R_COMP_Create_UserInit="void R_COMP_Create_UserInit(void)" r_comp0_interrupt="__interrupt static void r_comp0_interrupt(void)" /> + <R_COMP_Create_UserInit UserName="R_COMP_Create_UserInit" LibName="R_COMP_Create_UserInit" InUse="" /> + <COMP0 InUse=""> + <r_comp0_interrupt UserName="r_comp0_interrupt" NotSubMacro="" LibName="r_comp0_interrupt" INTHandle="" InUse="" /> + </COMP0> + </r_cg_comp_user.c> + <r_cg_comp.h UserName="r_cg_comp.h" LibName=".h" InUse="" /> + </COMP> + <ELC> + <r_cg_elc.c UserName="r_cg_elc.c" LibName=".c" InUse=""> + <Type R_ELC_Create="void R_ELC_Create(void)" R_ELC_Stop="void R_ELC_Stop(uint32_t event)" /> + <R_ELC_Create UserName="R_ELC_Create" LibName="R_ELC_Create" InUse="" Init="2" InitMode="" /> + <R_ELC_Stop UserName="R_ELC_Stop" LibName="R_ELC_Stop" InUse="" /> + </r_cg_elc.c> + <r_cg_elc_user.c UserName="r_cg_elc_user.c" LibName="_user.c" InUse=""> + <Type R_ELC_Create_UserInit="void R_ELC_Create_UserInit(void)" /> + <R_ELC_Create_UserInit UserName="R_ELC_Create_UserInit" LibName="R_ELC_Create_UserInit" InUse="" /> + </r_cg_elc_user.c> + <r_cg_elc.h UserName="r_cg_elc.h" LibName=".h" InUse="" /> + </ELC> + <LVD> + <r_cg_lvd.c UserName="r_cg_lvd.c" LibName=".c" InUse=""> + <Type R_LVD_Create="void R_LVD_Create(void)" R_LVD_InterruptMode_Start="void R_LVD_InterruptMode_Start(void)" /> + <R_LVD_Create UserName="R_LVD_Create" LibName="R_LVD_Create" InUse="" Init="1" InitMode="" /> + <R_LVD_InterruptMode_Start UserName="R_LVD_InterruptMode_Start" LibName="R_LVD_InterruptMode_Start" InUse="" /> + </r_cg_lvd.c> + <r_cg_lvd_user.c UserName="r_cg_lvd_user.c" LibName="_user.c" InUse=""> + <Type R_LVD_Create_UserInit="void R_LVD_Create_UserInit(void)" r_lvd_interrupt="__interrupt static void r_lvd_interrupt(void)" /> + <R_LVD_Create_UserInit UserName="R_LVD_Create_UserInit" LibName="R_LVD_Create_UserInit" InUse="" /> + <r_lvd_interrupt UserName="r_lvd_interrupt" INTHandle="" LibName="r_lvd_interrupt" InUse="" /> + </r_cg_lvd_user.c> + <r_cg_lvd.h UserName="r_cg_lvd.h" LibName=".h" InUse="" /> + </LVD> + </FUNC> + <TAG> + <GlobleUserTag> + <cg_security3 Name="cg_security3" Value="00" /> + <cg_security8 Name="cg_security8" Value="00" /> + <cg_security4 Name="cg_security4" Value="00" /> + <cg_iawctl_value Name="cg_iawctl_value" Value="00" /> + <cg_crc_area Name="cg_crc_area" Value="00" /> + <cg_security0 Name="cg_security0" Value="00" /> + <cg_security9 Name="cg_security9" Value="00" /> + <cg_option Name="cg_option" Value="04" /> + <pior_value8 Name="pior_value8" Value="00" /> + <cg_security5 Name="cg_security5" Value="00" /> + <wdt_option Name="wdt_option" Value="FF" /> + <lvi_option Name="lvi_option" Value="FF" /> + <pior_value4 Name="pior_value4" Value="00" /> + <pior_value5 Name="pior_value5" Value="00" /> + <cg_security6 Name="cg_security6" Value="00" /> + <cg_security1 Name="cg_security1" Value="00" /> + <pior_value0 Name="pior_value0" Value="00" /> + <pior_value1 Name="pior_value1" Value="00" /> + <pior_value6 Name="pior_value6" Value="00" /> + <pior_value7 Name="pior_value7" Value="00" /> + <cg_security7 Name="cg_security7" Value="00" /> + <ocdstart Name="ocdstart" Value="3FE00" /> + <cg_security2 Name="cg_security2" Value="00" /> + <clock_option Name="clock_option" Value="F8" /> + <pior_value2 Name="pior_value2" Value="00" /> + <pior_value3 Name="pior_value3" Value="00" /> + </GlobleUserTag> + </TAG> + </DIR> + <MACRO> + <CGC Prepared="true" SetFlag="True" NeedRefresh="True"> + <CGC SetFlag="True" MacroName="cgc" /> + </CGC> + <PORT HelpID="port" Prepared="true" SetFlag="" NeedRefresh="False"> + <PORT SetFlag="" MacroName="PORT" /> + </PORT> + <INTC SetFlag="" HelpID="int" NeedRefresh="False"> + <INTP Accelerate="No" MacroName="INTP" /> + <KEY Chip="RL78F14_80pin,RL78F14_100pin" PIOR50="0" MacroName="KEY" /> + </INTC> + <Serial SetFlag="" HelpID="serial" NeedRefresh="False"> + <SAU0 Accelerate="No" MacroName="SAU" Channel="0"> + <Channel0 UART="0" CSI="00" IIC="00" Channel="0" /> + <Channel1 Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin,RL78F14_48pin,RL78F14_32pin" PIOR41="0" UART="0" CSI="01" IIC="01" Channel="1" /> + <Channel1 Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin" PIOR41="1" UART="0" CSI="01" Channel="1" /> + </SAU0> + <SAU1 Accelerate="No" MacroName="SAU" Channel="1" Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" PIOR43="1" PIOR42="1"> + <Channel0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" UART="1" CSI="10" Channel="0" /> + <Channel1 Chip="RL78F14_100pin" UART="1" CSI="11" Channel="1" /> + </SAU1> + <SAU1 Accelerate="No" MacroName="SAU" Channel="1" Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin" PIOR43="0" PIOR42="1"> + <Channel0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin" UART="1" CSI="10" Channel="0" /> + <Channel1 Chip="RL78F14_100pin,RL78F14_64pin,RL78F14_80pin" UART="1" CSI="11" IIC="11" Channel="1" /> + </SAU1> + <SAU1 Accelerate="No" MacroName="SAU" Channel="1" Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin" PIOR42="0"> + <Channel0 Chip="RL78F14_100pin,RL78F14_80pin,RL78F14_64pin,RL78F14_48pin,RL78F14_32pin" UART="1" CSI="10" IIC="10" Channel="0" /> + <Channel1 Chip="RL78F14_100pin" PIOR43="0" UART="1" CSI="11" IIC="11" Channel="1" /> + <Channel1 Chip="RL78F14_100pin" PIOR43="1" UART="1" CSI="11" Channel="1" /> + </SAU1> + <IICA0 Accelerate="No" Chip="RL78F14_32pin,RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" MacroName="IICA" Channel="0" /> + </Serial> + <ADC SetFlag="" HelpID="adc" NeedRefresh="False"> + <ADC SetFlag="" MacroName="ADC" /> + </ADC> + <TAU SetFlag="false" HelpID="timer" NeedRefresh="False"> + <TAU0 Accelerate="No" MacroName="TAU" Channel="0" ChannelNum="0,1,2,3,4,5,6,7" /> + <TAU1 Accelerate="No" Chip="R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PGG,R5F10PGH,R5F10PGJ,R5F10PLG,R5F10PLH,R5F10PLJ,R5F10PMG,R5F10PMH,R5F10PMJ,RL78F14_100pin" MacroName="TAU" Channel="1" ChannelNum="0,1,2,3,4,5,6,7" /> + <TMRJ0 SetFlag="" MacroName="TMRJ" Channel="0" /> + <TMRD0 SetFlag="" MacroName="TMRD" Channel="0" /> + <TMRD1 SetFlag="" MacroName="TMRD" Channel="1" /> + </TAU> + <WDT Prepared="true" SetFlag="true" HelpID="watchdogtimer" NeedRefresh="False"> + <WDT SetFlag="true" MacroName="WDT" /> + </WDT> + <RTC SetFlag="" HelpID="rtc" NeedRefresh="False"> + <RTC MacroName="RTC" /> + </RTC> + <DAC HelpID="dac" SetFlag="" NeedRefresh="False"> + <DAC SetFlag="" MacroName="DAC" /> + </DAC> + <DTC HelpID="dtc" SetFlag="" NeedRefresh="False"> + <DTC SetFlag="" MacroName="DTC" /> + </DTC> + <PCLBUZ Chip="RL78F14_48pin,RL78F14_64pin,RL78F14_80pin,RL78F14_100pin" SetFlag="" HelpID="PCLBUZ" NeedRefresh="False"> + <PCLBUZ0 MacroName="PCLBUZ" Channel="0" /> + </PCLBUZ> + <COMP SetFlag="" HelpID="comparator" NeedRefresh="False"> + <COMP SetFlag="" MacroName="COMP" /> + </COMP> + <ELC SetFlag="" HelpID="elc" NeedRefresh="False"> + <ELC Accelerate="No" MacroName="ELC" /> + </ELC> + <LVD SetFlag="" Prepared="true" NeedRefresh="False"> + <LVD MacroName="LVD" /> + </LVD> + </MACRO> + <SETTING> + <CGC> + <setting name="PIN_ASSIGNMENT_FIX_SETTING" value="true" /> + <setting name="OPERATION_MODE_HS_27_55" value="false" /> + <setting name="OPERATION_MODE_HS_40_55" value="true" /> + <setting name="MAIN_CLOCK_SELECT_HIGH_SYSTEM_CLOCK" value="false" /> + <setting name="MAIN_CLOCK_SELECT_HIGH_INTERNAL_CLOCK" value="true" /> + <setting name="INTERNAL_HIGH_CLOCK_OPERATION" value="true" /> + <setting name="INTERNAL_HIGH_CLOCK_FREQUENCY" value="8" /> + <setting name="HIGH_SYSTEM_CLOCK_OPERATION" value="false" /> + <setting name="HIGH_SYSTEM_CLOCK_SELECT_EXTERNAL_CLOCK" value="false" /> + <setting name="HIGH_SYSTEM_CLOCK_SELECT_X1_CLOCK" value="true" /> + <setting name="X1_CLOCK_STABLE_TIME" value="7" /> + <setting name="HIGH_SYSTEM_CLOCK_FREQUENCY" value="5" /> + <setting name="SUBCLOCK_SELECT_XT1_CLOCK" value="true" /> + <setting name="SUBCLOCK_XT1_OSCILLATION_MODE" value="0" /> + <setting name="SUBCLOCK_OPERATION" value="false" /> + <setting name="SUBCLOCK_SELECT_EXTERNAL_CLOCK" value="false" /> + <setting name="SUBCLOCK_HALT_STOP_STATUS" value="0" /> + <setting name="CPU_PERIPHERAL_CLOCK_FREQUENCY" value="0" /> + <setting name="FPLL_FREQUENCY_VALUE" value="0" /> + <setting name="FPLL_FREQUENCY_OPERATION" value="false" /> + <setting name="FPLL_LOCKUP_WAIT_COUNTER" value="0" /> + <setting name="FMP_FREQUENCY_VALUE" value="0" /> + <setting name="TRD_FREQUENCY_VALUE" value="0" /> + <setting name="FSL_FREQUENCY_VALUE" value="0" /> + <setting name="RTC_IT_CLOCK" value="0" /> + <setting name="OCD_UNUSED" value="true" /> + <setting name="OCD_USED" value="false" /> + <setting name="RRM_UNUSED" value="false" /> + <setting name="RRM_USED" value="true" /> + <setting name="TRACE_UNUSED" value="false" /> + <setting name="TRACE_USED" value="true" /> + <setting name="HOTPLUG_UNUSED" value="true" /> + <setting name="HOTPLUG_USED" value="false" /> + <setting name="SECURITY_ID_AUTHENTICATION_ERASE" value="true" /> + <setting name="SECURITY_ID_AUTHENTICATION_NOT_ERASE" value="false" /> + <setting name="SECURITY_ID_SELECT" value="true" /> + <setting name="SECURITY_ID_VALUE" value="0x00000000000000000000" /> + <setting name="RESET_SOURCE_FUNCTION_OUTPUT" value="true" /> + <setting name="RESOUT_UNUSED" value="true" /> + <setting name="RESOUT_USED" value="false" /> + <setting name="ILLEGAL_MEMORY_ACCESS_UNUSED" value="true" /> + <setting name="ILLEGAL_MEMORY_ACCESS_USED" value="false" /> + <setting name="RAM_GUARD_UNUSED" value="true" /> + <setting name="RAM_GUARD_USED" value="false" /> + <setting name="RAM_GUARD_AREA" value="0" /> + <setting name="PORT_GUARD_UNUSED" value="true" /> + <setting name="PORT_GUARD_USED" value="false" /> + <setting name="INTERRUPT_GUARD_UNUSED" value="true" /> + <setting name="INTERRUPT_GUARD_USED" value="false" /> + <setting name="CHIP_CONTROL_GUARD_UNUSED" value="true" /> + <setting name="CHIP_CONTROL_GUARD_USED" value="false" /> + <setting name="STACKPOINTER_INTERRUPT_PRIORITY" value="3" /> + <setting name="STACKPOINTER_INTERRUPT_USED" value="true" /> + <setting name="CLOCK_MONITOR_INTERRUPT_PRIORITY" value="3" /> + <setting name="CLOCK_MONITOR_INTERRUPT_USED" value="true" /> + <setting name="CLOCK_MONITOR_UNUSED" value="true" /> + <setting name="CLOCK_MONITOR_USED" value="false" /> + <setting name="STACK_POINTER_UNUSED" value="true" /> + <setting name="STACK_POINTER_USED" value="false" /> + <setting name="STACK_POINTER_UNDERFLOW_DATA" value="0x0000" /> + <setting name="STACK_POINTER_OVERFLOW_DATA" value="0xFFFE" /> + <setting name="RAM_ECC_INTERRUPT_USED" value="false" /> + <setting name="RAM_ECC_INTERRUPT_PRIORITY" value="3" /> + <setting name="DataFlash" value="unused" /> + <setting name="ProgramFlash" value="unused" /> + <setting name="Monitor" value="unused" /> + <setting name="StartStop" value="unused" /> + <setting name="Emulator" value="E1" /> + </CGC> + </SETTING> +</RL78F14> + + + \ No newline at end of file diff --git a/multical.temp.mtud b/multical.temp.mtud new file mode 100644 index 0000000..37eff9a --- /dev/null +++ b/multical.temp.mtud @@ -0,0 +1,367 @@ + + + + 0 + R5F10PPJ + SymbolOffset + Yes + + + + + + + + + + False + NonStopOverwriteMemory + ST10US + All + False + OverThreshold + False + False + + + + + 12.2.20122.2006 + + + + + 12.2.20122.2006 + 9.13.00.05 + + + + + 12.2.20122.2006 + 9.13.00.05 + + + + + enable + enable + + + + + 1 + 0 + + + + + False + False + False + False + 291a5aad-8f89-4443-8b93-58ebd220ca9c + FunctionName + False + False + 0 + -1 + True + ClassName + False + False + 1 + -1 + True + Namespace + True + False + 2 + -1 + True + FileName + False + False + 3 + -1 + True + FilePath + True + False + 4 + -1 + True + PEInformation + False + False + 5 + -1 + True + Import + True + False + 6 + -1 + True + AccessSpecifier + False + False + 7 + -1 + True + Attribute + False + False + 8 + -1 + True + ReturnType + False + False + 9 + -1 + True + ArgumentsCount + True + False + 10 + -1 + True + Arguments + False + False + 11 + -1 + True + CodeSize + False + False + 12 + -1 + True + StackSize + False + False + 13 + -1 + True + StartAddress + False + False + 14 + -1 + True + EndAddress + True + False + 15 + -1 + True + ReferenceCount + False + False + 16 + -1 + True + ExecutionCount + True + False + 17 + -1 + True + ExecutionTime + True + False + 18 + -1 + True + PercentageExecutionTime + True + False + 19 + -1 + True + AverageExecutionTime + True + False + 20 + -1 + True + CodeCoverage + True + False + 21 + -1 + True + + + + + False + False + False + False + 291a5aad-8f89-4443-8b93-58ebd220ca9c + VariableName + False + False + 0 + -1 + True + ClassName + False + False + 1 + -1 + True + Namespace + True + False + 2 + -1 + True + FileName + False + False + 3 + -1 + True + FunctionName + True + False + 4 + -1 + True + FilePath + True + False + 5 + -1 + True + PEInformation + False + False + 6 + -1 + True + Import + True + False + 7 + -1 + True + AccessSpecifier + False + False + 8 + -1 + True + Attribute + False + False + 9 + -1 + True + Type + False + False + 10 + -1 + True + Members + False + False + 11 + -1 + True + Address + False + False + 12 + -1 + True + Size + False + False + 13 + -1 + True + ReferenceCount + False + False + 14 + -1 + True + ReadCount + True + False + 15 + -1 + True + WriteCount + True + False + 16 + -1 + True + ReadWriteCount + True + False + 17 + -1 + True + MinimumValue + True + False + 18 + -1 + True + MaximumValue + True + False + 19 + -1 + True + DataCoverage + True + False + 20 + -1 + True + + + + + PanelAnalysisChart + True + + + + + PanelCallGraph + True + + + + + PanelClassMember + 0 + + + + + 0 + + + + + f7cb3835-78e5-4404-aa52-899f930b4cea +7efdc661-68fb-46cf-8e51-d6af2c39e1cf +60996855-5843-4749-8e97-896ad0dda7aa +a679a670-3999-44a1-af72-43f34fab5a94 + + f7cb3835-78e5-4404-aa52-899f930b4cea + 2 + False + + + \ No newline at end of file diff --git a/r_cg_cgc.c b/r_cg_cgc.c new file mode 100644 index 0000000..7e8062f --- /dev/null +++ b/r_cg_cgc.c @@ -0,0 +1,82 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_cgc.c +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements device driver for CGC module. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_cgc.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: R_CGC_Create +* Description : This function initializes the clock generator. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_CGC_Create(void) +{ + /* Set fSL */ + SELLOSC = 1U; + /* Set fMX */ + CMC = _00_CGC_HISYS_PORT | _00_CGC_SUB_PORT | _00_CGC_SYSOSC_DEFAULT | _00_CGC_SUBMODE_DEFAULT; + MSTOP = 1U; + /* Set fMAIN */ + MCM0 = 0U; + MDIV = _01_CGC_FMP_DIV_1; + /* Set fMP to clock through mode */ + SELPLL = 0U; + /* Set fSUB */ + XTSTOP = 1U; + /* Set fCLK */ + CSS = 0U; + /* Set fIH */ + HIOSTOP = 0U; + /* Set RTC clock source */ + RTCCL = _80_CGC_RTC_FIH; + RTCCL |= _42_CGC_RTC_DIV122; + /* Set Timer RD clock source to fCLK, fMP */ + TRD_CKSEL = 0U; +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/r_cg_cgc.h b/r_cg_cgc.h new file mode 100644 index 0000000..e2fc947 --- /dev/null +++ b/r_cg_cgc.h @@ -0,0 +1,227 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_cgc.h +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements device driver for CGC module. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +#ifndef CGC_H +#define CGC_H + +/*********************************************************************************************************************** +Macro definitions (Register bit) +***********************************************************************************************************************/ +/* + Clock operation mode control register (CMC) +*/ +/* High-speed system clock pin operation mode (EXCLK, OSCSEL) */ +#define _C0_CGC_HISYS_PIN (0xC0U) +#define _00_CGC_HISYS_PORT (0x00U) /* X1, X2 as I/O port */ +#define _40_CGC_HISYS_OSC (0x40U) /* X1, X2 as crystal/ceramic resonator connection */ +#define _80_CGC_HISYS_PORT1 (0x80U) /* X1, X2 as I/O port */ +#define _C0_CGC_HISYS_EXT (0xC0U) /* X1 as I/O port, X2 as external clock input */ +/* Subsystem clock pin operation mode (EXCLKS, OSCSELS) */ +#define _30_CGC_SUB_PIN (0x30U) +#define _00_CGC_SUB_PORT (0x00U) /* XT1, XT2 as I/O port */ +#define _10_CGC_SUB_OSC (0x10U) /* XT1, XT2 as crystal connection */ +#define _20_CGC_SUB_PORT1 (0x20U) /* XT1, XT2 as I/O port */ +#define _30_CGC_SUB_EXT (0x30U) /* XT1 as I/O port, XT2 as external clock input */ +/* XT1 oscillator oscillation mode selection (AMPHS1, AMPHS0) */ +#define _00_CGC_SUBMODE_DEFAULT (0x00U) +#define _00_CGC_SUBMODE_LOW (0x00U) /* low power consumption oscillation */ +#define _02_CGC_SUBMODE_NORMAL (0x02U) /* normal oscillation */ +#define _04_CGC_SUBMODE_ULOW (0x04U) /* ultra-low power consumption oscillation */ +/* Control of X1 high-speed system clock oscillation frequency (AMPH) */ +#define _00_CGC_SYSOSC_DEFAULT (0x00U) +#define _00_CGC_SYSOSC_UNDER10M (0x00U) /* fX <= 10MHz */ +#define _01_CGC_SYSOSC_OVER10M (0x01U) /* fX > 10MHz */ + +/* + Clock operation status control register (CSC) +*/ +/* Control of high-speed system clock operation (MSTOP) */ +#define _00_CGC_HISYS_OPER (0x00U) /* X1 oscillator/external clock operating */ +#define _80_CGC_HISYS_STOP (0x80U) /* X1 oscillator/external clock stopped */ +/* Subsystem clock operation (XTSTOP) */ +#define _00_CGC_SUB_OPER (0x00U) /* XT1 oscillator operating */ +#define _40_CGC_SUB_STOP (0x40U) /* XT1 oscillator stopped */ +/* High-speed OCO operation (HIOSTOP) */ +#define _00_CGC_HIO_OPER (0x00U) /* high-speed OCO operating */ +#define _01_CGC_HIO_STOP (0x01U) /* high-speed OCO stopped */ + +/* + Oscillation stabilization time counter status register (OSTC) +*/ +/* Oscillation stabilization time status (MOST18 - MOST8) */ +#define _00_CGC_OSCSTAB_STA0 (0x00U) /* < 2^8/fX */ +#define _80_CGC_OSCSTAB_STA8 (0x80U) /* 2^8/fX */ +#define _C0_CGC_OSCSTAB_STA9 (0xC0U) /* 2^9/fX */ +#define _E0_CGC_OSCSTAB_STA10 (0xE0U) /* 2^10/fX */ +#define _F0_CGC_OSCSTAB_STA11 (0xF0U) /* 2^11/fX */ +#define _F8_CGC_OSCSTAB_STA13 (0xF8U) /* 2^13/fX */ +#define _FC_CGC_OSCSTAB_STA15 (0xFCU) /* 2^15/fX */ +#define _FE_CGC_OSCSTAB_STA17 (0xFEU) /* 2^17/fX */ +#define _FF_CGC_OSCSTAB_STA18 (0xFFU) /* 2^18/fX */ + +/* + Oscillation stabilization time select register (OSTS) +*/ +/* Oscillation stabilization time selection (OSTS2 - OSTS0) */ +#define _00_CGC_OSCSTAB_SEL8 (0x00U) /* 2^8/fX */ +#define _01_CGC_OSCSTAB_SEL9 (0x01U) /* 2^9/fX */ +#define _02_CGC_OSCSTAB_SEL10 (0x02U) /* 2^10/fX */ +#define _03_CGC_OSCSTAB_SEL11 (0x03U) /* 2^11/fX */ +#define _04_CGC_OSCSTAB_SEL13 (0x04U) /* 2^13/fX */ +#define _05_CGC_OSCSTAB_SEL15 (0x05U) /* 2^15/fX */ +#define _06_CGC_OSCSTAB_SEL17 (0x06U) /* 2^17/fX */ +#define _07_CGC_OSCSTAB_SEL18 (0x07U) /* 2^18/fX */ + +/* + PLL control register (PLLCTL) +*/ +/* Lockup wait counter setting value */ +#define _00_CGC_LOCKUP_WAIT_7 (0x00U) /* 2^7/fMAIN */ +#define _40_CGC_LOCKUP_WAIT_8 (0x40U) /* 2^8/fMAIN */ +#define _80_CGC_LOCKUP_WAIT_9 (0x80U) /* 2^9/fMAIN */ +/* PLL output clock selection (PLLDIV1) */ +#define _00_CGC_PLL_BELOW_32MHZ (0x00U) /* when fMAIN <= 32 MHz */ +#define _20_CGC_PLL_ABOVE_32MHZ (0x20U) /* when fMAIN > 32 MHz */ +/* PLL output clock division selection (PLLDIV0) */ +#define _00_CGC_PLL_DIVISION_2 (0x00U) /* divides the clock frequency by 2 */ +#define _10_CGC_PLL_DIVISION_4 (0x10U) /* divides the clock frequency by 4 */ +/* Clock mode selection (SELPLL) */ +#define _00_CGC_NOSEL_PLL (0x00U) /* clock through mode */ +#define _04_CGC_SEL_PLL (0x04U) /* PLL clock select mode */ +/* PLL output clock (fPLLO) multiplier selection (PLLMUL) */ +#define _00_CGC_PLL_MULTIPLY_X12 (0x00U) /* clock through mode */ +#define _02_CGC_PLL_MULTIPLY_X16 (0x02U) /* PLL clock select mode */ +/* Operating or stopping PLL function (PLLON) */ +#define _00_CGC_PLL_STOP (0x00U) /* PLL operating stopped */ +#define _01_CGC_PLL_ENABLE (0x01U) /* PLL operating */ + +/* + PLL status register (PLLSTS) +*/ +/* PLL lock state */ +#define _00_CGC_PLL_UNLOCKED (0x00U) /* Unlocked state */ +#define _80_CGC_PLL_LOCKED (0x80U) /* Locked state */ + +/* + FMP clock selection division register (MDIV) +*/ +/* Division of PLL clock (fMP) */ +#define _00_CGC_FMP_DIV_DEFAULT (0x00U) /* fMP (default) */ +#define _01_CGC_FMP_DIV_1 (0x01U) /* fMP/2^1 */ +#define _02_CGC_FMP_DIV_2 (0x02U) /* fMP/2^2 */ +#define _03_CGC_FMP_DIV_3 (0x03U) /* fMP/2^3 */ +#define _04_CGC_FMP_DIV_4 (0x04U) /* fMP/2^4 */ +#define _05_CGC_FMP_DIV_5 (0x05U) /* fMP/2^5 */ +#define _06_CGC_FMP_DIV_6 (0x06U) /* fMP/2^6 */ + +/* + System clock control register (CKC) +*/ +/* Status of CPU/peripheral hardware clock fCLK (CLS) */ +#define _00_CGC_CPUCLK_MAIN (0x00U) /* main system clock (fMAIN) */ +#define _80_CGC_CPUCLK_SUB (0x80U) /* subsystem clock (fSUB) */ +/* Selection of CPU/peripheral hardware clock fCLK (CSS) */ +#define _00_CGC_CPUCLK_SELMAIN (0x00U) /* main system clock (fMAIN) */ +#define _40_CGC_CPUCLK_SELSUB (0x40U) /* subsystem clock (fSUB) */ +/* Status of Main system clock fMAIN (MCS) */ +#define _00_CGC_MAINCLK_HIO (0x00U) /* high-speed OCO clock (fIH) */ +#define _20_CGC_MAINCLK_HISYS (0x20U) /* high-speed system clock (fMX) */ +/* Selection of Main system clock fMAIN (MCM0) */ +#define _00_CGC_MAINCLK_SELHIO (0x00U) /* high-speed OCO clock (fIH) */ +#define _10_CGC_MAINCLK_SELHISYS (0x10U) /* high-speed system clock (fMX) */ + +/* + Operation speed mode control register (OSMC) +*/ +/* Setting in subsystem clock HALT mode (RTCLPC) */ +#define _00_CGC_SUBINHALT_ON (0x00U) /* enables supply of subsystem clock to peripheral functions */ +#define _80_CGC_SUBINHALT_OFF (0x80U) /* stops supply to peripheral functions other than RTC and interval timer */ +/* RTC macro operation clock (WUTMMCK0) */ +#define _00_CGC_RTC_CLK_OTHER (0x00U) /* Other than fIL */ +#define _10_CGC_RTC_CLK_FIL (0x10U) /* use fIL clock */ + +/* + Illegal memory access detection control register (IAWCTL) +*/ +/* Illegal memory access detection control (IAWEN) */ +#define _00_CGC_ILLEGAL_ACCESS_OFF (0x00U) /* disables illegal memory access detection */ +#define _80_CGC_ILLEGAL_ACCESS_ON (0x80U) /* enables illegal memory access detection */ +/* RAM guard area (GRAM1, GRAM0) */ +#define _00_CGC_RAM_GUARD_OFF (0x00U) /* invalid, it is possible to write RAM */ +#define _10_CGC_RAM_GUARD_AREA0 (0x10U) /* 128 bytes from RAM bottom address */ +#define _20_CGC_RAM_GUARD_AREA1 (0x20U) /* 256 bytes from RAM bottom address */ +#define _30_CGC_RAM_GUARD_AREA2 (0x30U) /* 512 bytes from RAM bottom address */ +/* PORT register guard (GPORT) */ +#define _00_CGC_PORT_GUARD_OFF (0x00U) /* invalid, it is possible to write PORT register */ +#define _04_CGC_PORT_GUARD_ON (0x04U) /* valid, it is impossible to write PORT register, but possible for read */ +/* Interrupt register guard (GINT) */ +#define _00_CGC_INT_GUARD_OFF (0x00U) /* invalid, it is possible to write interrupt register */ +#define _02_CGC_INT_GUARD_ON (0x02U) /* valid, it is impossible to write , but possible for read */ +/* CSC register guard (GCSC) */ +#define _00_CGC_CSC_GUARD_OFF (0x00U) /* invalid, it is possible to write CSC register */ +#define _01_CGC_CSC_GUARD_ON (0x01U) /* valid, it is impossible to write CSC register, but possible for read */ + +/* + RTC clock selection register (RTCCL) +*/ +/* Operation clock source selection for RTC (RTCCL7) */ +#define _00_CGC_RTC_FMX (0x00U) /* RTC uses External Main clock (fMX) */ +#define _80_CGC_RTC_FIH (0x80U) /* RTC uses Internal high speed clock (fIH) */ +/* Operation selection of RTC macro (RTCCL6,RTCCKS1 - RTCCKS0) */ +#define _00_CGC_RTC_FSUB (0x00U) /* RTC uses sub clock */ +#define _02_CGC_RTC_DIV128 (0x02U) /* RTC uses high-speed clock / 128 */ +#define _03_CGC_RTC_DIV256 (0x03U) /* RTC uses high-speed clock / 256 */ +#define _42_CGC_RTC_DIV122 (0x42U) /* RTC uses high-speed clock / 122 */ +#define _43_CGC_RTC_DIV244 (0x43U) /* RTC uses high-speed clock / 244 */ + + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ +typedef enum +{ + HIOCLK, + SYSX1CLK, + SYSEXTCLK, + SUBXT1CLK, + SUBEXTCLK +} clock_mode_t; + +/*********************************************************************************************************************** +Global functions +***********************************************************************************************************************/ +void R_CGC_Create(void); +void R_CGC_Get_ResetSource(void); + +/* Start user code for function. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#endif diff --git a/r_cg_cgc_user.c b/r_cg_cgc_user.c new file mode 100644 index 0000000..27ccb57 --- /dev/null +++ b/r_cg_cgc_user.c @@ -0,0 +1,64 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_cgc_user.c +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements device driver for CGC module. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_cgc.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: R_CGC_Get_ResetSource +* Description : This function process of Reset. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_CGC_Get_ResetSource(void) +{ + uint8_t reset_flag = RESF; + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/r_cg_macrodriver.h b/r_cg_macrodriver.h new file mode 100644 index 0000000..cf482b3 --- /dev/null +++ b/r_cg_macrodriver.h @@ -0,0 +1,89 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_macrodriver.h +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements general head file. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +#ifndef STATUS_H +#define STATUS_H +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "iodefine.h" + +/*********************************************************************************************************************** +Macro definitions (Register bit) +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ +#ifndef __TYPEDEF__ +#define DI __DI +#define EI __EI +#define HALT __halt +#define NOP __nop +#define STOP __stop +#define BRK __brk + +/* Status list definition */ +#define MD_STATUSBASE 0x00U +#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ +#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ +#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ +#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ +#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ +#define MD_OVERRUN (MD_STATUSBASE + 0x05U) /* IIC OVERRUN occur */ + +/* Error list definition */ +#define MD_ERRORBASE 0x80U +#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ +#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error agrument input error */ +#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ +#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ +#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ +#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ +#define MD_DATAEXISTS (MD_ERRORBASE + 0x06U) /* data to be transferred next exists in TXBn register */ +#endif + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ +#ifndef __TYPEDEF__ +typedef signed char int8_t; +typedef unsigned char uint8_t; +typedef signed short int16_t; +typedef unsigned short uint16_t; +typedef signed long int32_t; +typedef unsigned long uint32_t; +typedef unsigned short MD_STATUS; +#define __TYPEDEF__ +#endif + +/*********************************************************************************************************************** +Global functions +***********************************************************************************************************************/ + +#endif diff --git a/r_cg_serial.c b/r_cg_serial.c new file mode 100644 index 0000000..03a31dc --- /dev/null +++ b/r_cg_serial.c @@ -0,0 +1,530 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_serial.c +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements device driver for Serial module. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_serial.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +volatile uint8_t * gp_uart0_tx_address; /* uart0 transmit buffer address */ +volatile uint16_t g_uart0_tx_count; /* uart0 transmit data number */ +volatile uint8_t * gp_uart0_rx_address; /* uart0 receive buffer address */ +volatile uint16_t g_uart0_rx_count; /* uart0 receive data number */ +volatile uint16_t g_uart0_rx_length; /* uart0 receive data length */ +volatile uint8_t * gp_uart1_tx_address; /* uart1 transmit buffer address */ +volatile uint16_t g_uart1_tx_count; /* uart1 transmit data number */ +volatile uint8_t * gp_uart1_rx_address; /* uart1 receive buffer address */ +volatile uint16_t g_uart1_rx_count; /* uart1 receive data number */ +volatile uint16_t g_uart1_rx_length; /* uart1 receive data length */ +volatile uint8_t g_iica0_master_status_flag; /* iica0 master flag */ +volatile uint8_t g_iica0_slave_status_flag; /* iica0 slave flag */ +volatile uint8_t * gp_iica0_rx_address; /* iica0 receive buffer address */ +volatile uint16_t g_iica0_rx_len; /* iica0 receive data length */ +volatile uint16_t g_iica0_rx_cnt; /* iica0 receive data count */ +volatile uint8_t * gp_iica0_tx_address; /* iica0 send buffer address */ +volatile uint16_t g_iica0_tx_cnt; /* iica0 send data count */ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: R_SAU0_Create +* Description : This function initializes the SAU0 module. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_SAU0_Create(void) +{ + SAU0EN = 1U; /* supply SAU0 clock */ + NOP(); + NOP(); + NOP(); + NOP(); + SPS0 = _0004_SAU_CK00_FCLK_4 | _0040_SAU_CK01_FCLK_4; + R_UART0_Create(); +} + +/*********************************************************************************************************************** +* Function Name: R_UART0_Create +* Description : This function initializes the UART0 module. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_UART0_Create(void) +{ + ST0 |= _0002_SAU_CH1_STOP_TRG_ON | _0001_SAU_CH0_STOP_TRG_ON; /* disable UART0 receive and transmit */ + STMK0 = 1U; /* disable INTST0 interrupt */ + STIF0 = 0U; /* clear INTST0 interrupt flag */ + SRMK0 = 1U; /* disable INTSR0 interrupt */ + SRIF0 = 0U; /* clear INTSR0 interrupt flag */ + /* Set INTST0 low priority */ + STPR10 = 1U; + STPR00 = 1U; + /* Set INTSR0 low priority */ + SRPR10 = 1U; + SRPR00 = 1U; + SMR00 = _0020_SAU_SMRMN_INITIALVALUE | _0000_SAU_CLOCK_SELECT_CK00 | _0000_SAU_TRIGGER_SOFTWARE | + _0002_SAU_MODE_UART | _0000_SAU_TRANSFER_END; + SCR00 = _8000_SAU_TRANSMISSION | _0000_SAU_PARITY_NONE | _0080_SAU_LSB | _0010_SAU_STOP_1 | _0007_SAU_LENGTH_8; + SDR00 = _CE00_UART0_TRANSMIT_DIVISOR; + NFEN0 |= _01_SAU_RXD0_FILTER_ON; + SIR01 = _0004_SAU_SIRMN_FECTMN | _0002_SAU_SIRMN_PECTMN | _0001_SAU_SIRMN_OVCTMN; /* clear error flag */ + SMR01 = _0020_SAU_SMRMN_INITIALVALUE | _0000_SAU_CLOCK_SELECT_CK00 | _0100_SAU_TRIGGER_RXD | _0000_SAU_EDGE_FALL | + _0002_SAU_MODE_UART | _0000_SAU_TRANSFER_END; + SCR01 = _4000_SAU_RECEPTION | _0000_SAU_PARITY_NONE | _0080_SAU_LSB | _0010_SAU_STOP_1 | _0007_SAU_LENGTH_8; + SDR01 = _CE00_UART0_RECEIVE_DIVISOR; + SO0 |= _0001_SAU_CH0_DATA_OUTPUT_1; + SOL0 |= _0000_SAU_CHANNEL0_NORMAL; /* output level normal */ + SOE0 |= _0001_SAU_CH0_OUTPUT_ENABLE; /* enable UART0 output */ + /* Set RxD0 pin */ + PM1 |= 0x40U; + /* Set TxD0 pin */ + P1 |= 0x20U; + PM1 &= 0xDFU; +} + +/*********************************************************************************************************************** +* Function Name: R_UART0_Start +* Description : This function starts the UART0 module operation. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_UART0_Start(void) +{ + SO0 |= _0001_SAU_CH0_DATA_OUTPUT_1; /* output level normal */ + SOE0 |= _0001_SAU_CH0_OUTPUT_ENABLE; /* enable UART0 output */ + SS0 |= _0002_SAU_CH1_START_TRG_ON | _0001_SAU_CH0_START_TRG_ON; /* enable UART0 receive and transmit */ + STIF0 = 0U; /* clear INTST0 interrupt flag */ + SRIF0 = 0U; /* clear INTSR0 interrupt flag */ + STMK0 = 0U; /* enable INTST0 interrupt */ + SRMK0 = 0U; /* enable INTSR0 interrupt */ +} + +/*********************************************************************************************************************** +* Function Name: R_UART0_Stop +* Description : This function stops the UART0 module operation. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_UART0_Stop(void) +{ + STMK0 = 1U; /* disable INTST0 interrupt */ + SRMK0 = 1U; /* disable INTSR0 interrupt */ + ST0 |= _0002_SAU_CH1_STOP_TRG_ON | _0001_SAU_CH0_STOP_TRG_ON; /* disable UART0 receive and transmit */ + SOE0 &= ~_0001_SAU_CH0_OUTPUT_ENABLE; /* disable UART0 output */ + STIF0 = 0U; /* clear INTST0 interrupt flag */ + SRIF0 = 0U; /* clear INTSR0 interrupt flag */ +} + +/*********************************************************************************************************************** +* Function Name: R_UART0_Receive +* Description : This function receives UART0 data. +* Arguments : rx_buf - +* receive buffer pointer +* rx_num - +* buffer size +* Return Value : status - +* MD_OK or MD_ARGERROR +***********************************************************************************************************************/ +MD_STATUS R_UART0_Receive(uint8_t * const rx_buf, uint16_t rx_num) +{ + MD_STATUS status = MD_OK; + + if (rx_num < 1U) + { + status = MD_ARGERROR; + } + else + { + g_uart0_rx_count = 0U; + g_uart0_rx_length = rx_num; + gp_uart0_rx_address = rx_buf; + } + + return (status); +} + +/*********************************************************************************************************************** +* Function Name: R_UART0_Send +* Description : This function sends UART0 data. +* Arguments : tx_buf - +* transfer buffer pointer +* tx_num - +* buffer size +* Return Value : status - +* MD_OK or MD_ARGERROR +***********************************************************************************************************************/ +MD_STATUS R_UART0_Send(uint8_t * const tx_buf, uint16_t tx_num) +{ + MD_STATUS status = MD_OK; + + if (tx_num < 1U) + { + status = MD_ARGERROR; + } + else + { + gp_uart0_tx_address = tx_buf; + g_uart0_tx_count = tx_num; + STMK0 = 1U; /* disable INTST0 interrupt */ + SDR00L = *gp_uart0_tx_address; + gp_uart0_tx_address++; + g_uart0_tx_count--; + STMK0 = 0U; /* enable INTST0 interrupt */ + } + + return (status); +} + +/*********************************************************************************************************************** +* Function Name: R_SAU1_Create +* Description : This function initializes the SAU1 module. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_SAU1_Create(void) +{ + SAU1EN = 1U; /* supply SAU1 clock */ + NOP(); + NOP(); + NOP(); + NOP(); + SPS1 = _0004_SAU_CK00_FCLK_4 | _0040_SAU_CK01_FCLK_4; + R_UART1_Create(); +} + +/*********************************************************************************************************************** +* Function Name: R_UART1_Create +* Description : This function initializes the UART1 module. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_UART1_Create(void) +{ + ST1 |= _0002_SAU_CH1_STOP_TRG_ON | _0001_SAU_CH0_STOP_TRG_ON; /* disable UART1 receive and transmit */ + STMK1 = 1U; /* disable INTST1 interrupt */ + STIF1 = 0U; /* clear INTST1 interrupt flag */ + SRMK1 = 1U; /* disable INTSR1 interrupt */ + SRIF1 = 0U; /* clear INTSR1 interrupt flag */ + /* Set INTST1 low priority */ + STPR11 = 1U; + STPR01 = 1U; + /* Set INTSR1 low priority */ + SRPR11 = 1U; + SRPR01 = 1U; + SMR10 = _0020_SAU_SMRMN_INITIALVALUE | _0000_SAU_CLOCK_SELECT_CK00 | _0000_SAU_TRIGGER_SOFTWARE | + _0002_SAU_MODE_UART | _0000_SAU_TRANSFER_END; + SCR10 = _8000_SAU_TRANSMISSION | _0000_SAU_PARITY_NONE | _0080_SAU_LSB | _0010_SAU_STOP_1 | _0007_SAU_LENGTH_8; + SDR10 = _CE00_UART1_TRANSMIT_DIVISOR; + NFEN0 |= _04_SAU_RXD1_FILTER_ON; + SIR11 = _0004_SAU_SIRMN_FECTMN | _0002_SAU_SIRMN_PECTMN | _0001_SAU_SIRMN_OVCTMN; /* clear error flag */ + SMR11 = _0020_SAU_SMRMN_INITIALVALUE | _0000_SAU_CLOCK_SELECT_CK00 | _0100_SAU_TRIGGER_RXD | _0000_SAU_EDGE_FALL | + _0002_SAU_MODE_UART | _0000_SAU_TRANSFER_END; + SCR11 = _4000_SAU_RECEPTION | _0000_SAU_PARITY_NONE | _0080_SAU_LSB | _0010_SAU_STOP_1 | _0007_SAU_LENGTH_8; + SDR11 = _CE00_UART1_RECEIVE_DIVISOR; + SO1 |= _0001_SAU_CH0_DATA_OUTPUT_1; + SOL1 |= _0000_SAU_CHANNEL0_NORMAL; /* output level normal */ + SOE1 |= _0001_SAU_CH0_OUTPUT_ENABLE; /* enable UART1 output */ + /* Set RxD1 pin */ + PM1 |= 0x02U; + /* Set TxD1 pin */ + P1 |= 0x04U; + PM1 &= 0xFBU; +} + +/*********************************************************************************************************************** +* Function Name: R_UART1_Start +* Description : This function starts the UART1 module operation. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_UART1_Start(void) +{ + SO1 |= _0001_SAU_CH0_DATA_OUTPUT_1; /* output level normal */ + SOE1 |= _0001_SAU_CH0_OUTPUT_ENABLE; /* enable UART1 output */ + SS1 |= _0002_SAU_CH1_START_TRG_ON | _0001_SAU_CH0_START_TRG_ON; /* enable UART1 receive and transmit */ + STIF1 = 0U; /* clear INTST1 interrupt flag */ + SRIF1 = 0U; /* clear INTSR1 interrupt flag */ + STMK1 = 0U; /* enable INTST1 interrupt */ + SRMK1 = 0U; /* enable INTSR1 interrupt */ +} + +/*********************************************************************************************************************** +* Function Name: R_UART1_Stop +* Description : This function stops the UART1 module operation. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_UART1_Stop(void) +{ + STMK1 = 1U; /* disable INTST1 interrupt */ + SRMK1 = 1U; /* disable INTSR1 interrupt */ + ST1 |= _0002_SAU_CH1_STOP_TRG_ON | _0001_SAU_CH0_STOP_TRG_ON; /* disable UART1 receive and transmit */ + SOE1 &= ~_0001_SAU_CH0_OUTPUT_ENABLE; /* disable UART1 output */ + STIF1 = 0U; /* clear INTST1 interrupt flag */ + SRIF1 = 0U; /* clear INTSR1 interrupt flag */ +} + +/*********************************************************************************************************************** +* Function Name: R_UART1_Receive +* Description : This function receives UART1 data. +* Arguments : rx_buf - +* receive buffer pointer +* rx_num - +* buffer size +* Return Value : status - +* MD_OK or MD_ARGERROR +***********************************************************************************************************************/ +MD_STATUS R_UART1_Receive(uint8_t * const rx_buf, uint16_t rx_num) +{ + MD_STATUS status = MD_OK; + + if (rx_num < 1U) + { + status = MD_ARGERROR; + } + else + { + g_uart1_rx_count = 0U; + g_uart1_rx_length = rx_num; + gp_uart1_rx_address = rx_buf; + } + + return (status); +} + +/*********************************************************************************************************************** +* Function Name: R_UART1_Send +* Description : This function sends UART1 data. +* Arguments : tx_buf - +* transfer buffer pointer +* tx_num - +* buffer size +* Return Value : status - +* MD_OK or MD_ARGERROR +***********************************************************************************************************************/ +MD_STATUS R_UART1_Send(uint8_t * const tx_buf, uint16_t tx_num) +{ + MD_STATUS status = MD_OK; + + if (tx_num < 1U) + { + status = MD_ARGERROR; + } + else + { + gp_uart1_tx_address = tx_buf; + g_uart1_tx_count = tx_num; + STMK1 = 1U; /* disable INTST1 interrupt */ + SDR10L = *gp_uart1_tx_address; + gp_uart1_tx_address++; + g_uart1_tx_count--; + STMK1 = 0U; /* enable INTST1 interrupt */ + } + + return (status); +} + +/*********************************************************************************************************************** +* Function Name: R_IICA0_Create +* Description : This function initializes the IICA0 module. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_IICA0_Create(void) +{ + IICA0EN = 1U; /* supply IICA0 clock */ + IICE0 = 0U; /* disable IICA0 operation */ + IICAMK0 = 1U; /* disable INTIICA0 interrupt */ + IICAIF0 = 0U; /* clear INTIICA0 interrupt flag */ + /* Set INTIICA0 low priority */ + IICAPR10 = 1U; + IICAPR00 = 1U; + /* Set SCLA0, SDAA0 pin */ + P6 &= 0xF3U; + PM6 |= 0x0CU; + SMC0 = 0U; + IICWL0 = _4C_IICA0_IICWL_VALUE; + IICWH0 = _55_IICA0_IICWH_VALUE; + IICCTL01 |= _01_IICA_fCLK_HALF; + SVA0 = _10_IICA0_MASTERADDRESS; + STCEN0 = 1U; + IICRSV0 = 1U; + SPIE0 = 0U; + WTIM0 = 1U; + ACKE0 = 1U; + IICAMK0 = 0U; + IICE0 = 1U; + LREL0 = 1U; + /* Set SCLA0, SDAA0 pin */ + PM6 &= 0xF3U; +} + +/*********************************************************************************************************************** +* Function Name: R_IICA0_Stop +* Description : This function stops IICA0 module operation. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_IICA0_Stop(void) +{ + IICE0 = 0U; /* disable IICA0 operation */ +} + +/*********************************************************************************************************************** +* Function Name: R_IICA0_StopCondition +* Description : This function sets IICA0 stop condition flag. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_IICA0_StopCondition(void) +{ + SPT0 = 1U; /* set stop condition flag */ +} + +/*********************************************************************************************************************** +* Function Name: R_IICA0_Master_Send +* Description : This function starts to send data as master mode. +* Arguments : adr - +* send address +* tx_buf - +* transfer buffer pointer +* tx_num - +* buffer size +* wait - +* wait for start condition +* Return Value : status - +* MD_OK or MD_ERROR1 or MD_ERROR2 +***********************************************************************************************************************/ +MD_STATUS R_IICA0_Master_Send(uint8_t adr, uint8_t * const tx_buf, uint16_t tx_num, uint8_t wait) +{ + MD_STATUS status = MD_OK; + + IICAMK0 = 1U; /* disable INTIICA0 interrupt */ + + if ((1U == IICBSY0) && (0U == MSTS0)) + { + /* Check bus busy */ + IICAMK0 = 0U; /* enable INTIICA0 interrupt */ + status = MD_ERROR1; + } + else + { + STT0 = 1U; /* send IICA0 start condition */ + IICAMK0 = 0U; /* enable INTIICA0 interrupt */ + + /* Wait */ + while (wait--) + { + ; + } + + if (0U == STD0) + { + status = MD_ERROR2; + } + + /* Set parameter */ + g_iica0_tx_cnt = tx_num; + gp_iica0_tx_address = tx_buf; + g_iica0_master_status_flag = _00_IICA_MASTER_FLAG_CLEAR; + adr &= (uint8_t)~0x01U; /* set send mode */ + IICA0 = adr; /* send address */ + } + + return (status); +} + +/*********************************************************************************************************************** +* Function Name: R_IICA0_Master_Receive +* Description : This function starts to receive IICA0 data as master mode. +* Arguments : adr - +* receive address +* rx_buf - +* receive buffer pointer +* rx_num - +* buffer size +* wait - +* wait for start condition +* Return Value : status - +* MD_OK or MD_ERROR1 or MD_ERROR2 +***********************************************************************************************************************/ +MD_STATUS R_IICA0_Master_Receive(uint8_t adr, uint8_t * const rx_buf, uint16_t rx_num, uint8_t wait) +{ + MD_STATUS status = MD_OK; + + IICAMK0 = 1U; /* disable INTIIA0 interrupt */ + + if ((1U == IICBSY0) && (0U == MSTS0)) + { + /* Check bus busy */ + IICAMK0 = 0U; /* enable INTIIA0 interrupt */ + status = MD_ERROR1; + } + else + { + STT0 = 1U; /* set IICA0 start condition */ + IICAMK0 = 0U; /* enable INTIIA0 interrupt */ + + /* Wait */ + while (wait--) + { + ; + } + + if (0U == STD0) + { + status = MD_ERROR2; + } + + /* Set parameter */ + g_iica0_rx_len = rx_num; + g_iica0_rx_cnt = 0U; + gp_iica0_rx_address = rx_buf; + g_iica0_master_status_flag = _00_IICA_MASTER_FLAG_CLEAR; + adr |= 0x01U; /* set receive mode */ + IICA0 = adr; /* receive address */ + } + + return (status); +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/r_cg_serial.h b/r_cg_serial.h new file mode 100644 index 0000000..7997456 --- /dev/null +++ b/r_cg_serial.h @@ -0,0 +1,399 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_serial.h +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements device driver for Serial module. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +#ifndef SERIAL_H +#define SERIAL_H + +/*********************************************************************************************************************** +Macro definitions (Register bit) +***********************************************************************************************************************/ +/* + Serial Clock Select Register m (SPSm) +*/ +/* Section of operation clock (CKm0) (PRSm03 - PRSm00) */ +#define _0000_SAU_CK00_FCLK_0 (0x0000U) /* ck00 - fCLK */ +#define _0001_SAU_CK00_FCLK_1 (0x0001U) /* ck00 - fCLK/2^1 */ +#define _0002_SAU_CK00_FCLK_2 (0x0002U) /* ck00 - fCLK/2^2 */ +#define _0003_SAU_CK00_FCLK_3 (0x0003U) /* ck00 - fCLK/2^3 */ +#define _0004_SAU_CK00_FCLK_4 (0x0004U) /* ck00 - fCLK/2^4 */ +#define _0005_SAU_CK00_FCLK_5 (0x0005U) /* ck00 - fCLK/2^5 */ +#define _0006_SAU_CK00_FCLK_6 (0x0006U) /* ck00 - fCLK/2^6 */ +#define _0007_SAU_CK00_FCLK_7 (0x0007U) /* ck00 - fCLK/2^7 */ +#define _0008_SAU_CK00_FCLK_8 (0x0008U) /* ck00 - fCLK/2^8 */ +#define _0009_SAU_CK00_FCLK_9 (0x0009U) /* ck00 - fCLK/2^9 */ +#define _000A_SAU_CK00_FCLK_10 (0x000AU) /* ck00 - fCLK/2^10 */ +#define _000B_SAU_CK00_FCLK_11 (0x000BU) /* ck00 - fCLK/2^11 */ +#define _000C_SAU_CK00_FCLK_12 (0x000CU) /* ck00 - fCLK/2^12 */ +#define _000D_SAU_CK00_FCLK_13 (0x000DU) /* ck00 - fCLK/2^13 */ +#define _000E_SAU_CK00_FCLK_14 (0x000EU) /* ck00 - fCLK/2^14 */ +#define _000F_SAU_CK00_FCLK_15 (0x000FU) /* ck00 - fCLK/2^15 */ +/* Section of operation clock (CKm1) (PRSm13 - PRSm10) */ +#define _0000_SAU_CK01_FCLK_0 (0x0000U) /* ck01 - fCLK */ +#define _0010_SAU_CK01_FCLK_1 (0x0010U) /* ck01 - fCLK/2^1 */ +#define _0020_SAU_CK01_FCLK_2 (0x0020U) /* ck01 - fCLK/2^2 */ +#define _0030_SAU_CK01_FCLK_3 (0x0030U) /* ck01 - fCLK/2^3 */ +#define _0040_SAU_CK01_FCLK_4 (0x0040U) /* ck01 - fCLK/2^4 */ +#define _0050_SAU_CK01_FCLK_5 (0x0050U) /* ck01 - fCLK/2^5 */ +#define _0060_SAU_CK01_FCLK_6 (0x0060U) /* ck01 - fCLK/2^6 */ +#define _0070_SAU_CK01_FCLK_7 (0x0070U) /* ck01 - fCLK/2^7 */ +#define _0080_SAU_CK01_FCLK_8 (0x0080U) /* ck01 - fCLK/2^8 */ +#define _0090_SAU_CK01_FCLK_9 (0x0090U) /* ck01 - fCLK/2^9 */ +#define _00A0_SAU_CK01_FCLK_10 (0x00A0U) /* ck01 - fCLK/2^10 */ +#define _00B0_SAU_CK01_FCLK_11 (0x00B0U) /* ck01 - fCLK/2^11 */ +#define _00C0_SAU_CK01_FCLK_12 (0x00C0U) /* ck01 - fCLK/2^12 */ +#define _00D0_SAU_CK01_FCLK_13 (0x00D0U) /* ck01 - fCLK/2^13 */ +#define _00E0_SAU_CK01_FCLK_14 (0x00E0U) /* ck01 - fCLK/2^14 */ +#define _00F0_SAU_CK01_FCLK_15 (0x00F0U) /* ck01 - fCLK/2^15 */ + +/* + Serial Mode Register mn (SMRmn) +*/ +#define _0020_SAU_SMRMN_INITIALVALUE (0x0020U) +/* Selection of macro clock (MCK) of channel n (CKSmn) */ +#define _0000_SAU_CLOCK_SELECT_CK00 (0x0000U) /* operation clock CK0 set by PRS register */ +#define _8000_SAU_CLOCK_SELECT_CK01 (0x8000U) /* operation clock CK1 set by PRS register */ +/* Selection of transfer clock (TCLK) of channel n (CCSmn) */ +#define _0000_SAU_CLOCK_MODE_CKS (0x0000U) /* divided operation clock MCK specified by CKSmn bit */ +#define _4000_SAU_CLOCK_MODE_TI0N (0x4000U) /* clock input from SCK pin (slave transfer in CSI mode) */ +/* Selection of start trigger source (STSmn) */ +#define _0000_SAU_TRIGGER_SOFTWARE (0x0000U) /* only software trigger is valid */ +#define _0100_SAU_TRIGGER_RXD (0x0100U) /* valid edge of RXD pin */ +/* Controls inversion of level of receive data of channel n in UART mode (SISmn0) */ +#define _0000_SAU_EDGE_FALL (0x0000U) /* falling edge is detected as the start bit */ +#define _0040_SAU_EDGE_RISING (0x0040U) /* rising edge is detected as the start bit */ +/* Setting of operation mode of channel n (MDmn2, MDmn1) */ +#define _0000_SAU_MODE_CSI (0x0000U) /* CSI mode */ +#define _0002_SAU_MODE_UART (0x0002U) /* UART mode */ +#define _0004_SAU_MODE_IIC (0x0004U) /* simplified IIC mode */ +/* Selection of interrupt source of channel n (MDmn0) */ +#define _0000_SAU_TRANSFER_END (0x0000U) /* transfer end interrupt */ +#define _0001_SAU_BUFFER_EMPTY (0x0001U) /* buffer empty interrupt */ + +/* + Serial Communication Operation Setting Register mn (SCRmn) +*/ +/* Setting of operation mode of channel n (TXEmn, RXEmn) */ +#define _0000_SAU_NOT_COMMUNICATION (0x0000U) /* does not start communication */ +#define _4000_SAU_RECEPTION (0x4000U) /* reception only */ +#define _8000_SAU_TRANSMISSION (0x8000U) /* transmission only */ +#define _C000_SAU_RECEPTION_TRANSMISSION (0xC000U) /* reception and transmission */ +/* Selection of data and clock phase in CSI mode (DAPmn, CKPmn) */ +#define _0000_SAU_TIMING_1 (0x0000U) /* type 1 */ +#define _1000_SAU_TIMING_2 (0x1000U) /* type 2 */ +#define _2000_SAU_TIMING_3 (0x2000U) /* type 3 */ +#define _3000_SAU_TIMING_4 (0x3000U) /* type 4 */ +/* Setting of parity bit in UART mode (PTCmn1 - PTCmn0) */ +#define _0000_SAU_PARITY_NONE (0x0000U) /* none parity */ +#define _0100_SAU_PARITY_ZERO (0x0100U) /* zero parity */ +#define _0200_SAU_PARITY_EVEN (0x0200U) /* even parity */ +#define _0300_SAU_PARITY_ODD (0x0300U) /* odd parity */ +/* Selection of data transfer sequence in CSI and UART modes (DIRmn) */ +#define _0000_SAU_MSB (0x0000U) /* MSB */ +#define _0080_SAU_LSB (0x0080U) /* LSB */ +/* Setting of stop bit in UART mode (SLCmn1, SLCmn0) */ +#define _0000_SAU_STOP_NONE (0x0000U) /* none stop bit */ +#define _0010_SAU_STOP_1 (0x0010U) /* 1 stop bit */ +#define _0020_SAU_STOP_2 (0x0020U) /* 2 stop bits */ +/* Setting of data length in CSI and UART modes (DLSmn3 - DLSmn0) (m = 0, 1) */ +#define _0006_SAU_LENGTH_7 (0x0006U) /* 07-bit data length */ +#define _0007_SAU_LENGTH_8 (0x0007U) /* 08-bit data length */ +#define _0008_SAU_LENGTH_9 (0x0008U) /* 09-bit data length */ +#define _0009_SAU_LENGTH_10 (0x0009U) /* 10-bit data length */ +#define _000A_SAU_LENGTH_11 (0x000AU) /* 11-bit data length */ +#define _000B_SAU_LENGTH_12 (0x000BU) /* 12-bit data length */ +#define _000C_SAU_LENGTH_13 (0x000CU) /* 13-bit data length */ +#define _000D_SAU_LENGTH_14 (0x000DU) /* 14-bit data length */ +#define _000E_SAU_LENGTH_15 (0x000EU) /* 15-bit data length */ +#define _000F_SAU_LENGTH_16 (0x000FU) /* 16-bit data length */ + +/* + Serial Output Level Register m (SOLm) +*/ +/* Selects inversion of the level of the transmit data of channel n in UART mode */ +#define _0000_SAU_CHANNEL0_NORMAL (0x0000U) /* normal bit level */ +#define _0001_SAU_CHANNEL0_INVERTED (0x0001U) /* inverted bit level */ + +/* + Noise Filter Enable Register 0 (NFEN0) +*/ +/* Use of noise filter */ +#define _00_SAU_RXD1_FILTER_OFF (0x00U) /* noise filter off */ +#define _04_SAU_RXD1_FILTER_ON (0x04U) /* noise filter on */ +#define _00_SAU_RXD0_FILTER_OFF (0x00U) /* noise filter off */ +#define _01_SAU_RXD0_FILTER_ON (0x01U) /* noise filter on */ + +/* + Format of Serial Status Register mn (SSRmn) +*/ +/* Communication status indication flag of channel n (TSFmn) */ +#define _0040_SAU_UNDER_EXECUTE (0x0040U) /* communication is under execution */ +/* Buffer register status indication flag of channel n (BFFmn) */ +#define _0020_SAU_VALID_STORED (0x0020U) /* valid data is stored in the SDRmn register */ +/* Framing error detection flag of channel n (FEFmn) */ +#define _0004_SAU_FRAM_ERROR (0x0004U) /* a framing error occurs during UART reception */ +/* Parity error detection flag of channel n (PEFmn) */ +#define _0002_SAU_PARITY_ERROR (0x0002U) /* a parity error occurs or ACK is not detected */ +/* Overrun error detection flag of channel n (OVFmn) */ +#define _0001_SAU_OVERRUN_ERROR (0x0001U) /* an overrun error occurs */ + +/* + Serial Channel Start Register m (SSm) +*/ +/* Operation start trigger of channel 0 (SSm0) */ +#define _0000_SAU_CH0_START_TRG_OFF (0x0000U) /* no trigger operation */ +#define _0001_SAU_CH0_START_TRG_ON (0x0001U) /* sets SEm0 to 1 and enters the communication wait status */ +/* Operation start trigger of channel 1 (SSm1) */ +#define _0000_SAU_CH1_START_TRG_OFF (0x0000U) /* no trigger operation */ +#define _0002_SAU_CH1_START_TRG_ON (0x0002U) /* sets SEm1 to 1 and enters the communication wait status */ + +/* + Serial Channel Stop Register m (STm) +*/ +/* Operation stop trigger of channel 0 (STm0) */ +#define _0000_SAU_CH0_STOP_TRG_OFF (0x0000U) /* no trigger operation */ +#define _0001_SAU_CH0_STOP_TRG_ON (0x0001U) /* operation is stopped (stop trigger is generated) */ +/* Operation stop trigger of channel 1 (STm1) */ +#define _0000_SAU_CH1_STOP_TRG_OFF (0x0000U) /* no trigger operation */ +#define _0002_SAU_CH1_STOP_TRG_ON (0x0002U) /* operation is stopped (stop trigger is generated) */ + +/* + Format of Serial Flag Clear Trigger Register mn (SIRmn) +*/ +/* Clear trigger of overrun error flag of channel n (OVCTmn) */ +#define _0001_SAU_SIRMN_OVCTMN (0x0001U) +/* Clear trigger of parity error flag of channel n (PECTmn) */ +#define _0002_SAU_SIRMN_PECTMN (0x0002U) +/* Clear trigger of framing error of channel n (FECTMN) */ +#define _0004_SAU_SIRMN_FECTMN (0x0004U) + +/* + Serial Output Enable Register m (SOEm) +*/ +/* Serial output enable/disable of channel 0 (SOEm0) */ +#define _0001_SAU_CH0_OUTPUT_ENABLE (0x0001U) /* enables output by serial communication operation */ +#define _0000_SAU_CH0_OUTPUT_DISABLE (0x0000U) /* stops output by serial communication operation */ +/* Serial output enable/disable of channel 1 (SOEm1) */ +#define _0002_SAU_CH1_OUTPUT_ENABLE (0x0002U) /* enables output by serial communication operation */ +#define _0000_SAU_CH1_OUTPUT_DISABLE (0x0000U) /* stops output by serial communication operation */ + +/* + Serial Output Register m (SOm) +*/ +/* Serial data output of channel 0 (SOm0) */ +#define _0000_SAU_CH0_DATA_OUTPUT_0 (0x0000U) /* Serial data output value is "0" */ +#define _0001_SAU_CH0_DATA_OUTPUT_1 (0x0001U) /* Serial data output value is "1" */ +/* Serial data output of channel 1 (SOm1) */ +#define _0000_SAU_CH1_DATA_OUTPUT_0 (0x0000U) /* Serial data output value is "0" */ +#define _0002_SAU_CH1_DATA_OUTPUT_1 (0x0002U) /* Serial data output value is "1" */ +/* Serial clock output of channel 0 (CKOm0) */ +#define _0000_SAU_CH0_CLOCK_OUTPUT_0 (0x0000U) /* Serial clock output value is "0" */ +#define _0100_SAU_CH0_CLOCK_OUTPUT_1 (0x0100U) /* Serial clock output value is "1" */ +/* Serial clock output of channel 1 (CKOm1) */ +#define _0000_SAU_CH1_CLOCK_OUTPUT_0 (0x0000U) /* Serial clock output value is "0" */ +#define _0200_SAU_CH1_CLOCK_OUTPUT_1 (0x0200U) /* Serial clock output value is "1" */ + +/* + SAU Standby Control Register m (SSCm) +*/ +/* SAU Standby Wakeup Control Bit (SWC) */ +#define _0000_SAU_CH0_SNOOZE_OFF (0x0000U) /* disable start function from STOP state of chip */ +#define _0001_SAU_CH0_SNOOZE_ON (0x0001U) /* enable start function from STOP state of chip */ + +/* + Serial slave select enable register m (SSEmn) +*/ +/* SAU0 Channel 0 SSI00 input setting in CSI communication and slave mode (SSE00) */ +#define _00_SAU_CH0_SSI00_UNUSED (0x00U) /* disables SSI00 pin input */ +#define _01_SAU_CH0_SSI00_USED (0x01U) /* enables SSI00 pin input */ +/* SAU0 Channel 1 SSI01 input setting in CSI communication and slave mode (SSE01) */ +#define _00_SAU_CH1_SSI01_UNUSED (0x00U) /* disables SSI01 pin input */ +#define _02_SAU_CH1_SSI01_USED (0x02U) /* enables SSI01 pin input */ +/* SAU1 Channel 0 SSI10 input setting in CSI communication and slave mode (SSE10) */ +#define _00_SAU_CH0_SSI10_UNUSED (0x00U) /* disables SSI10 pin input */ +#define _01_SAU_CH0_SSI10_USED (0x01U) /* enables SSI10 pin input */ +/* SAU1 Channel 1 SSI11 input setting in CSI communication and slave mode (SSE11) */ +#define _00_SAU_CH1_SSI11_UNUSED (0x00U) /* disables SSI11 pin input */ +#define _02_SAU_CH1_SSI11_USED (0x02U) /* enables SSI11 pin input */ + +/* SAU used flag */ +#define _00_SAU_IIC_MASTER_FLAG_CLEAR (0x00U) +#define _01_SAU_IIC_SEND_FLAG (0x01U) +#define _02_SAU_IIC_RECEIVE_FLAG (0x02U) +#define _04_SAU_IIC_SENDED_ADDRESS_FLAG (0x04U) + + +/* + IICA Control Register (IICCTLn0) +*/ +/* IIC operation enable (IICEn) */ +#define _00_IICA_OPERATION_DISABLE (0x00U) /* stop operation */ +#define _80_IICA_OPERATION_ENABLE (0x80U) /* enable operation */ +/* Exit from communications (LRELn) */ +#define _00_IICA_COMMUNICATION_NORMAL (0x00U) /* normal operation */ +#define _40_IICA_COMMUNICATION_EXIT (0x40U) /* exit from current communication */ +/* Wait cancellation (WRELn) */ +#define _00_IICA_WAIT_NOTCANCEL (0x00U) /* do not cancel wait */ +#define _20_IICA_WAIT_CANCEL (0x20U) /* cancel wait */ +/* Generation of interrupt when stop condition (SPIEn) */ +#define _00_IICA_STOPINT_DISABLE (0x00U) /* disable */ +#define _10_IICA_STOPINT_ENABLE (0x10U) /* enable */ +/* Wait and interrupt generation (WTIMn) */ +#define _00_IICA_WAITINT_CLK8FALLING (0x00U) /* generated at the eighth clock's falling edge */ +#define _08_IICA_WAITINT_CLK9FALLING (0x08U) /* generated at the ninth clock's falling edge */ +/* Acknowledgement control (ACKEn) */ +#define _00_IICA_ACK_DISABLE (0x00U) /* disable acknowledgement */ +#define _04_IICA_ACK_ENABLE (0x04U) /* enable acknowledgement */ +/* Start condition trigger (STTn) */ +#define _00_IICA_START_NOTGENERATE (0x00U) /* do not generate start condition */ +#define _02_IICA_START_GENERATE (0x02U) /* generate start condition */ +/* Stop condition trigger (SPTn) */ +#define _00_IICA_STOP_NOTGENERATE (0x00U) /* do not generate stop condition */ +#define _01_IICA_STOP_GENERATE (0x01U) /* generate stop condition */ + +/* + IICA Status Register (IICSn) +*/ +/* Master device status (MSTSn) */ +#define _00_IICA_STATUS_NOTMASTER (0x00U) /* slave device status or communication standby status */ +#define _80_IICA_STATUS_MASTER (0x80U) /* master device communication status */ +/* Detection of arbitration loss (ALDn) */ +#define _00_IICA_ARBITRATION_NO (0x00U) /* arbitration win or no arbitration */ +#define _40_IICA_ARBITRATION_LOSS (0x40U) /* arbitration loss */ +/* Detection of extension code reception (EXCn) */ +#define _00_IICA_EXTCODE_NOT (0x00U) /* extension code not received */ +#define _20_IICA_EXTCODE_RECEIVED (0x20U) /* extension code received */ +/* Detection of matching addresses (COIn) */ +#define _00_IICA_ADDRESS_NOTMATCH (0x00U) /* addresses do not match */ +#define _10_IICA_ADDRESS_MATCH (0x10U) /* addresses match */ +/* Detection of transmit/receive status (TRCn) */ +#define _00_IICA_STATUS_RECEIVE (0x00U) /* receive status */ +#define _08_IICA_STATUS_TRANSMIT (0x08U) /* transmit status */ +/* Detection of acknowledge signal (ACKDn) */ +#define _00_IICA_ACK_NOTDETECTED (0x00U) /* ACK signal was not detected */ +#define _04_IICA_ACK_DETECTED (0x04U) /* ACK signal was detected */ +/* Detection of start condition (STDn) */ +#define _00_IICA_START_NOTDETECTED (0x00U) /* start condition not detected */ +#define _02_IICA_START_DETECTED (0x02U) /* start condition detected */ +/* Detection of stop condition (SPDn) */ +#define _00_IICA_STOP_NOTDETECTED (0x00U) /* stop condition not detected */ +#define _01_IICA_STOP_DETECTED (0x01U) /* stop condition detected */ + +/* + IICA Flag Register (IICFn) +*/ +/* STT clear flag (STCFn) */ +#define _00_IICA_STARTFLAG_GENERATE (0x00U) /* generate start condition */ +#define _80_IICA_STARTFLAG_UNSUCCESSFUL (0x80U) /* start condition generation unsuccessful */ +/* IIC bus status flag (IICBSYn) */ +#define _00_IICA_BUS_RELEASE (0x00U) /* bus release status */ +#define _40_IICA_BUS_COMMUNICATION (0x40U) /* bus communication status */ +/* Initial start enable trigger (STCENn) */ +#define _00_IICA_START_WITHSTOP (0x00U) /* generate start upon detecting stop condition */ +#define _02_IICA_START_WITHOUTSTOP (0x02U) /* generate start without detecting stop condition */ +/* Communication reservation function disable bit (IICRSVn) */ +#define _00_IICA_RESERVATION_ENABLE (0x00U) /* enable communication reservation */ +#define _01_IICA_RESERVATION_DISABLE (0x01U) /* disable communication reservation */ + +/* + IICA Control Register 1 (IICCTLn1) +*/ +/* Control of address match wakeup (WUPn) */ +#define _00_IICA_WAKEUP_STOP (0x00U) /* stop address match wakeup function in STOP mode */ +#define _80_IICA_WAKEUP_ENABLE (0x80U) /* enable address match wakeup function in STOP mode */ +/* Detection of SCL0 pin level (CLDn) */ +#define _00_IICA_SCL_LOW (0x00U) /* detect clock line at low level */ +#define _20_IICA_SCL_HIGH (0x20U) /* detect clock line at high level */ +/* Detection of SDA0 pin level (DADn) */ +#define _00_IICA_SDA_LOW (0x00U) /* detect data line at low level */ +#define _10_IICA_SDA_HIGH (0x10U) /* detect data line at high level */ +/* Operation mode switching (SMCn) */ +#define _00_IICA_MODE_STANDARD (0x00U) /* operates in standard mode */ +#define _08_IICA_MODE_HIGHSPEED (0x08U) /* operates in high-speed mode */ +/* Digital filter operation control (DFCn) */ +#define _00_IICA_FILTER_OFF (0x00U) /* digital filter off */ +#define _04_IICA_FILTER_ON (0x04U) /* digital filter on */ +/* Operation of clock dividing frequency permission (PRSn) */ +#define _00_IICA_fCLK (0x00U) /* clock of dividing frequency operation (fCLK) */ +#define _01_IICA_fCLK_HALF (0x01U) /* 2 clock of dividing frequency operation (fCLK/2) */ + +/* IICA used flag */ +#define _80_IICA_ADDRESS_COMPLETE (0x80U) +#define _00_IICA_MASTER_FLAG_CLEAR (0x00U) + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ +#define _CE00_UART0_RECEIVE_DIVISOR (0xCE00U) +#define _CE00_UART0_TRANSMIT_DIVISOR (0xCE00U) +#define _CE00_UART1_RECEIVE_DIVISOR (0xCE00U) +#define _CE00_UART1_TRANSMIT_DIVISOR (0xCE00U) +#define _10_IICA0_MASTERADDRESS (0x10U) +#define _55_IICA0_IICWH_VALUE (0x55U) +#define _4C_IICA0_IICWL_VALUE (0x4CU) + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Global functions +***********************************************************************************************************************/ +void R_SAU0_Create(void); +void R_UART0_Create(void); +void R_UART0_Start(void); +void R_UART0_Stop(void); +MD_STATUS R_UART0_Send(uint8_t * const tx_buf, uint16_t tx_num); +MD_STATUS R_UART0_Receive(uint8_t * const rx_buf, uint16_t rx_num); +static void r_uart0_callback_error(uint8_t err_type); +static void r_uart0_callback_receiveend(void); +static void r_uart0_callback_sendend(void); +static void r_uart0_callback_softwareoverrun(uint16_t rx_data); +void R_SAU1_Create(void); +void R_UART1_Create(void); +void R_UART1_Start(void); +void R_UART1_Stop(void); +MD_STATUS R_UART1_Send(uint8_t * const tx_buf, uint16_t tx_num); +MD_STATUS R_UART1_Receive(uint8_t * const rx_buf, uint16_t rx_num); +static void r_uart1_callback_error(uint8_t err_type); +static void r_uart1_callback_receiveend(void); +static void r_uart1_callback_sendend(void); +static void r_uart1_callback_softwareoverrun(uint16_t rx_data); +void R_IICA0_Create(void); +MD_STATUS R_IICA0_Master_Send(uint8_t adr, uint8_t * const tx_buf, uint16_t tx_num, uint8_t wait); +MD_STATUS R_IICA0_Master_Receive(uint8_t adr, uint8_t * const rx_buf, uint16_t rx_num, uint8_t wait); +void R_IICA0_Stop(void); +void R_IICA0_StopCondition(void); +static void r_iica0_callback_master_sendend(void); +static void r_iica0_callback_master_receiveend(void); +static void r_iica0_callback_master_error(MD_STATUS flag); +static void iica0_masterhandler(void); +static void iica0_slavehandler(void); + +/* Start user code for function. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#endif diff --git a/r_cg_serial_user.c b/r_cg_serial_user.c new file mode 100644 index 0000000..9abaaff --- /dev/null +++ b/r_cg_serial_user.c @@ -0,0 +1,442 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_serial_user.c +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements device driver for Serial module. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_serial.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +#pragma interrupt r_uart0_interrupt_send(vect=INTST0) +#pragma interrupt r_uart0_interrupt_receive(vect=INTSR0) +#pragma interrupt r_uart1_interrupt_send(vect=INTST1) +#pragma interrupt r_uart1_interrupt_receive(vect=INTSR1) +#pragma interrupt r_iica0_interrupt(vect=INTIICA0) +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +extern volatile uint8_t * gp_uart0_tx_address; /* uart0 send buffer address */ +extern volatile uint16_t g_uart0_tx_count; /* uart0 send data number */ +extern volatile uint8_t * gp_uart0_rx_address; /* uart0 receive buffer address */ +extern volatile uint16_t g_uart0_rx_count; /* uart0 receive data number */ +extern volatile uint16_t g_uart0_rx_length; /* uart0 receive data length */ +extern volatile uint8_t * gp_uart1_tx_address; /* uart1 send buffer address */ +extern volatile uint16_t g_uart1_tx_count; /* uart1 send data number */ +extern volatile uint8_t * gp_uart1_rx_address; /* uart1 receive buffer address */ +extern volatile uint16_t g_uart1_rx_count; /* uart1 receive data number */ +extern volatile uint16_t g_uart1_rx_length; /* uart1 receive data length */ +extern volatile uint8_t g_iica0_master_status_flag; /* iica0 master flag */ +extern volatile uint8_t g_iica0_slave_status_flag; /* iica0 slave flag */ +extern volatile uint8_t * gp_iica0_rx_address; /* iica0 receive buffer address */ +extern volatile uint16_t g_iica0_rx_cnt; /* iica0 receive data length */ +extern volatile uint16_t g_iica0_rx_len; /* iica0 receive data count */ +extern volatile uint8_t * gp_iica0_tx_address; /* iica0 send buffer address */ +extern volatile uint16_t g_iica0_tx_cnt; /* iica0 send data count */ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: r_uart0_interrupt_receive +* Description : This function is INTSR0 interrupt service routine. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void __near r_uart0_interrupt_receive(void) +{ + volatile uint8_t rx_data; + volatile uint8_t err_type; + + err_type = (uint8_t)(SSR01 & 0x0007U); + SIR01 = (uint16_t)err_type; + + if (err_type != 0U) + { + r_uart0_callback_error(err_type); + } + + rx_data = SDR01L; + + if (g_uart0_rx_length > g_uart0_rx_count) + { + *gp_uart0_rx_address = rx_data; + gp_uart0_rx_address++; + g_uart0_rx_count++; + + if (g_uart0_rx_length == g_uart0_rx_count) + { + r_uart0_callback_receiveend(); + } + } + else + { + r_uart0_callback_softwareoverrun(rx_data); + } +} + +/*********************************************************************************************************************** +* Function Name: r_uart0_interrupt_send +* Description : This function is INTST0 interrupt service routine. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void __near r_uart0_interrupt_send(void) +{ + if (g_uart0_tx_count > 0U) + { + SDR00L = *gp_uart0_tx_address; + gp_uart0_tx_address++; + g_uart0_tx_count--; + } + else + { + r_uart0_callback_sendend(); + } +} + +/*********************************************************************************************************************** +* Function Name: r_uart0_callback_receiveend +* Description : This function is a callback function when UART0 finishes reception. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void r_uart0_callback_receiveend(void) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_uart0_callback_softwareoverrun +* Description : This function is a callback function when UART0 receives an overflow data. +* Arguments : rx_data - +* receive data +* Return Value : None +***********************************************************************************************************************/ +static void r_uart0_callback_softwareoverrun(uint16_t rx_data) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_uart0_callback_sendend +* Description : This function is a callback function when UART0 finishes transmission. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void r_uart0_callback_sendend(void) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_uart0_callback_error +* Description : This function is a callback function when UART0 reception error occurs. +* Arguments : err_type - +* error type value +* Return Value : None +***********************************************************************************************************************/ +static void r_uart0_callback_error(uint8_t err_type) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_uart1_interrupt_receive +* Description : This function is INTSR1 interrupt service routine. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void __near r_uart1_interrupt_receive(void) +{ + volatile uint8_t rx_data; + volatile uint8_t err_type; + + err_type = (uint8_t)(SSR11 & 0x0007U); + SIR11 = (uint16_t)err_type; + + if (err_type != 0U) + { + r_uart1_callback_error(err_type); + } + + rx_data = SDR11L; + + if (g_uart1_rx_length > g_uart1_rx_count) + { + *gp_uart1_rx_address = rx_data; + gp_uart1_rx_address++; + g_uart1_rx_count++; + + if (g_uart1_rx_length == g_uart1_rx_count) + { + r_uart1_callback_receiveend(); + } + } + else + { + r_uart1_callback_softwareoverrun(rx_data); + } +} + +/*********************************************************************************************************************** +* Function Name: r_uart1_interrupt_send +* Description : This function is INTST1 interrupt service routine. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void __near r_uart1_interrupt_send(void) +{ + if (g_uart1_tx_count > 0U) + { + SDR10L = *gp_uart1_tx_address; + gp_uart1_tx_address++; + g_uart1_tx_count--; + } + else + { + r_uart1_callback_sendend(); + } +} + +/*********************************************************************************************************************** +* Function Name: r_uart1_callback_receiveend +* Description : This function is a callback function when UART1 finishes reception. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void r_uart1_callback_receiveend(void) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_uart1_callback_softwareoverrun +* Description : This function is a callback function when UART1 receives an overflow data. +* Arguments : rx_data - +* receive data +* Return Value : None +***********************************************************************************************************************/ +static void r_uart1_callback_softwareoverrun(uint16_t rx_data) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_uart1_callback_sendend +* Description : This function is a callback function when UART1 finishes transmission. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void r_uart1_callback_sendend(void) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_uart1_callback_error +* Description : This function is a callback function when UART1 reception error occurs. +* Arguments : err_type - +* error type value +* Return Value : None +***********************************************************************************************************************/ +static void r_uart1_callback_error(uint8_t err_type) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_iica0_interrupt +* Description : This function is INTIICA0 interrupt service routine. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void __near r_iica0_interrupt(void) +{ + if ((IICS0 & _80_IICA_STATUS_MASTER) == 0x80U) + { + iica0_masterhandler(); + } +} + +/*********************************************************************************************************************** +* Function Name: iica0_masterhandler +* Description : This function is IICA0 master handler. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void iica0_masterhandler(void) +{ + /* Detection of stop condition handling */ + if ((0U == IICBSY0) && (g_iica0_tx_cnt != 0U)) + { + r_iica0_callback_master_error(MD_SPT); + } + else + { + /* Control for sended address */ + if ((g_iica0_master_status_flag & _80_IICA_ADDRESS_COMPLETE) == 0U) + { + if (1U == ACKD0) + { + g_iica0_master_status_flag |= _80_IICA_ADDRESS_COMPLETE; + + if (1U == TRC0) + { + WTIM0 = 1U; + + if (g_iica0_tx_cnt > 0U) + { + IICA0 = *gp_iica0_tx_address; + gp_iica0_tx_address++; + g_iica0_tx_cnt--; + } + else + { + r_iica0_callback_master_sendend(); + } + } + else + { + ACKE0 = 1U; + WTIM0 = 0U; + WREL0 = 1U; + } + } + else + { + r_iica0_callback_master_error(MD_NACK); + } + } + else + { + /* Master send control */ + if (1U == TRC0) + { + if ((0U == ACKD0) && (g_iica0_tx_cnt != 0U)) + { + r_iica0_callback_master_error(MD_NACK); + } + else + { + if (g_iica0_tx_cnt > 0U) + { + IICA0 = *gp_iica0_tx_address; + gp_iica0_tx_address++; + g_iica0_tx_cnt--; + } + else + { + r_iica0_callback_master_sendend(); + } + } + } + /* Master receive control */ + else + { + if (g_iica0_rx_cnt < g_iica0_rx_len) + { + *gp_iica0_rx_address = IICA0; + gp_iica0_rx_address++; + g_iica0_rx_cnt++; + + if (g_iica0_rx_cnt == g_iica0_rx_len) + { + ACKE0 = 0U; + WTIM0 = 1U; + WREL0 = 1U; + } + else + { + WREL0 = 1U; + } + } + else + { + r_iica0_callback_master_receiveend(); + } + } + } + } +} + +/*********************************************************************************************************************** +* Function Name: r_iica0_callback_master_error +* Description : This function is a callback function when IICA0 master error occurs. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void r_iica0_callback_master_error(MD_STATUS flag) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_iica0_callback_master_receiveend +* Description : This function is a callback function when IICA0 finishes master reception. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void r_iica0_callback_master_receiveend(void) +{ + SPT0 = 1U; + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: r_iica0_callback_master_sendend +* Description : This function is a callback function when IICA0 finishes master transmission. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void r_iica0_callback_master_sendend(void) +{ + SPT0 = 1U; + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/r_cg_userdefine.h b/r_cg_userdefine.h new file mode 100644 index 0000000..b630106 --- /dev/null +++ b/r_cg_userdefine.h @@ -0,0 +1,38 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_userdefine.h +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file includes user definition. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +#ifndef _USER_DEF_H +#define _USER_DEF_H + +/*********************************************************************************************************************** +User definitions +***********************************************************************************************************************/ + +/* Start user code for function. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#endif diff --git a/r_cg_wdt.c b/r_cg_wdt.c new file mode 100644 index 0000000..8bff673 --- /dev/null +++ b/r_cg_wdt.c @@ -0,0 +1,78 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_wdt.c +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements device driver for WDT module. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_wdt.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: R_WDT_Create +* Description : This function initializes the watchdogtimer. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_WDT_Create(void) +{ + WDTIMK = 1U; /* disable INTWDTI interrupt */ + WDTIIF = 0U; /* clear INTWDTI interrupt flag */ + /* Set INTWDTI low priority */ + WDTIPR1 = 1U; + WDTIPR0 = 1U; + WDTIMK = 0U; /* enable INTWDTI interrupt */ +} + +/*********************************************************************************************************************** +* Function Name: R_WDT_Restart +* Description : This function restarts the watchdog timer. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_WDT_Restart(void) +{ + WDTE = 0xACU; /* restart watchdog timer */ +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/r_cg_wdt.h b/r_cg_wdt.h new file mode 100644 index 0000000..8084871 --- /dev/null +++ b/r_cg_wdt.h @@ -0,0 +1,52 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_wdt.h +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements device driver for WDT module. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +#ifndef WDT_H +#define WDT_H + +/*********************************************************************************************************************** +Macro definitions (Register bit) +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Macro definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Typedef definitions +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Global functions +***********************************************************************************************************************/ +void R_WDT_Create(void); +void R_WDT_Restart(void); + +/* Start user code for function. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#endif diff --git a/r_cg_wdt_user.c b/r_cg_wdt_user.c new file mode 100644 index 0000000..aabe7d0 --- /dev/null +++ b/r_cg_wdt_user.c @@ -0,0 +1,64 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_cg_wdt_user.c +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements device driver for WDT module. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_wdt.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +#pragma interrupt r_wdt_interrupt(vect=INTWDTI) +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: r_wdt_interrupt +* Description : This function is INTWDTI interrupt service routine. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +static void __near r_wdt_interrupt(void) +{ + /* Start user code. Do not edit comment generated here */ + /* End user code. Do not edit comment generated here */ +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/r_main.c b/r_main.c new file mode 100644 index 0000000..e17be07 --- /dev/null +++ b/r_main.c @@ -0,0 +1,84 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_main.c +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements main function. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_cgc.h" +#include "r_cg_serial.h" +#include "r_cg_wdt.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +void R_MAIN_UserInit(void); + +/*********************************************************************************************************************** +* Function Name: main +* Description : This function implements main function. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void main(void) +{ + R_MAIN_UserInit(); + /* Start user code. Do not edit comment generated here */ + while (1U) + { + ; + } + /* End user code. Do not edit comment generated here */ +} + +/*********************************************************************************************************************** +* Function Name: R_MAIN_UserInit +* Description : This function adds user code before implementing main function. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_MAIN_UserInit(void) +{ + /* Start user code. Do not edit comment generated here */ + EI(); + /* End user code. Do not edit comment generated here */ +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/r_systeminit.c b/r_systeminit.c new file mode 100644 index 0000000..454d116 --- /dev/null +++ b/r_systeminit.c @@ -0,0 +1,95 @@ +/*********************************************************************************************************************** +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. +* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +* applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED +* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY +* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, +* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR +* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability +* of this software. By using this software, you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* +* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +* File Name : r_systeminit.c +* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] +* Device(s) : R5F10PPJ +* Tool-Chain : CCRL +* Description : This file implements system initializing function. +* Creation Date: 2026-01-12 +***********************************************************************************************************************/ + +/*********************************************************************************************************************** +Includes +***********************************************************************************************************************/ +#include "r_cg_macrodriver.h" +#include "r_cg_cgc.h" +#include "r_cg_serial.h" +#include "r_cg_wdt.h" +/* Start user code for include. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ +#include "r_cg_userdefine.h" + +/*********************************************************************************************************************** +Pragma directive +***********************************************************************************************************************/ +/* Start user code for pragma. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +Global variables and functions +***********************************************************************************************************************/ +/* Start user code for global. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ + +/*********************************************************************************************************************** +* Function Name: R_Systeminit +* Description : This function initializes every macro. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void R_Systeminit(void) +{ + /* Set periperal I/O redirection */ + PIOR0 = 0x00U; + PIOR1 = 0x00U; + PIOR2 = 0x00U; + PIOR3 = 0x00U; + PIOR4 = 0x00U; + PIOR5 = 0x00U; + PIOR6 = 0x00U; + PIOR7 = 0x00U; + PIOR8 = 0x00U; + R_CGC_Get_ResetSource(); + R_CGC_Create(); + R_SAU0_Create(); + R_SAU1_Create(); + R_IICA0_Create(); + R_WDT_Create(); + + /* Set invalid memory access detection control */ + IAWCTL = 0x00U; +} + + +/*********************************************************************************************************************** +* Function Name: hdwinit +* Description : This function initializes hardware setting. +* Arguments : None +* Return Value : None +***********************************************************************************************************************/ +void hdwinit(void) +{ + DI(); + R_Systeminit(); +} + +/* Start user code for adding. Do not edit comment generated here */ +/* End user code. Do not edit comment generated here */ diff --git a/stkinit.asm b/stkinit.asm new file mode 100644 index 0000000..ed79566 --- /dev/null +++ b/stkinit.asm @@ -0,0 +1,77 @@ +;/********************************************************************************************************************** +; * DISCLAIMER +; * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No +; * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all +; * applicable laws, including copyright laws. +; * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +; * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, +; * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM +; * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES +; * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO +; * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +; * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of +; * this software. By using this software, you agree to the additional terms and conditions found by accessing the +; * following link: +; * http://www.renesas.com/disclaimer +; * +; * Copyright (C) 2020 Renesas Electronics Corporation. All rights reserved. +; *********************************************************************************************************************/;--------------------------------------------------------------------- +; _stkinit +; +; void _stkinit(void __near * stackbss); +; +; input: +; stackbss = AX (#LOWW(_stackend)) +; output: +; NONE +;--------------------------------------------------------------------- + +; NOTE : THIS IS A TYPICAL EXAMPLE. + + .PUBLIC _stkinit + +.textf .CSEG TEXTF +_stkinit: + MOVW HL,AX ; stack_end_addr + MOV [SP+3],#0x00 ; [SP+0]-[SP+2] for return address + MOVW AX,SP + SUBW AX,HL ; SUBW AX,#LOWW _@STEND + BNH $LSTINIT3 ; goto end + SHRW AX,5 ; loop count for 32 byte transfer + MOVW BC,AX + CLRW AX +LSTINIT1: + CMPW AX,BC + BZ $LSTINIT2 + MOVW [HL],AX + MOVW [HL+2],AX + MOVW [HL+4],AX + MOVW [HL+6],AX + MOVW [HL+8],AX + MOVW [HL+10],AX + MOVW [HL+12],AX + MOVW [HL+14],AX + MOVW [HL+16],AX + MOVW [HL+18],AX + MOVW [HL+20],AX + MOVW [HL+22],AX + MOVW [HL+24],AX + MOVW [HL+26],AX + MOVW [HL+28],AX + MOVW [HL+30],AX + XCHW AX,HL + ADDW AX,#0x20 + XCHW AX,HL + DECW BC + BR $LSTINIT1 +LSTINIT2: + MOVW AX,SP + CMPW AX,HL + BZ $LSTINIT3 ; goto end + CLRW AX + MOVW [HL],AX + INCW HL + INCW HL + BR $LSTINIT2 +LSTINIT3: + RET