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2 Commits

  1. BIN
      DefaultBuild/cstart.obj
  2. BIN
      DefaultBuild/delay.obj
  3. BIN
      DefaultBuild/dipSwitch.obj
  4. BIN
      DefaultBuild/gatectrl.obj
  5. BIN
      DefaultBuild/i2c.obj
  6. BIN
      DefaultBuild/multical.abs
  7. 2
      DefaultBuild/multical.map
  8. 54
      DefaultBuild/multical.mot
  9. BIN
      DefaultBuild/owi.obj
  10. BIN
      DefaultBuild/r_cg_cgc.obj
  11. BIN
      DefaultBuild/r_cg_cgc_user.obj
  12. BIN
      DefaultBuild/r_cg_port.obj
  13. BIN
      DefaultBuild/r_cg_port_user.obj
  14. BIN
      DefaultBuild/r_cg_serial.obj
  15. BIN
      DefaultBuild/r_cg_serial_user.obj
  16. BIN
      DefaultBuild/r_main.obj
  17. BIN
      DefaultBuild/r_systeminit.obj
  18. BIN
      DefaultBuild/stkinit.obj
  19. BIN
      DefaultBuild/uart.obj
  20. 40
      QualityReport(multical,DefaultBuild).txt
  21. 77
      gatectrl.c
  22. 218
      multical.MSI.mtud

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DefaultBuild/cstart.obj

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DefaultBuild/delay.obj

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DefaultBuild/i2c.obj

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DefaultBuild/multical.abs

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DefaultBuild/multical.map

@ -1,4 +1,4 @@
Renesas Optimizing Linker (W3.07.00 ) 09-Feb-2026 12:22:02 Renesas Optimizing Linker (W3.07.00 ) 19-Feb-2026 14:54:08
*** Options *** *** Options ***

54
DefaultBuild/multical.mot

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DefaultBuild/r_cg_cgc.obj

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DefaultBuild/r_cg_cgc_user.obj

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DefaultBuild/r_cg_port.obj

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DefaultBuild/r_cg_port_user.obj

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DefaultBuild/r_cg_serial.obj

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DefaultBuild/r_cg_serial_user.obj

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DefaultBuild/r_main.obj

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DefaultBuild/r_systeminit.obj

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DefaultBuild/stkinit.obj

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DefaultBuild/uart.obj

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QualityReport(multical,DefaultBuild).txt

@ -1,22 +1,22 @@
QualityReport QualityReport
2026년 2월 9일 월요일 오후 12:23:59 2026년 2월 19일 목요일 오후 2:59:04
------ Start build(multical, DefaultBuild) ------ ------ Start build(multical, DefaultBuild) ------
------ Build ended(Error:0, Warning:0)(multical, DefaultBuild) ------ ------ Build ended(Error:0, Warning:0)(multical, DefaultBuild) ------
--- SHA1 hash value of output files --- --- SHA1 hash value of output files ---
C:\Users\temp\Desktop\new_fw\DefaultBuild\multical.abs: 8170c2063f1fe5917df15deaedaccc67af363ea0 C:\Users\MSI\Desktop\amosense\multicabration_4251_fw\new_fw\DefaultBuild\multical.abs: 735b6f2af28a6160c5338fc97eefe8833ca8808e
C:\Users\temp\Desktop\new_fw\DefaultBuild\multical.mot: 3c42028cd93f8de719bdcf8a03dae4038a857ae6 C:\Users\MSI\Desktop\amosense\multicabration_4251_fw\new_fw\DefaultBuild\multical.mot: 70d861b12cebf3d2940f2245d70e63b96dcb7b1d
--- System Information --- --- System Information ---
*OS Version *OS Version
Microsoft Windows 10 Pro (-, 10.0.19045, WOW64) Microsoft Windows 11 Home (-, 10.0.26200, WOW64)
*Language *Language
한국어(대한민국) 한국어(대한민국)
*.NET Framework Version *.NET Framework Version
Microsoft .NET Framework 4 [.NET 4.8 or later] (533325) Microsoft .NET Framework 4 [.NET 4.8 or later] (533509)
*WebView2 Version *WebView2 Version
144.0.3719.115 144.0.3719.115
@ -29,19 +29,21 @@ C:\Users\temp\Desktop\new_fw\DefaultBuild\multical.mot: 3c42028cd93f8de719bdcf8a
V9.13.00.05 [12 Nov 2024] V9.13.00.05 [12 Nov 2024]
*Assembly Version *Assembly Version
3.12.10.1 3.12.10.1
*Sales Area
Japan
*Product License *Product License
*Execution Place *Execution Place
C:\Program Files (x86)\Renesas Electronics\CS+\CC C:\Program Files (x86)\Renesas Electronics\CS+\CC
*Memory Usage *Memory Usage
*Private Working Set *Private Working Set
333 MB 404 MB
*Number of GDI Objects *Number of GDI Objects
2650 2585
*Number of USER Objects *Number of USER Objects
1618 1389
*Opened Files *Opened Files
24 editors, 24 files, 197 KB 25 editors, 25 files, 208 KB
--- Build Tool Plug-in Information --- --- Build Tool Plug-in Information ---
RH850 Build tool CC-RH Plug-in RH850 Build tool CC-RH Plug-in
@ -146,6 +148,20 @@ Editor plug-in DLL
1.1.0.0 1.1.0.0
*DLL File Name *DLL File Name
SEditor.dll SEditor.dll
Smart Configurator for RH850 Communication Plug-in
*Version
V1.02.10.03 [14 Nov 2024]
*Assembly Version
1.0.0.0
*DLL File Name
SmcCodePartRH850.dll
Smart Configurator for RL78 Communication Plug-in
*Version
V1.00.11.01 [25 Nov 2024]
*Assembly Version
1.0.0.0
*DLL File Name
SmcCodePartRL78.dll
Stack Usage Tracer Stack Usage Tracer
*Version *Version
V1.05.00.02 [30 Jul 2014] V1.05.00.02 [30 Jul 2014]
@ -177,7 +193,7 @@ Device Information Common Interface
DeviceInformation.dll DeviceInformation.dll
--- Main Project Information --- --- Main Project Information ---
C:\Users\temp\Desktop\new_fw\multical.mtpj C:\Users\MSI\Desktop\amosense\multicabration_4251_fw\new_fw\multical.mtpj
Microcontroller Information Microcontroller Information
*R5F10PPJ *R5F10PPJ
*File Name: Version *File Name: Version
@ -218,6 +234,10 @@ Other Tool Information
*Version *Version
V4.13.00.03 [24 May 2023] V4.13.00.03 [24 May 2023]
*None
*None
*Code Generator *Code Generator
Other Information Other Information
*RL78/F14 Code Library *RL78/F14 Code Library

77
gatectrl.c

@ -72,65 +72,66 @@ void Gate_SetByNum(uint8_t ch, uint8_t hash_on, uint8_t anaout_on, uint8_t check
PORT_BIT_SETCLR(P10, 0x10, check_on); // P10.4 PORT_BIT_SETCLR(P10, 0x10, check_on); // P10.4
break; break;
case 11: /* P10.3, P5.2, P10.5 */ case 11: /* P9.2, P13.0, P1.4 */
PORT_BIT_SETCLR(P10, 0x08, hash_on); // P10.3 PORT_BIT_SETCLR(P9, 0x04, hash_on); // P9.2
PORT_BIT_SETCLR(P5, 0x04, anaout_on); // P5.2 PORT_BIT_SETCLR(P13, 0x01, anaout_on); // P13.0
PORT_BIT_SETCLR(P10, 0x20, check_on); // P10.5 PORT_BIT_SETCLR(P1, 0x10, check_on); // P1.4
break; break;
case 12: /* P10.2, P6.0, P10.6 */ case 12: /* P9.3, P7.7, P1.3 */
PORT_BIT_SETCLR(P10, 0x04, hash_on); // P10.2 PORT_BIT_SETCLR(P9, 0x08, hash_on); // P9.3
PORT_BIT_SETCLR(P6, 0x01, anaout_on); // P6.0 PORT_BIT_SETCLR(P7, 0x80, anaout_on); // P7.7
PORT_BIT_SETCLR(P10, 0x40, check_on); // P10.6 PORT_BIT_SETCLR(P1, 0x08, check_on); // P1.3
break; break;
case 13: /* P10.1, P6.1, P10.7 */ case 13: /* P9.4, P7.6, P1.0 */
PORT_BIT_SETCLR(P10, 0x02, hash_on); // P10.1 PORT_BIT_SETCLR(P9, 0x10, hash_on); // P9.4
PORT_BIT_SETCLR(P6, 0x02, anaout_on); // P6.1 PORT_BIT_SETCLR(P7, 0x40, anaout_on); // P7.6
PORT_BIT_SETCLR(P10, 0x80, check_on); // P10.7 PORT_BIT_SETCLR(P1, 0x01, check_on); // P1.0
break; break;
case 14: /* P10.0, P7.2, P5.7 */ case 14: /* P9.5, P7.4, P5.4 */
PORT_BIT_SETCLR(P10, 0x01, hash_on); // P10.0 PORT_BIT_SETCLR(P9, 0x20, hash_on); // P9.5
PORT_BIT_SETCLR(P7, 0x04, anaout_on); // P7.2 PORT_BIT_SETCLR(P7, 0x10, anaout_on); // P7.4
PORT_BIT_SETCLR(P5, 0x80, check_on); // P5.7 PORT_BIT_SETCLR(P5, 0x10, check_on); // P5.4
break;
case 15: /* P9.6, P7.5, P5.5 */
PORT_BIT_SETCLR(P9, 0x40, hash_on); // P9.6
PORT_BIT_SETCLR(P7, 0x20, anaout_on); // P7.5
PORT_BIT_SETCLR(P5, 0x20, check_on); // P5.5
break; break;
case 15: /* P9.7, P7.3, P5.6 */ case 16: /* P9.7, P7.3, P5.6 */
PORT_BIT_SETCLR(P9, 0x80, hash_on); // P9.7 PORT_BIT_SETCLR(P9, 0x80, hash_on); // P9.7
PORT_BIT_SETCLR(P7, 0x08, anaout_on); // P7.3 PORT_BIT_SETCLR(P7, 0x08, anaout_on); // P7.3
PORT_BIT_SETCLR(P5, 0x40, check_on); // P5.6 PORT_BIT_SETCLR(P5, 0x40, check_on); // P5.6
break; break;
case 16: /* P9.6, P7.5, P5.5 */ case 17: /* P10.0, P7.2, P5.7 */
PORT_BIT_SETCLR(P9, 0x40, hash_on); // P9.6 PORT_BIT_SETCLR(P10, 0x01, hash_on); // P10.0
PORT_BIT_SETCLR(P7, 0x20, anaout_on); // P7.5 PORT_BIT_SETCLR(P7, 0x04, anaout_on); // P7.2
PORT_BIT_SETCLR(P5, 0x20, check_on); // P5.5 PORT_BIT_SETCLR(P5, 0x80, check_on); // P5.7
break; break;
case 17: /* P9.5, P7.4, P5.4 */ case 18: /* P10.1, P6.1, P10.7 */
PORT_BIT_SETCLR(P9, 0x20, hash_on); // P9.5 PORT_BIT_SETCLR(P10, 0x02, hash_on); // P10.1
PORT_BIT_SETCLR(P7, 0x10, anaout_on); // P7.4 PORT_BIT_SETCLR(P6, 0x02, anaout_on); // P6.1
PORT_BIT_SETCLR(P5, 0x10, check_on); // P5.4 PORT_BIT_SETCLR(P10, 0x80, check_on); // P10.7
break; break;
case 18: /* P9.4, P7.6, P1.0 */ case 19: /* P10.2, P6.0, P10.6 */
PORT_BIT_SETCLR(P9, 0x10, hash_on); // P9.4 PORT_BIT_SETCLR(P10, 0x04, hash_on); // P10.2
PORT_BIT_SETCLR(P7, 0x40, anaout_on); // P7.6 PORT_BIT_SETCLR(P6, 0x01, anaout_on); // P6.0
PORT_BIT_SETCLR(P1, 0x01, check_on); // P1.0 PORT_BIT_SETCLR(P10, 0x40, check_on); // P10.6
break; break;
case 19: /* P9.3, P7.7, P1.3 */ case 20: /* P10.3, P5.2, P10.5 */
PORT_BIT_SETCLR(P9, 0x08, hash_on); // P9.3 PORT_BIT_SETCLR(P10, 0x08, hash_on); // P10.3
PORT_BIT_SETCLR(P7, 0x80, anaout_on); // P7.7 PORT_BIT_SETCLR(P5, 0x04, anaout_on); // P5.2
PORT_BIT_SETCLR(P1, 0x08, check_on); // P1.3 PORT_BIT_SETCLR(P10, 0x20, check_on); // P10.5
break; break;
case 20: /* P9.2, P13.0, P1.4 */
PORT_BIT_SETCLR(P9, 0x04, hash_on); // P9.2
PORT_BIT_SETCLR(P13, 0x01, anaout_on); // P13.0
PORT_BIT_SETCLR(P1, 0x10, check_on); // P1.4
break;
default: default:
break; break;

218
multical.MSI.mtud

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