gudae
3 weeks ago
commit
739ae7d4dc
36 changed files with 11841 additions and 0 deletions
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-Input=DefaultBuild\cstart.obj |
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-Input=DefaultBuild\stkinit.obj |
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-Input=DefaultBuild\r_main.obj |
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-Input=DefaultBuild\r_systeminit.obj |
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-Input=DefaultBuild\r_cg_cgc.obj |
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-Input=DefaultBuild\r_cg_cgc_user.obj |
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-Input=DefaultBuild\r_cg_serial.obj |
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-Input=DefaultBuild\r_cg_serial_user.obj |
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-Input=DefaultBuild\r_cg_wdt.obj |
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-Input=DefaultBuild\r_cg_wdt_user.obj |
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-SECURITY_ID=00000000000000000000 |
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-DEVICE=C:\Program Files (x86)\Renesas Electronics\CS+\CC\Device\RL78\Devicefile\DR5F10PPJ.DVF |
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-DEBug |
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-NOCOmpress |
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-NOOPtimize |
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-OUtput=DefaultBuild\multical.abs |
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-OCDBG=04 |
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-USER_OPT_BYTE=FFFFF8 |
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-LISt=DefaultBuild\multical.map |
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-SHow=SYmbol,Total_size |
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-AUTO_SECTION_LAYOUT |
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-ROm=.data=.dataR |
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-ROm=.sdata=.sdataR |
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-NOMessage |
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-MEMory=High |
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-NOLOgo |
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-LIBrary=DefaultBuild\multical.lib |
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-end |
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-Input=DefaultBuild\multical.abs |
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-DEVICE=C:\Program Files (x86)\Renesas Electronics\CS+\CC\Device\RL78\Devicefile\DR5F10PPJ.DVF |
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-OUtput=DefaultBuild\multical.mot |
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-FOrm=Stype |
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-NOMessage |
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-exit |
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Renesas Optimizing Linker (W3.07.00 ) 12-Jan-2026 09:55:02 |
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*** Options *** |
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-subcommand=DefaultBuild\multical.clnk |
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-Input=DefaultBuild\cstart.obj |
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-Input=DefaultBuild\stkinit.obj |
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-Input=DefaultBuild\r_main.obj |
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-Input=DefaultBuild\r_systeminit.obj |
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-Input=DefaultBuild\r_cg_cgc.obj |
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-Input=DefaultBuild\r_cg_cgc_user.obj |
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-Input=DefaultBuild\r_cg_serial.obj |
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-Input=DefaultBuild\r_cg_serial_user.obj |
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-Input=DefaultBuild\r_cg_wdt.obj |
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-Input=DefaultBuild\r_cg_wdt_user.obj |
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-SECURITY_ID=00000000000000000000 |
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-DEVICE=C:\Program Files (x86)\Renesas Electronics\CS+\CC\Device\RL78\Devicefile\DR5F10PPJ.DVF |
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-DEBug |
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-NOCOmpress |
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-NOOPtimize |
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-OUtput=DefaultBuild\multical.abs |
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-OCDBG=04 |
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-USER_OPT_BYTE=FFFFF8 |
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-LISt=DefaultBuild\multical.map |
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-SHow=SYmbol,Total_size |
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-AUTO_SECTION_LAYOUT |
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-ROm=.data=.dataR |
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-ROm=.sdata=.sdataR |
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-NOMessage |
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-MEMory=High |
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-NOLOgo |
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-LIBrary=DefaultBuild\multical.lib |
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-end |
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*** Error information *** |
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*** Mapping List *** |
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SECTION START END SIZE ALIGN |
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.vect |
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00000000 0000007f 80 0 |
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.constf |
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00000080 00000080 0 2 |
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.init_array |
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00000080 00000080 0 2 |
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.data |
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00000080 00000080 0 2 |
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.sdata |
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00000080 00000080 0 2 |
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.option_byte |
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000000c0 000000c3 4 1 |
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.security_id |
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000000c4 000000cd a 1 |
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.RLIB |
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000000c4 000000c4 0 1 |
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.SLIB |
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000000c4 000000c4 0 1 |
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.text |
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000000ce 00000280 1b3 1 |
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.textf |
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00000281 000006db 45b 1 |
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.const |
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00003000 00003000 0 2 |
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.bss |
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000faf00 000faf1f 20 2 |
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.dataR |
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000faf20 000faf20 0 2 |
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.sbss |
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000ffe20 000ffe20 0 2 |
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.sdataR |
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000ffe20 000ffe20 0 2 |
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*** Total Section Size *** |
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RAMDATA SECTION: 00000020 Byte(s) |
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ROMDATA SECTION: 0000008e Byte(s) |
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PROGRAM SECTION: 0000060e Byte(s) |
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*** Symbol List *** |
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SECTION= |
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FILE= START END SIZE |
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SYMBOL ADDR SIZE INFO COUNTS OPT |
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SECTION=.vect |
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FILE=rlink_generates_03 |
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00000000 0000007f 80 |
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SECTION=.option_byte |
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FILE=rlink_generates_01 |
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000000c0 000000c3 4 |
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SECTION=.security_id |
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FILE=rlink_generates_02 |
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000000c4 000000cd a |
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SECTION=.text |
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FILE=DefaultBuild\cstart.obj |
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000000ce 00000140 73 |
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_start |
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000000ce 0 none ,g * |
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_exit |
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0000013e 0 none ,g * |
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_atexit |
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00000140 0 none ,g * |
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FILE=DefaultBuild\r_cg_serial_user.obj |
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00000141 0000027e 13e |
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_r_uart0_interrupt_receive@1 |
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00000141 5f func ,l * |
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_r_uart0_interrupt_send@1 |
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000001a0 2f func ,l * |
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_r_uart1_interrupt_receive@1 |
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000001cf 5f func ,l * |
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_r_uart1_interrupt_send@1 |
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0000022e 2f func ,l * |
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_r_iica0_interrupt@1 |
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0000025d 22 func ,l * |
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FILE=DefaultBuild\r_cg_wdt_user.obj |
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0000027f 00000280 2 |
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_r_wdt_interrupt@1 |
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0000027f 2 func ,l * |
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SECTION=.textf |
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FILE=DefaultBuild\stkinit.obj |
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00000281 000002c4 44 |
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_stkinit |
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00000281 0 none ,g * |
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LSTINIT1 |
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0000028f 0 none ,l * |
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LSTINIT2 |
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000002b9 0 none ,l * |
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LSTINIT3 |
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000002c4 0 none ,l * |
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FILE=DefaultBuild\r_main.obj |
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000002c5 000002cd 9 |
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_main |
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000002c5 5 func ,g * |
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_R_MAIN_UserInit |
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000002ca 4 func ,g * |
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FILE=DefaultBuild\r_systeminit.obj |
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000002ce 0000030e 41 |
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_R_Systeminit |
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000002ce 3a func ,g * |
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_hdwinit |
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00000308 7 func ,g * |
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FILE=DefaultBuild\r_cg_cgc.obj |
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0000030f 00000338 2a |
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_R_CGC_Create |
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0000030f 2a func ,g * |
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FILE=DefaultBuild\r_cg_cgc_user.obj |
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00000339 0000033b 3 |
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_R_CGC_Get_ResetSource |
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00000339 3 func ,g * |
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FILE=DefaultBuild\r_cg_serial.obj |
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0000033c 00000623 2e8 |
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_R_SAU0_Create |
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0000033c 12 func ,g * |
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_R_UART0_Create |
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0000034e 6e func ,g * |
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_R_UART0_Start |
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000003bc 26 func ,g * |
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_R_UART0_Stop |
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000003e2 1e func ,g * |
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_R_UART0_Receive |
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00000400 18 func ,g * |
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_R_UART0_Send |
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00000418 26 func ,g * |
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_R_SAU1_Create |
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0000043e 12 func ,g * |
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_R_UART1_Create |
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00000450 6e func ,g * |
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_R_UART1_Start |
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000004be 26 func ,g * |
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_R_UART1_Stop |
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000004e4 1e func ,g * |
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_R_UART1_Receive |
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00000502 18 func ,g * |
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_R_UART1_Send |
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0000051a 26 func ,g * |
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_R_IICA0_Create |
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00000540 50 func ,g * |
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_R_IICA0_Stop |
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00000590 5 func ,g * |
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_R_IICA0_StopCondition |
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00000595 5 func ,g * |
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_R_IICA0_Master_Send |
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0000059a 43 func ,g * |
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_R_IICA0_Master_Receive |
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000005dd 47 func ,g * |
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FILE=DefaultBuild\r_cg_serial_user.obj |
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00000624 000006c7 a4 |
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_r_uart0_callback_receiveend@1 |
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00000624 1 func ,l * |
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_r_uart0_callback_softwareoverrun@1 |
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00000625 1 func ,l * |
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_r_uart0_callback_sendend@1 |
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00000626 1 func ,l * |
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_r_uart0_callback_error@1 |
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00000627 1 func ,l * |
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_r_uart1_callback_receiveend@1 |
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00000628 1 func ,l * |
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_r_uart1_callback_softwareoverrun@1 |
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00000629 1 func ,l * |
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_r_uart1_callback_sendend@1 |
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0000062a 1 func ,l * |
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_r_uart1_callback_error@1 |
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0000062b 1 func ,l * |
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_iica0_masterhandler@1 |
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0000062c 91 func ,l * |
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_r_iica0_callback_master_error@1 |
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000006bd 1 func ,l * |
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_r_iica0_callback_master_receiveend@1 |
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000006be 5 func ,l * |
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_r_iica0_callback_master_sendend@1 |
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000006c3 5 func ,l * |
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FILE=DefaultBuild\r_cg_wdt.obj |
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000006c8 000006db 14 |
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_R_WDT_Create |
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000006c8 10 func ,g * |
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_R_WDT_Restart |
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000006d8 4 func ,g * |
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SECTION=.bss |
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FILE=DefaultBuild\r_cg_serial.obj |
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000faf00 000faf1f 20 |
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_gp_uart0_tx_address |
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000faf00 2 data ,g * |
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_g_uart0_tx_count |
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000faf02 2 data ,g * |
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_gp_uart0_rx_address |
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000faf04 2 data ,g * |
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_g_uart0_rx_count |
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000faf06 2 data ,g * |
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_g_uart0_rx_length |
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000faf08 2 data ,g * |
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_gp_uart1_tx_address |
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000faf0a 2 data ,g * |
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_g_uart1_tx_count |
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000faf0c 2 data ,g * |
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_gp_uart1_rx_address |
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000faf0e 2 data ,g * |
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_g_uart1_rx_count |
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000faf10 2 data ,g * |
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_g_uart1_rx_length |
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000faf12 2 data ,g * |
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_g_iica0_master_status_flag |
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000faf14 1 data ,g * |
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_g_iica0_slave_status_flag |
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000faf15 1 data ,g * |
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_gp_iica0_rx_address |
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000faf16 2 data ,g * |
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_g_iica0_rx_len |
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000faf18 2 data ,g * |
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_g_iica0_rx_cnt |
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000faf1a 2 data ,g * |
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_gp_iica0_tx_address |
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000faf1c 2 data ,g * |
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_g_iica0_tx_cnt |
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000faf1e 2 data ,g * |
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Absolute value symbols |
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FILE=rlink_generates_04 |
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__s.text |
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AREA START END |
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SYMBOL SIZE INFO |
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S11302F10F0300FC3C0300FC3E0400FC400500FC31 |
||||
|
S1130301C80600F57800D7717BFAFEC0FFD736C462 |
||||
|
S1130311027182CEA000717AA1714BA4CC03017148 |
||||
|
S113032128C502716AA1716BA4710BA1CC04808CE4 |
||||
|
S1130331046C429C0471A3D78EA8D77120F00000ED |
||||
|
S1130341000000304400BF1601FE0100D7347000E4 |
||||
|
S1130351AAA4086C0308BAA4711AE5711BE1712AF5 |
||||
|
S1130361E5712BE1711AED711AE9712AED712AE92E |
||||
|
S1130371302200BA98309780BA9CC91000CE897196 |
||||
|
S11303818A99300700BA96302201BA9A309740BA56 |
||||
|
S11303919EC91200CEAAA8086C0108BAA8AAB0BACC |
||||
|
S11303A1B0AAAA086C0108BAAA51406F21FF9E2184 |
||||
|
S11303B16A012051DF5F21FF9E21D7341201AA0671 |
||||
|
S11303C1086C0108BA06AA08086C0108BA08A90849 |
||||
|
S11303D16C0308B9711BE1712BE1711BE5712BE50C |
||||
|
S11303E1D7711AE5712AE5341401A9086C0308B917 |
||||
|
S11303F1AA06085CFE08BA06711BE1712BE1D71449 |
||||
|
S1130401136168DD0EF6BF06AF13BF08AF15BF0455 |
||||
|
S1130411AFF6D7308100D714136168DD1C15BF0016 |
||||
|
S1130421AF13BF02AF711AE5EB00AF899D10A200B3 |
||||
|
S1130431AFB202AF711BE5F6D7308100D77130F04E |
||||
|
S11304410000000000304400BF5601FE0100D73413 |
||||
|
S11304517000AAE4086C0308BAE4715AE7715BE31B |
||||
|
S1130461716AE7716BE3715AEF715AEB716AEF715B |
||||
|
S11304716AEB302200BAD8309780BADCCB4800CE80 |
||||
|
S11304818971AA99300700BAD6302201BADA3097B5 |
||||
|
S113049140BADECB4A00CEAAE8086C0108BAE8AA41 |
||||
|
S11304A1F0BAF0AAEA086C0108BAEA51026F21FF16 |
||||
|
S11304B19E216A010451FB5F21FF9E21D734520121 |
||||
|
S11304C1AA06086C0108BA06AA08086C0108BA0849 |
||||
|
S11304D1A9086C0308B9715BE3716BE3715BE771A4 |
||||
|
S11304E16BE7D7715AE7716AE7345401A9086C03C1 |
||||
|
S11304F108B9AA06085CFE08BA06715BE3716BE3EE |
||||
|
S1130501D714136168DD0EF6BF10AF13BF12AF1518 |
||||
|
S1130511BF0EAFF6D7308100D714136168DD1C1507 |
||||
|
S1130521BF0AAF13BF0CAF715AE7EB0AAF899E48FC |
||||
|
S1130531A20AAFB20CAF715BE7F6D7308100D77175 |
||||
|
S113054140F00036300271F3712AE6712BE2712A10 |
||||
|
S1130551EE712AEA5A06F3510C6F26FF9E26713872 |
||||
|
S11305613102343002CA024CCA03558A01718A9A93 |
||||
|
S113057101CA0410711A52710A5271C371B271A283 |
||||
|
S1130581712BE671F271E251F35F26FF9E26D7715A |
||||
|
S1130591783002D771003002D7C79800C3C6712AD8 |
||||
|
S11305A1E631E4520C31F25108712BE6308200C27B |
||||
|
S11305B1D771103002712BE66091D070DFFA31945B |
||||
|
S11305C15103F7EF0332830015BF1EAF17BF1CAFF2 |
||||
|
S11305D1F514AF8800718B9E5013C2D7C79800C31E |
||||
|
S11305E1C6712AE631E4520C31F25108712BE6301E |
||||
|
S11305F18200C2D771103002712BE66091D070DF96 |
||||
|
S1130601FA31945103F7EF0332830015BF18AFF6A3 |
||||
|
S1130611BF1AAF17BF16AFF514AF8800718A9E5089 |
||||
|
S113062113C2D7D7D7D7D7D7D7D7D731E2520CAF41 |
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|
S11306311EAF6168DD05E6FE8200D78F14AF318EEF |
||||
|
S1130641319DDC2931A4513451806F14AF9F14AF13 |
||||
|
S113065131B4510F71303002AF1EAF6168DF22FE39 |
||||
|
S11306616000D736300271A271B371D2D731B4515F |
||||
|
S11306711D31A251E3AF1EAF6168DDDC300200EF32 |
||||
|
S1130681B6EB1CAF899E50A21CAFB21EAFD7AF1AF6 |
||||
|
S1130691AF4218AFDE22EB16AF8E5099A216AFA26D |
||||
|
S11306A11AAFAF1AAF4218AFDF0936300271A37126 |
||||
|
S11306B1B2EFB771503002D7FE0200D7D7710030C4 |
||||
|
S11306C102D771003002D7710AE4710BE0710AECB0 |
||||
|
S10E06D1710AE8710BE4D7CEABACD784 |
||||
|
S9030000FC |
||||
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@ -0,0 +1,314 @@ |
|||||
|
;/********************************************************************************************************************** |
||||
|
; * DISCLAIMER |
||||
|
; * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No |
||||
|
; * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
; * applicable laws, including copyright laws. |
||||
|
; * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
||||
|
; * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, |
||||
|
; * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM |
||||
|
; * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES |
||||
|
; * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO |
||||
|
; * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
; * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of |
||||
|
; * this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
; * following link: |
||||
|
; * http://www.renesas.com/disclaimer |
||||
|
; * |
||||
|
; * Copyright (C) 2020-2022 Renesas Electronics Corporation. All rights reserved. |
||||
|
; *********************************************************************************************************************/ |
||||
|
; NOTE : THIS IS A TYPICAL EXAMPLE. |
||||
|
|
||||
|
$IFNDEF __RENESAS_VERSION__ |
||||
|
__RENESAS_VERSION__ .EQU 0x01000000 |
||||
|
$ENDIF |
||||
|
|
||||
|
.public _start |
||||
|
.public _exit |
||||
|
.public _atexit |
||||
|
|
||||
|
;----------------------------------------------------------------------------- |
||||
|
; RAM section |
||||
|
;----------------------------------------------------------------------------- |
||||
|
.SECTION .dataR, DATA |
||||
|
.SECTION .sdataR, DATA |
||||
|
; .SECTION .datafR, DATAF |
||||
|
; .SECTION .textfR, TEXTF |
||||
|
|
||||
|
$IF (__RENESAS_VERSION__ < 0x01010000) ; for CC-RL V1.00 |
||||
|
;----------------------------------------------------------------------------- |
||||
|
; stack area |
||||
|
;----------------------------------------------------------------------------- |
||||
|
; !!! [CAUTION] !!! |
||||
|
; Set up stack size suitable for a project. |
||||
|
.SECTION .stack_bss, BSS |
||||
|
_stackend: |
||||
|
.DS 0x200 |
||||
|
_stacktop: |
||||
|
$ENDIF |
||||
|
|
||||
|
;----------------------------------------------------------------------------- |
||||
|
; RESET vector |
||||
|
;----------------------------------------------------------------------------- |
||||
|
_start .VECTOR 0 |
||||
|
|
||||
|
;----------------------------------------------------------------------------- |
||||
|
; startup |
||||
|
;----------------------------------------------------------------------------- |
||||
|
.SECTION .text, TEXT |
||||
|
_start: |
||||
|
;-------------------------------------------------- |
||||
|
; setting register bank |
||||
|
;-------------------------------------------------- |
||||
|
; SEL RB0 |
||||
|
|
||||
|
;-------------------------------------------------- |
||||
|
; setting mirror area |
||||
|
;-------------------------------------------------- |
||||
|
; ONEB !PMC ; mirror area = 10000-1FFFFH |
||||
|
|
||||
|
;-------------------------------------------------- |
||||
|
; setting the stack pointer |
||||
|
;-------------------------------------------------- |
||||
|
$IF (__RENESAS_VERSION__ >= 0x01010000) |
||||
|
MOVW SP,#LOWW(__STACK_ADDR_START) |
||||
|
$ELSE ; for CC-RL V1.00 |
||||
|
MOVW SP,#LOWW(_stacktop) |
||||
|
$ENDIF |
||||
|
|
||||
|
;-------------------------------------------------- |
||||
|
; initializing stack area |
||||
|
;-------------------------------------------------- |
||||
|
$IF (__RENESAS_VERSION__ >= 0x01010000) |
||||
|
MOVW AX,#LOWW(__STACK_ADDR_END) |
||||
|
$ELSE ; for CC-RL V1.00 |
||||
|
MOVW AX,#LOWW(_stackend) |
||||
|
$ENDIF |
||||
|
CALL !!_stkinit |
||||
|
|
||||
|
;-------------------------------------------------- |
||||
|
; hardware initialization |
||||
|
;-------------------------------------------------- |
||||
|
CALL !!_hdwinit |
||||
|
|
||||
|
$IFDEF __USE_RAM_INIT_TABLE |
||||
|
;-------------------------------------------------- |
||||
|
; initializing RAM |
||||
|
;-------------------------------------------------- |
||||
|
MOVW AX,#LOWW(STARTOF(.ram_init_table)) |
||||
|
BR $.L5_RAM_INIT_TABLE |
||||
|
.L1_RAM_INIT_TABLE: |
||||
|
PUSH AX ;table pointer |
||||
|
MOVW HL,AX |
||||
|
MOV ES,#HIGHW(STARTOF(.ram_init_table)) |
||||
|
MOVW AX,ES:[HL+6] ;dst |
||||
|
MOVW DE,AX |
||||
|
MOVW AX,ES:[HL+4] ;size |
||||
|
ADDW AX,DE |
||||
|
MOVW BC,AX ;end |
||||
|
MOV A,ES:[HL+2] ;high(src) |
||||
|
CMP A,#0xF |
||||
|
BZ $.L3_RAM_INIT_TABLE_CLEAR |
||||
|
|
||||
|
PUSH AX |
||||
|
MOVW AX,ES:[HL] ;loww(src) |
||||
|
MOVW HL,AX |
||||
|
POP AX |
||||
|
MOV ES,A |
||||
|
BR $.L3_RAM_INIT_TABLE_COPY |
||||
|
|
||||
|
.L2_RAM_INIT_TABLE_COPY: |
||||
|
MOV A,ES:[HL] |
||||
|
INCW HL |
||||
|
MOV [DE],A |
||||
|
INCW DE |
||||
|
.L3_RAM_INIT_TABLE_COPY: |
||||
|
MOVW AX,DE |
||||
|
CMPW AX,BC |
||||
|
BC $.L2_RAM_INIT_TABLE_COPY |
||||
|
BR $.L4_RAM_INIT_TABLE |
||||
|
|
||||
|
.L2_RAM_INIT_TABLE_CLEAR: |
||||
|
MOV [DE],#0 |
||||
|
INCW DE |
||||
|
.L3_RAM_INIT_TABLE_CLEAR: |
||||
|
MOVW AX,DE |
||||
|
CMPW AX,BC |
||||
|
BC $.L2_RAM_INIT_TABLE_CLEAR |
||||
|
|
||||
|
.L4_RAM_INIT_TABLE: |
||||
|
POP AX ;table ponter |
||||
|
ADDW AX,#8 |
||||
|
.L5_RAM_INIT_TABLE: |
||||
|
CMPW AX,#LOWW(STARTOF(.ram_init_table)+SIZEOF(.ram_init_table)) |
||||
|
BC $.L1_RAM_INIT_TABLE |
||||
|
|
||||
|
$ELSE ; __USE_RAM_INIT_TABLE |
||||
|
;-------------------------------------------------- |
||||
|
; initializing BSS |
||||
|
;-------------------------------------------------- |
||||
|
; clear external variables which doesn't have initial value (near) |
||||
|
MOVW HL,#LOWW(STARTOF(.bss)) |
||||
|
MOVW AX,#LOWW(STARTOF(.bss) + SIZEOF(.bss)) |
||||
|
BR $.L2_BSS |
||||
|
.L1_BSS: |
||||
|
MOV [HL+0],#0 |
||||
|
INCW HL |
||||
|
.L2_BSS: |
||||
|
CMPW AX,HL |
||||
|
BNZ $.L1_BSS |
||||
|
|
||||
|
; clear saddr variables which doesn't have initial value |
||||
|
MOVW HL,#LOWW(STARTOF(.sbss)) |
||||
|
MOVW AX,#LOWW(STARTOF(.sbss) + SIZEOF(.sbss)) |
||||
|
BR $.L2_SBSS |
||||
|
.L1_SBSS: |
||||
|
MOV [HL+0],#0 |
||||
|
INCW HL |
||||
|
.L2_SBSS: |
||||
|
CMPW AX,HL |
||||
|
BNZ $.L1_SBSS |
||||
|
|
||||
|
; clear external variables which doesn't have initial value (far) |
||||
|
; MOV ES,#HIGHW(STARTOF(.bssf)) |
||||
|
; MOVW HL,#LOWW(STARTOF(.bssf)) |
||||
|
; MOVW AX,#LOWW(STARTOF(.bssf) + SIZEOF(.bssf)) |
||||
|
; BR $.L2_BSSF |
||||
|
;.L1_BSSF: |
||||
|
; MOV ES:[HL+0],#0 |
||||
|
; INCW HL |
||||
|
;.L2_BSSF: |
||||
|
; CMPW AX,HL |
||||
|
; BNZ $.L1_BSSF |
||||
|
|
||||
|
;-------------------------------------------------- |
||||
|
; ROM data copy |
||||
|
;-------------------------------------------------- |
||||
|
; copy external variables having initial value (near) |
||||
|
MOV ES,#HIGHW(STARTOF(.data)) |
||||
|
MOVW BC,#LOWW(SIZEOF(.data)) |
||||
|
BR $.L2_DATA |
||||
|
.L1_DATA: |
||||
|
DECW BC |
||||
|
MOV A,ES:LOWW(STARTOF(.data))[BC] |
||||
|
MOV LOWW(STARTOF(.dataR))[BC],A |
||||
|
.L2_DATA: |
||||
|
CLRW AX |
||||
|
CMPW AX,BC |
||||
|
BNZ $.L1_DATA |
||||
|
|
||||
|
; copy saddr variables having initial value |
||||
|
MOV ES,#HIGHW(STARTOF(.sdata)) |
||||
|
MOVW BC,#LOWW(SIZEOF(.sdata)) |
||||
|
BR $.L2_SDATA |
||||
|
.L1_SDATA: |
||||
|
DECW BC |
||||
|
MOV A,ES:LOWW(STARTOF(.sdata))[BC] |
||||
|
MOV LOWW(STARTOF(.sdataR))[BC],A |
||||
|
.L2_SDATA: |
||||
|
CLRW AX |
||||
|
CMPW AX,BC |
||||
|
BNZ $.L1_SDATA |
||||
|
|
||||
|
; copy external variables having initial value (far) |
||||
|
; MOVW BC,#LOWW(SIZEOF(.dataf)) |
||||
|
; BR $.L2_DATAF |
||||
|
;.L1_DATAF: |
||||
|
; DECW BC |
||||
|
; MOV ES,#HIGHW(STARTOF(.dataf)) |
||||
|
; MOV A,ES:LOWW(STARTOF(.dataf))[BC] |
||||
|
; MOV ES,#HIGHW(STARTOF(.datafR)) |
||||
|
; MOV ES:LOWW(STARTOF(.datafR))[BC],A |
||||
|
;.L2_DATAF: |
||||
|
; CLRW AX |
||||
|
; CMPW AX,BC |
||||
|
; BNZ $.L1_DATAF |
||||
|
|
||||
|
; copy .text to RAM |
||||
|
; MOV C,#HIGHW(STARTOF(.textf)) |
||||
|
; MOVW HL,#LOWW(STARTOF(.textf)) |
||||
|
; MOVW DE,#LOWW(STARTOF(.textfR)) |
||||
|
; BR $.L2_TEXT |
||||
|
;.L1_TEXT: |
||||
|
; MOV A,C |
||||
|
; MOV ES,A |
||||
|
; MOV A,ES:[HL] |
||||
|
; MOV [DE],A |
||||
|
; INCW DE |
||||
|
; INCW HL |
||||
|
; CLRW AX |
||||
|
; CMPW AX,HL |
||||
|
; SKNZ |
||||
|
; INC C |
||||
|
;.L2_TEXT: |
||||
|
; MOVW AX,HL |
||||
|
; CMPW AX,#LOWW(STARTOF(.text) + SIZEOF(.text)) |
||||
|
; BNZ $.L1_TEXT |
||||
|
|
||||
|
$ENDIF ; __USE_RAM_INIT_TABLE |
||||
|
|
||||
|
;-------------------------------------------------- |
||||
|
; call global constructor (_peace_global_ctor_0) |
||||
|
;-------------------------------------------------- |
||||
|
MOVW BC,#LOWW(SIZEOF(.init_array)) |
||||
|
BR $.L2_INIT |
||||
|
.L1_INIT: |
||||
|
DECW BC |
||||
|
DECW BC |
||||
|
MOV ES,#HIGHW(STARTOF(.init_array)) |
||||
|
MOVW AX,ES:LOWW(STARTOF(.init_array))[BC] |
||||
|
MOV CS,#0x00 |
||||
|
PUSH BC |
||||
|
CALL AX |
||||
|
POP BC |
||||
|
.L2_INIT: |
||||
|
CLRW AX |
||||
|
CMPW AX,BC |
||||
|
BNZ $.L1_INIT |
||||
|
|
||||
|
;-------------------------------------------------- |
||||
|
; call main function |
||||
|
;-------------------------------------------------- |
||||
|
CALL !!_main ; main(); |
||||
|
|
||||
|
;-------------------------------------------------- |
||||
|
; call exit function |
||||
|
;-------------------------------------------------- |
||||
|
CLRW AX ; exit(0) |
||||
|
_exit: |
||||
|
BR $_exit |
||||
|
|
||||
|
;----------------------------------------------------------------------------- |
||||
|
; atexit (only ret) |
||||
|
;----------------------------------------------------------------------------- |
||||
|
_atexit: |
||||
|
RET |
||||
|
|
||||
|
;----------------------------------------------------------------------------- |
||||
|
; section |
||||
|
;----------------------------------------------------------------------------- |
||||
|
$IF (__RENESAS_VERSION__ >= 0x01010000) |
||||
|
.SECTION .RLIB, TEXTF |
||||
|
.L_section_RLIB: |
||||
|
.SECTION .SLIB, TEXTF |
||||
|
.L_section_SLIB: |
||||
|
$ENDIF |
||||
|
.SECTION .textf, TEXTF |
||||
|
.L_section_textf: |
||||
|
.SECTION .const, CONST |
||||
|
.L_section_const: |
||||
|
.SECTION .constf, CONSTF |
||||
|
.L_section_constf: |
||||
|
.SECTION .data, DATA |
||||
|
.L_section_data: |
||||
|
;.SECTION .dataf, DATAF |
||||
|
;.L_section_dataf: |
||||
|
.SECTION .sdata, SDATA |
||||
|
.L_section_sdata: |
||||
|
.SECTION .bss, BSS |
||||
|
.L_section_bss: |
||||
|
;.SECTION .bssf, BSSF |
||||
|
;.L_section_bssf: |
||||
|
.SECTION .sbss, SBSS |
||||
|
.L_section_sbss: |
||||
|
.SECTION .init_array, CONSTF |
||||
|
.L_section_init_array: |
||||
@ -0,0 +1,35 @@ |
|||||
|
;/********************************************************************************************************************** |
||||
|
; * DISCLAIMER |
||||
|
; * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No |
||||
|
; * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
; * applicable laws, including copyright laws. |
||||
|
; * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
||||
|
; * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, |
||||
|
; * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM |
||||
|
; * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES |
||||
|
; * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO |
||||
|
; * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
; * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of |
||||
|
; * this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
; * following link: |
||||
|
; * http://www.renesas.com/disclaimer |
||||
|
; * |
||||
|
; * Copyright (C) 2020 Renesas Electronics Corporation. All rights reserved. |
||||
|
; *********************************************************************************************************************/;--------------------------------------------------------------------- |
||||
|
; _hdwinit |
||||
|
; |
||||
|
; void _hdwinit(void); |
||||
|
; |
||||
|
; input: |
||||
|
; NONE |
||||
|
; output: |
||||
|
; NONE |
||||
|
;--------------------------------------------------------------------- |
||||
|
|
||||
|
; NOTE : THIS IS A TYPICAL EXAMPLE. |
||||
|
|
||||
|
.PUBLIC _hdwinit |
||||
|
|
||||
|
.textf .CSEG TEXTF |
||||
|
_hdwinit: |
||||
|
RET |
||||
File diff suppressed because it is too large
@ -0,0 +1,35 @@ |
|||||
|
/**********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No |
||||
|
* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
||||
|
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, |
||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM |
||||
|
* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES |
||||
|
* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO |
||||
|
* THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of |
||||
|
* this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2020-2022 Renesas Electronics Corporation. All rights reserved. |
||||
|
*********************************************************************************************************************/ |
||||
|
/***********************************************************************/ |
||||
|
/* */ |
||||
|
/* FILE :Main.c or Main.cpp */ |
||||
|
/* DATE : */ |
||||
|
/* DESCRIPTION :Main Program */ |
||||
|
/* CPU TYPE : */ |
||||
|
/* */ |
||||
|
/* NOTE:THIS IS A TYPICAL EXAMPLE. */ |
||||
|
/* */ |
||||
|
/***********************************************************************/ |
||||
|
|
||||
|
void main(void); |
||||
|
|
||||
|
void main(void) |
||||
|
{ |
||||
|
|
||||
|
} |
||||
File diff suppressed because it is too large
File diff suppressed because it is too large
@ -0,0 +1,367 @@ |
|||||
|
<CubeSuiteProject.User> |
||||
|
<Class Guid="e4df8d71-236e-4af2-aaea-56345a08da25"> |
||||
|
<Instance Guid="a30e3860-379f-401e-950c-b6fcb80d6a09"> |
||||
|
<DeviceChangedCounter>0</DeviceChangedCounter> |
||||
|
<DeviceName>R5F10PPJ</DeviceName> |
||||
|
<DebuggerProperty-OptionalProperty-Assemble-DisplaySymbol>SymbolOffset</DebuggerProperty-OptionalProperty-Assemble-DisplaySymbol> |
||||
|
<DebuggerProperty-OptionalProperty-Assemble-DisplayFunctionName>Yes</DebuggerProperty-OptionalProperty-Assemble-DisplayFunctionName> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="2c267d36-9968-416b-8f39-cfcf1e069830"> |
||||
|
<Instance Guid="705a6012-3a18-4d01-903f-6c55417f8f3d"> |
||||
|
<ColumnStates /> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="29b411d9-bd89-4bd0-8039-3f500de10677"> |
||||
|
<Instance Guid="76aae16a-9b3c-4e4f-9390-f377b426311f"> |
||||
|
<ProjectSaveKeyHoldPrebuildOptions>False</ProjectSaveKeyHoldPrebuildOptions> |
||||
|
<ProjectSaveKeyMeasurmentConditionOperationAfterRecordMemory>NonStopOverwriteMemory</ProjectSaveKeyMeasurmentConditionOperationAfterRecordMemory> |
||||
|
<ProjectSaveKeyMeasurmentConditionSamplingTime>ST10US</ProjectSaveKeyMeasurmentConditionSamplingTime> |
||||
|
<ProjectSaveKeyMeasurmentConditionAcqCond>All</ProjectSaveKeyMeasurmentConditionAcqCond> |
||||
|
<ProjectSaveKeyTriggerConditionUseTriggerFunction>False</ProjectSaveKeyTriggerConditionUseTriggerFunction> |
||||
|
<ProjectSaveKeyFindCondition>OverThreshold</ProjectSaveKeyFindCondition> |
||||
|
<ProjectSaveKeyPanelStatusHideAllOptionalLine>False</ProjectSaveKeyPanelStatusHideAllOptionalLine> |
||||
|
<ProjectSaveKeyPanelStatusConnectSourceWindow>False</ProjectSaveKeyPanelStatusConnectSourceWindow> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="34506c0a-c7d1-4c09-aee7-5072eca3d198"> |
||||
|
<Instance Guid="00000000-0000-0000-0000-000000000000"> |
||||
|
<LastSavedNetAdvantageVersion>12.2.20122.2006</LastSavedNetAdvantageVersion> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="def4131d-299f-4229-94f7-b6796e3a759d"> |
||||
|
<Instance Guid="00000000-0000-0000-0000-000000000000"> |
||||
|
<LastNetAdvantageVersion>12.2.20122.2006</LastNetAdvantageVersion> |
||||
|
<LastUserVersion>9.13.00.05</LastUserVersion> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="11fad805-4123-496e-99f7-1af9aead0aab"> |
||||
|
<Instance Guid="00000000-0000-0000-0000-000000000000"> |
||||
|
<LastNetAdvantageVersion>12.2.20122.2006</LastNetAdvantageVersion> |
||||
|
<LastUserVersion>9.13.00.05</LastUserVersion> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="d9e7a26a-0526-4119-b8c3-b0112e16eb03"> |
||||
|
<Instance Guid="d9e7a26a-0526-4119-b8c3-b0112e16eb03"> |
||||
|
<DebugConsole-Echoback>enable</DebugConsole-Echoback> |
||||
|
<DebugConsole-EnableDisable>enable</DebugConsole-EnableDisable> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="2e5a2d99-73c8-434e-963e-228cb95ebec4"> |
||||
|
<Instance Guid="00000000-0000-0000-0000-000000000000"> |
||||
|
<Current.DocListVersion>1</Current.DocListVersion> |
||||
|
<Current.UpdateDate>0</Current.UpdateDate> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="3bf83115-e8de-4769-adf6-4ddaef5490b0"> |
||||
|
<Instance Guid="e36eeca9-996b-4f67-b6a4-38128d0b21b3"> |
||||
|
<RefreshAtStop>False</RefreshAtStop> |
||||
|
<SynchronizeProjTree>False</SynchronizeProjTree> |
||||
|
<SynchronizeEditor>False</SynchronizeEditor> |
||||
|
<SynchronizeDebugManager>False</SynchronizeDebugManager> |
||||
|
<LayoutInformation2Guid0>291a5aad-8f89-4443-8b93-58ebd220ca9c</LayoutInformation2Guid0> |
||||
|
<ColumnLayoutInfomationKey-0>FunctionName</ColumnLayoutInfomationKey-0> |
||||
|
<FunctionName-0-Hidden>False</FunctionName-0-Hidden> |
||||
|
<FunctionName-0-Fixed>False</FunctionName-0-Fixed> |
||||
|
<FunctionName-0-VisiblePotision>0</FunctionName-0-VisiblePotision> |
||||
|
<FunctionName-0-Width>-1</FunctionName-0-Width> |
||||
|
<FunctionName-0-AndCondition>True</FunctionName-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-1>ClassName</ColumnLayoutInfomationKey-1> |
||||
|
<ClassName-0-Hidden>False</ClassName-0-Hidden> |
||||
|
<ClassName-0-Fixed>False</ClassName-0-Fixed> |
||||
|
<ClassName-0-VisiblePotision>1</ClassName-0-VisiblePotision> |
||||
|
<ClassName-0-Width>-1</ClassName-0-Width> |
||||
|
<ClassName-0-AndCondition>True</ClassName-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-2>Namespace</ColumnLayoutInfomationKey-2> |
||||
|
<Namespace-0-Hidden>True</Namespace-0-Hidden> |
||||
|
<Namespace-0-Fixed>False</Namespace-0-Fixed> |
||||
|
<Namespace-0-VisiblePotision>2</Namespace-0-VisiblePotision> |
||||
|
<Namespace-0-Width>-1</Namespace-0-Width> |
||||
|
<Namespace-0-AndCondition>True</Namespace-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-3>FileName</ColumnLayoutInfomationKey-3> |
||||
|
<FileName-0-Hidden>False</FileName-0-Hidden> |
||||
|
<FileName-0-Fixed>False</FileName-0-Fixed> |
||||
|
<FileName-0-VisiblePotision>3</FileName-0-VisiblePotision> |
||||
|
<FileName-0-Width>-1</FileName-0-Width> |
||||
|
<FileName-0-AndCondition>True</FileName-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-4>FilePath</ColumnLayoutInfomationKey-4> |
||||
|
<FilePath-0-Hidden>True</FilePath-0-Hidden> |
||||
|
<FilePath-0-Fixed>False</FilePath-0-Fixed> |
||||
|
<FilePath-0-VisiblePotision>4</FilePath-0-VisiblePotision> |
||||
|
<FilePath-0-Width>-1</FilePath-0-Width> |
||||
|
<FilePath-0-AndCondition>True</FilePath-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-5>PEInformation</ColumnLayoutInfomationKey-5> |
||||
|
<PEInformation-0-Hidden>False</PEInformation-0-Hidden> |
||||
|
<PEInformation-0-Fixed>False</PEInformation-0-Fixed> |
||||
|
<PEInformation-0-VisiblePotision>5</PEInformation-0-VisiblePotision> |
||||
|
<PEInformation-0-Width>-1</PEInformation-0-Width> |
||||
|
<PEInformation-0-AndCondition>True</PEInformation-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-6>Import</ColumnLayoutInfomationKey-6> |
||||
|
<Import-0-Hidden>True</Import-0-Hidden> |
||||
|
<Import-0-Fixed>False</Import-0-Fixed> |
||||
|
<Import-0-VisiblePotision>6</Import-0-VisiblePotision> |
||||
|
<Import-0-Width>-1</Import-0-Width> |
||||
|
<Import-0-AndCondition>True</Import-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-7>AccessSpecifier</ColumnLayoutInfomationKey-7> |
||||
|
<AccessSpecifier-0-Hidden>False</AccessSpecifier-0-Hidden> |
||||
|
<AccessSpecifier-0-Fixed>False</AccessSpecifier-0-Fixed> |
||||
|
<AccessSpecifier-0-VisiblePotision>7</AccessSpecifier-0-VisiblePotision> |
||||
|
<AccessSpecifier-0-Width>-1</AccessSpecifier-0-Width> |
||||
|
<AccessSpecifier-0-AndCondition>True</AccessSpecifier-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-8>Attribute</ColumnLayoutInfomationKey-8> |
||||
|
<Attribute-0-Hidden>False</Attribute-0-Hidden> |
||||
|
<Attribute-0-Fixed>False</Attribute-0-Fixed> |
||||
|
<Attribute-0-VisiblePotision>8</Attribute-0-VisiblePotision> |
||||
|
<Attribute-0-Width>-1</Attribute-0-Width> |
||||
|
<Attribute-0-AndCondition>True</Attribute-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-9>ReturnType</ColumnLayoutInfomationKey-9> |
||||
|
<ReturnType-0-Hidden>False</ReturnType-0-Hidden> |
||||
|
<ReturnType-0-Fixed>False</ReturnType-0-Fixed> |
||||
|
<ReturnType-0-VisiblePotision>9</ReturnType-0-VisiblePotision> |
||||
|
<ReturnType-0-Width>-1</ReturnType-0-Width> |
||||
|
<ReturnType-0-AndCondition>True</ReturnType-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-10>ArgumentsCount</ColumnLayoutInfomationKey-10> |
||||
|
<ArgumentsCount-0-Hidden>True</ArgumentsCount-0-Hidden> |
||||
|
<ArgumentsCount-0-Fixed>False</ArgumentsCount-0-Fixed> |
||||
|
<ArgumentsCount-0-VisiblePotision>10</ArgumentsCount-0-VisiblePotision> |
||||
|
<ArgumentsCount-0-Width>-1</ArgumentsCount-0-Width> |
||||
|
<ArgumentsCount-0-AndCondition>True</ArgumentsCount-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-11>Arguments</ColumnLayoutInfomationKey-11> |
||||
|
<Arguments-0-Hidden>False</Arguments-0-Hidden> |
||||
|
<Arguments-0-Fixed>False</Arguments-0-Fixed> |
||||
|
<Arguments-0-VisiblePotision>11</Arguments-0-VisiblePotision> |
||||
|
<Arguments-0-Width>-1</Arguments-0-Width> |
||||
|
<Arguments-0-AndCondition>True</Arguments-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-12>CodeSize</ColumnLayoutInfomationKey-12> |
||||
|
<CodeSize-0-Hidden>False</CodeSize-0-Hidden> |
||||
|
<CodeSize-0-Fixed>False</CodeSize-0-Fixed> |
||||
|
<CodeSize-0-VisiblePotision>12</CodeSize-0-VisiblePotision> |
||||
|
<CodeSize-0-Width>-1</CodeSize-0-Width> |
||||
|
<CodeSize-0-AndCondition>True</CodeSize-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-13>StackSize</ColumnLayoutInfomationKey-13> |
||||
|
<StackSize-0-Hidden>False</StackSize-0-Hidden> |
||||
|
<StackSize-0-Fixed>False</StackSize-0-Fixed> |
||||
|
<StackSize-0-VisiblePotision>13</StackSize-0-VisiblePotision> |
||||
|
<StackSize-0-Width>-1</StackSize-0-Width> |
||||
|
<StackSize-0-AndCondition>True</StackSize-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-14>StartAddress</ColumnLayoutInfomationKey-14> |
||||
|
<StartAddress-0-Hidden>False</StartAddress-0-Hidden> |
||||
|
<StartAddress-0-Fixed>False</StartAddress-0-Fixed> |
||||
|
<StartAddress-0-VisiblePotision>14</StartAddress-0-VisiblePotision> |
||||
|
<StartAddress-0-Width>-1</StartAddress-0-Width> |
||||
|
<StartAddress-0-AndCondition>True</StartAddress-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-15>EndAddress</ColumnLayoutInfomationKey-15> |
||||
|
<EndAddress-0-Hidden>True</EndAddress-0-Hidden> |
||||
|
<EndAddress-0-Fixed>False</EndAddress-0-Fixed> |
||||
|
<EndAddress-0-VisiblePotision>15</EndAddress-0-VisiblePotision> |
||||
|
<EndAddress-0-Width>-1</EndAddress-0-Width> |
||||
|
<EndAddress-0-AndCondition>True</EndAddress-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-16>ReferenceCount</ColumnLayoutInfomationKey-16> |
||||
|
<ReferenceCount-0-Hidden>False</ReferenceCount-0-Hidden> |
||||
|
<ReferenceCount-0-Fixed>False</ReferenceCount-0-Fixed> |
||||
|
<ReferenceCount-0-VisiblePotision>16</ReferenceCount-0-VisiblePotision> |
||||
|
<ReferenceCount-0-Width>-1</ReferenceCount-0-Width> |
||||
|
<ReferenceCount-0-AndCondition>True</ReferenceCount-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-17>ExecutionCount</ColumnLayoutInfomationKey-17> |
||||
|
<ExecutionCount-0-Hidden>True</ExecutionCount-0-Hidden> |
||||
|
<ExecutionCount-0-Fixed>False</ExecutionCount-0-Fixed> |
||||
|
<ExecutionCount-0-VisiblePotision>17</ExecutionCount-0-VisiblePotision> |
||||
|
<ExecutionCount-0-Width>-1</ExecutionCount-0-Width> |
||||
|
<ExecutionCount-0-AndCondition>True</ExecutionCount-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-18>ExecutionTime</ColumnLayoutInfomationKey-18> |
||||
|
<ExecutionTime-0-Hidden>True</ExecutionTime-0-Hidden> |
||||
|
<ExecutionTime-0-Fixed>False</ExecutionTime-0-Fixed> |
||||
|
<ExecutionTime-0-VisiblePotision>18</ExecutionTime-0-VisiblePotision> |
||||
|
<ExecutionTime-0-Width>-1</ExecutionTime-0-Width> |
||||
|
<ExecutionTime-0-AndCondition>True</ExecutionTime-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-19>PercentageExecutionTime</ColumnLayoutInfomationKey-19> |
||||
|
<PercentageExecutionTime-0-Hidden>True</PercentageExecutionTime-0-Hidden> |
||||
|
<PercentageExecutionTime-0-Fixed>False</PercentageExecutionTime-0-Fixed> |
||||
|
<PercentageExecutionTime-0-VisiblePotision>19</PercentageExecutionTime-0-VisiblePotision> |
||||
|
<PercentageExecutionTime-0-Width>-1</PercentageExecutionTime-0-Width> |
||||
|
<PercentageExecutionTime-0-AndCondition>True</PercentageExecutionTime-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-20>AverageExecutionTime</ColumnLayoutInfomationKey-20> |
||||
|
<AverageExecutionTime-0-Hidden>True</AverageExecutionTime-0-Hidden> |
||||
|
<AverageExecutionTime-0-Fixed>False</AverageExecutionTime-0-Fixed> |
||||
|
<AverageExecutionTime-0-VisiblePotision>20</AverageExecutionTime-0-VisiblePotision> |
||||
|
<AverageExecutionTime-0-Width>-1</AverageExecutionTime-0-Width> |
||||
|
<AverageExecutionTime-0-AndCondition>True</AverageExecutionTime-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-21>CodeCoverage</ColumnLayoutInfomationKey-21> |
||||
|
<CodeCoverage-0-Hidden>True</CodeCoverage-0-Hidden> |
||||
|
<CodeCoverage-0-Fixed>False</CodeCoverage-0-Fixed> |
||||
|
<CodeCoverage-0-VisiblePotision>21</CodeCoverage-0-VisiblePotision> |
||||
|
<CodeCoverage-0-Width>-1</CodeCoverage-0-Width> |
||||
|
<CodeCoverage-0-AndCondition>True</CodeCoverage-0-AndCondition> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="785ce270-79e5-4723-9c14-4f8bb312e0b1"> |
||||
|
<Instance Guid="86051b24-69e1-4d78-a8ce-ea198b86f5dc"> |
||||
|
<RefreshAtStop>False</RefreshAtStop> |
||||
|
<SynchronizeProjTree>False</SynchronizeProjTree> |
||||
|
<SynchronizeEditor>False</SynchronizeEditor> |
||||
|
<SynchronizeDebugManager>False</SynchronizeDebugManager> |
||||
|
<LayoutInformation2Guid0>291a5aad-8f89-4443-8b93-58ebd220ca9c</LayoutInformation2Guid0> |
||||
|
<ColumnLayoutInfomationKey-0>VariableName</ColumnLayoutInfomationKey-0> |
||||
|
<VariableName-0-Hidden>False</VariableName-0-Hidden> |
||||
|
<VariableName-0-Fixed>False</VariableName-0-Fixed> |
||||
|
<VariableName-0-VisiblePotision>0</VariableName-0-VisiblePotision> |
||||
|
<VariableName-0-Width>-1</VariableName-0-Width> |
||||
|
<VariableName-0-AndCondition>True</VariableName-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-1>ClassName</ColumnLayoutInfomationKey-1> |
||||
|
<ClassName-0-Hidden>False</ClassName-0-Hidden> |
||||
|
<ClassName-0-Fixed>False</ClassName-0-Fixed> |
||||
|
<ClassName-0-VisiblePotision>1</ClassName-0-VisiblePotision> |
||||
|
<ClassName-0-Width>-1</ClassName-0-Width> |
||||
|
<ClassName-0-AndCondition>True</ClassName-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-2>Namespace</ColumnLayoutInfomationKey-2> |
||||
|
<Namespace-0-Hidden>True</Namespace-0-Hidden> |
||||
|
<Namespace-0-Fixed>False</Namespace-0-Fixed> |
||||
|
<Namespace-0-VisiblePotision>2</Namespace-0-VisiblePotision> |
||||
|
<Namespace-0-Width>-1</Namespace-0-Width> |
||||
|
<Namespace-0-AndCondition>True</Namespace-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-3>FileName</ColumnLayoutInfomationKey-3> |
||||
|
<FileName-0-Hidden>False</FileName-0-Hidden> |
||||
|
<FileName-0-Fixed>False</FileName-0-Fixed> |
||||
|
<FileName-0-VisiblePotision>3</FileName-0-VisiblePotision> |
||||
|
<FileName-0-Width>-1</FileName-0-Width> |
||||
|
<FileName-0-AndCondition>True</FileName-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-4>FunctionName</ColumnLayoutInfomationKey-4> |
||||
|
<FunctionName-0-Hidden>True</FunctionName-0-Hidden> |
||||
|
<FunctionName-0-Fixed>False</FunctionName-0-Fixed> |
||||
|
<FunctionName-0-VisiblePotision>4</FunctionName-0-VisiblePotision> |
||||
|
<FunctionName-0-Width>-1</FunctionName-0-Width> |
||||
|
<FunctionName-0-AndCondition>True</FunctionName-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-5>FilePath</ColumnLayoutInfomationKey-5> |
||||
|
<FilePath-0-Hidden>True</FilePath-0-Hidden> |
||||
|
<FilePath-0-Fixed>False</FilePath-0-Fixed> |
||||
|
<FilePath-0-VisiblePotision>5</FilePath-0-VisiblePotision> |
||||
|
<FilePath-0-Width>-1</FilePath-0-Width> |
||||
|
<FilePath-0-AndCondition>True</FilePath-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-6>PEInformation</ColumnLayoutInfomationKey-6> |
||||
|
<PEInformation-0-Hidden>False</PEInformation-0-Hidden> |
||||
|
<PEInformation-0-Fixed>False</PEInformation-0-Fixed> |
||||
|
<PEInformation-0-VisiblePotision>6</PEInformation-0-VisiblePotision> |
||||
|
<PEInformation-0-Width>-1</PEInformation-0-Width> |
||||
|
<PEInformation-0-AndCondition>True</PEInformation-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-7>Import</ColumnLayoutInfomationKey-7> |
||||
|
<Import-0-Hidden>True</Import-0-Hidden> |
||||
|
<Import-0-Fixed>False</Import-0-Fixed> |
||||
|
<Import-0-VisiblePotision>7</Import-0-VisiblePotision> |
||||
|
<Import-0-Width>-1</Import-0-Width> |
||||
|
<Import-0-AndCondition>True</Import-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-8>AccessSpecifier</ColumnLayoutInfomationKey-8> |
||||
|
<AccessSpecifier-0-Hidden>False</AccessSpecifier-0-Hidden> |
||||
|
<AccessSpecifier-0-Fixed>False</AccessSpecifier-0-Fixed> |
||||
|
<AccessSpecifier-0-VisiblePotision>8</AccessSpecifier-0-VisiblePotision> |
||||
|
<AccessSpecifier-0-Width>-1</AccessSpecifier-0-Width> |
||||
|
<AccessSpecifier-0-AndCondition>True</AccessSpecifier-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-9>Attribute</ColumnLayoutInfomationKey-9> |
||||
|
<Attribute-0-Hidden>False</Attribute-0-Hidden> |
||||
|
<Attribute-0-Fixed>False</Attribute-0-Fixed> |
||||
|
<Attribute-0-VisiblePotision>9</Attribute-0-VisiblePotision> |
||||
|
<Attribute-0-Width>-1</Attribute-0-Width> |
||||
|
<Attribute-0-AndCondition>True</Attribute-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-10>Type</ColumnLayoutInfomationKey-10> |
||||
|
<Type-0-Hidden>False</Type-0-Hidden> |
||||
|
<Type-0-Fixed>False</Type-0-Fixed> |
||||
|
<Type-0-VisiblePotision>10</Type-0-VisiblePotision> |
||||
|
<Type-0-Width>-1</Type-0-Width> |
||||
|
<Type-0-AndCondition>True</Type-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-11>Members</ColumnLayoutInfomationKey-11> |
||||
|
<Members-0-Hidden>False</Members-0-Hidden> |
||||
|
<Members-0-Fixed>False</Members-0-Fixed> |
||||
|
<Members-0-VisiblePotision>11</Members-0-VisiblePotision> |
||||
|
<Members-0-Width>-1</Members-0-Width> |
||||
|
<Members-0-AndCondition>True</Members-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-12>Address</ColumnLayoutInfomationKey-12> |
||||
|
<Address-0-Hidden>False</Address-0-Hidden> |
||||
|
<Address-0-Fixed>False</Address-0-Fixed> |
||||
|
<Address-0-VisiblePotision>12</Address-0-VisiblePotision> |
||||
|
<Address-0-Width>-1</Address-0-Width> |
||||
|
<Address-0-AndCondition>True</Address-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-13>Size</ColumnLayoutInfomationKey-13> |
||||
|
<Size-0-Hidden>False</Size-0-Hidden> |
||||
|
<Size-0-Fixed>False</Size-0-Fixed> |
||||
|
<Size-0-VisiblePotision>13</Size-0-VisiblePotision> |
||||
|
<Size-0-Width>-1</Size-0-Width> |
||||
|
<Size-0-AndCondition>True</Size-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-14>ReferenceCount</ColumnLayoutInfomationKey-14> |
||||
|
<ReferenceCount-0-Hidden>False</ReferenceCount-0-Hidden> |
||||
|
<ReferenceCount-0-Fixed>False</ReferenceCount-0-Fixed> |
||||
|
<ReferenceCount-0-VisiblePotision>14</ReferenceCount-0-VisiblePotision> |
||||
|
<ReferenceCount-0-Width>-1</ReferenceCount-0-Width> |
||||
|
<ReferenceCount-0-AndCondition>True</ReferenceCount-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-15>ReadCount</ColumnLayoutInfomationKey-15> |
||||
|
<ReadCount-0-Hidden>True</ReadCount-0-Hidden> |
||||
|
<ReadCount-0-Fixed>False</ReadCount-0-Fixed> |
||||
|
<ReadCount-0-VisiblePotision>15</ReadCount-0-VisiblePotision> |
||||
|
<ReadCount-0-Width>-1</ReadCount-0-Width> |
||||
|
<ReadCount-0-AndCondition>True</ReadCount-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-16>WriteCount</ColumnLayoutInfomationKey-16> |
||||
|
<WriteCount-0-Hidden>True</WriteCount-0-Hidden> |
||||
|
<WriteCount-0-Fixed>False</WriteCount-0-Fixed> |
||||
|
<WriteCount-0-VisiblePotision>16</WriteCount-0-VisiblePotision> |
||||
|
<WriteCount-0-Width>-1</WriteCount-0-Width> |
||||
|
<WriteCount-0-AndCondition>True</WriteCount-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-17>ReadWriteCount</ColumnLayoutInfomationKey-17> |
||||
|
<ReadWriteCount-0-Hidden>True</ReadWriteCount-0-Hidden> |
||||
|
<ReadWriteCount-0-Fixed>False</ReadWriteCount-0-Fixed> |
||||
|
<ReadWriteCount-0-VisiblePotision>17</ReadWriteCount-0-VisiblePotision> |
||||
|
<ReadWriteCount-0-Width>-1</ReadWriteCount-0-Width> |
||||
|
<ReadWriteCount-0-AndCondition>True</ReadWriteCount-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-18>MinimumValue</ColumnLayoutInfomationKey-18> |
||||
|
<MinimumValue-0-Hidden>True</MinimumValue-0-Hidden> |
||||
|
<MinimumValue-0-Fixed>False</MinimumValue-0-Fixed> |
||||
|
<MinimumValue-0-VisiblePotision>18</MinimumValue-0-VisiblePotision> |
||||
|
<MinimumValue-0-Width>-1</MinimumValue-0-Width> |
||||
|
<MinimumValue-0-AndCondition>True</MinimumValue-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-19>MaximumValue</ColumnLayoutInfomationKey-19> |
||||
|
<MaximumValue-0-Hidden>True</MaximumValue-0-Hidden> |
||||
|
<MaximumValue-0-Fixed>False</MaximumValue-0-Fixed> |
||||
|
<MaximumValue-0-VisiblePotision>19</MaximumValue-0-VisiblePotision> |
||||
|
<MaximumValue-0-Width>-1</MaximumValue-0-Width> |
||||
|
<MaximumValue-0-AndCondition>True</MaximumValue-0-AndCondition> |
||||
|
<ColumnLayoutInfomationKey-20>DataCoverage</ColumnLayoutInfomationKey-20> |
||||
|
<DataCoverage-0-Hidden>True</DataCoverage-0-Hidden> |
||||
|
<DataCoverage-0-Fixed>False</DataCoverage-0-Fixed> |
||||
|
<DataCoverage-0-VisiblePotision>20</DataCoverage-0-VisiblePotision> |
||||
|
<DataCoverage-0-Width>-1</DataCoverage-0-Width> |
||||
|
<DataCoverage-0-AndCondition>True</DataCoverage-0-AndCondition> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="9794c033-010b-4418-9821-563c3097c2ea"> |
||||
|
<Instance Guid="01329c46-c2fa-4692-9215-312df32436b5"> |
||||
|
<Name>PanelAnalysisChart</Name> |
||||
|
<RefreshAtStop>True</RefreshAtStop> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="4154da57-1be2-4ca9-8f3f-7b2411fe006b"> |
||||
|
<Instance Guid="4154da57-1be2-4ca9-8f3f-7b2411fe006b"> |
||||
|
<Name>PanelCallGraph</Name> |
||||
|
<RefreshAtStop>True</RefreshAtStop> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="d61fefba-91a0-4e5d-b818-99044ba8bec9"> |
||||
|
<Instance Guid="d61fefba-91a0-4e5d-b818-99044ba8bec9"> |
||||
|
<Name>PanelClassMember</Name> |
||||
|
<TargetNameMRUCount>0</TargetNameMRUCount> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="611ccd33-b851-4726-9e3f-a4209353c34d"> |
||||
|
<Instance Guid="00000000-0000-0000-0000-000000000000"> |
||||
|
<PanelCount>0</PanelCount> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
<Class Guid="a86d2744-4eb1-43a4-bbcb-1f717558eac6"> |
||||
|
<Instance Guid="a86d2744-4eb1-43a4-bbcb-1f717558eac6"> |
||||
|
<ExtendedItems>f7cb3835-78e5-4404-aa52-899f930b4cea |
||||
|
7efdc661-68fb-46cf-8e51-d6af2c39e1cf |
||||
|
60996855-5843-4749-8e97-896ad0dda7aa |
||||
|
a679a670-3999-44a1-af72-43f34fab5a94 |
||||
|
</ExtendedItems> |
||||
|
<TopItem>f7cb3835-78e5-4404-aa52-899f930b4cea</TopItem> |
||||
|
<ViewMode>2</ViewMode> |
||||
|
<ViewModeToggle>False</ViewModeToggle> |
||||
|
</Instance> |
||||
|
</Class> |
||||
|
</CubeSuiteProject.User> |
||||
@ -0,0 +1,82 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_cgc.c |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements device driver for CGC module. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Includes |
||||
|
***********************************************************************************************************************/ |
||||
|
#include "r_cg_macrodriver.h" |
||||
|
#include "r_cg_cgc.h" |
||||
|
/* Start user code for include. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#include "r_cg_userdefine.h" |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Pragma directive |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for pragma. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global variables and functions |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for global. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_CGC_Create |
||||
|
* Description : This function initializes the clock generator. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_CGC_Create(void) |
||||
|
{ |
||||
|
/* Set fSL */ |
||||
|
SELLOSC = 1U; |
||||
|
/* Set fMX */ |
||||
|
CMC = _00_CGC_HISYS_PORT | _00_CGC_SUB_PORT | _00_CGC_SYSOSC_DEFAULT | _00_CGC_SUBMODE_DEFAULT; |
||||
|
MSTOP = 1U; |
||||
|
/* Set fMAIN */ |
||||
|
MCM0 = 0U; |
||||
|
MDIV = _01_CGC_FMP_DIV_1; |
||||
|
/* Set fMP to clock through mode */ |
||||
|
SELPLL = 0U; |
||||
|
/* Set fSUB */ |
||||
|
XTSTOP = 1U; |
||||
|
/* Set fCLK */ |
||||
|
CSS = 0U; |
||||
|
/* Set fIH */ |
||||
|
HIOSTOP = 0U; |
||||
|
/* Set RTC clock source */ |
||||
|
RTCCL = _80_CGC_RTC_FIH; |
||||
|
RTCCL |= _42_CGC_RTC_DIV122; |
||||
|
/* Set Timer RD clock source to fCLK, fMP */ |
||||
|
TRD_CKSEL = 0U; |
||||
|
} |
||||
|
|
||||
|
/* Start user code for adding. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
@ -0,0 +1,227 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_cgc.h |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements device driver for CGC module. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
#ifndef CGC_H |
||||
|
#define CGC_H |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Macro definitions (Register bit) |
||||
|
***********************************************************************************************************************/ |
||||
|
/*
|
||||
|
Clock operation mode control register (CMC) |
||||
|
*/ |
||||
|
/* High-speed system clock pin operation mode (EXCLK, OSCSEL) */ |
||||
|
#define _C0_CGC_HISYS_PIN (0xC0U) |
||||
|
#define _00_CGC_HISYS_PORT (0x00U) /* X1, X2 as I/O port */ |
||||
|
#define _40_CGC_HISYS_OSC (0x40U) /* X1, X2 as crystal/ceramic resonator connection */ |
||||
|
#define _80_CGC_HISYS_PORT1 (0x80U) /* X1, X2 as I/O port */ |
||||
|
#define _C0_CGC_HISYS_EXT (0xC0U) /* X1 as I/O port, X2 as external clock input */ |
||||
|
/* Subsystem clock pin operation mode (EXCLKS, OSCSELS) */ |
||||
|
#define _30_CGC_SUB_PIN (0x30U) |
||||
|
#define _00_CGC_SUB_PORT (0x00U) /* XT1, XT2 as I/O port */ |
||||
|
#define _10_CGC_SUB_OSC (0x10U) /* XT1, XT2 as crystal connection */ |
||||
|
#define _20_CGC_SUB_PORT1 (0x20U) /* XT1, XT2 as I/O port */ |
||||
|
#define _30_CGC_SUB_EXT (0x30U) /* XT1 as I/O port, XT2 as external clock input */ |
||||
|
/* XT1 oscillator oscillation mode selection (AMPHS1, AMPHS0) */ |
||||
|
#define _00_CGC_SUBMODE_DEFAULT (0x00U) |
||||
|
#define _00_CGC_SUBMODE_LOW (0x00U) /* low power consumption oscillation */ |
||||
|
#define _02_CGC_SUBMODE_NORMAL (0x02U) /* normal oscillation */ |
||||
|
#define _04_CGC_SUBMODE_ULOW (0x04U) /* ultra-low power consumption oscillation */ |
||||
|
/* Control of X1 high-speed system clock oscillation frequency (AMPH) */ |
||||
|
#define _00_CGC_SYSOSC_DEFAULT (0x00U) |
||||
|
#define _00_CGC_SYSOSC_UNDER10M (0x00U) /* fX <= 10MHz */ |
||||
|
#define _01_CGC_SYSOSC_OVER10M (0x01U) /* fX > 10MHz */ |
||||
|
|
||||
|
/*
|
||||
|
Clock operation status control register (CSC) |
||||
|
*/ |
||||
|
/* Control of high-speed system clock operation (MSTOP) */ |
||||
|
#define _00_CGC_HISYS_OPER (0x00U) /* X1 oscillator/external clock operating */ |
||||
|
#define _80_CGC_HISYS_STOP (0x80U) /* X1 oscillator/external clock stopped */ |
||||
|
/* Subsystem clock operation (XTSTOP) */ |
||||
|
#define _00_CGC_SUB_OPER (0x00U) /* XT1 oscillator operating */ |
||||
|
#define _40_CGC_SUB_STOP (0x40U) /* XT1 oscillator stopped */ |
||||
|
/* High-speed OCO operation (HIOSTOP) */ |
||||
|
#define _00_CGC_HIO_OPER (0x00U) /* high-speed OCO operating */ |
||||
|
#define _01_CGC_HIO_STOP (0x01U) /* high-speed OCO stopped */ |
||||
|
|
||||
|
/*
|
||||
|
Oscillation stabilization time counter status register (OSTC) |
||||
|
*/ |
||||
|
/* Oscillation stabilization time status (MOST18 - MOST8) */ |
||||
|
#define _00_CGC_OSCSTAB_STA0 (0x00U) /* < 2^8/fX */ |
||||
|
#define _80_CGC_OSCSTAB_STA8 (0x80U) /* 2^8/fX */ |
||||
|
#define _C0_CGC_OSCSTAB_STA9 (0xC0U) /* 2^9/fX */ |
||||
|
#define _E0_CGC_OSCSTAB_STA10 (0xE0U) /* 2^10/fX */ |
||||
|
#define _F0_CGC_OSCSTAB_STA11 (0xF0U) /* 2^11/fX */ |
||||
|
#define _F8_CGC_OSCSTAB_STA13 (0xF8U) /* 2^13/fX */ |
||||
|
#define _FC_CGC_OSCSTAB_STA15 (0xFCU) /* 2^15/fX */ |
||||
|
#define _FE_CGC_OSCSTAB_STA17 (0xFEU) /* 2^17/fX */ |
||||
|
#define _FF_CGC_OSCSTAB_STA18 (0xFFU) /* 2^18/fX */ |
||||
|
|
||||
|
/*
|
||||
|
Oscillation stabilization time select register (OSTS) |
||||
|
*/ |
||||
|
/* Oscillation stabilization time selection (OSTS2 - OSTS0) */ |
||||
|
#define _00_CGC_OSCSTAB_SEL8 (0x00U) /* 2^8/fX */ |
||||
|
#define _01_CGC_OSCSTAB_SEL9 (0x01U) /* 2^9/fX */ |
||||
|
#define _02_CGC_OSCSTAB_SEL10 (0x02U) /* 2^10/fX */ |
||||
|
#define _03_CGC_OSCSTAB_SEL11 (0x03U) /* 2^11/fX */ |
||||
|
#define _04_CGC_OSCSTAB_SEL13 (0x04U) /* 2^13/fX */ |
||||
|
#define _05_CGC_OSCSTAB_SEL15 (0x05U) /* 2^15/fX */ |
||||
|
#define _06_CGC_OSCSTAB_SEL17 (0x06U) /* 2^17/fX */ |
||||
|
#define _07_CGC_OSCSTAB_SEL18 (0x07U) /* 2^18/fX */ |
||||
|
|
||||
|
/*
|
||||
|
PLL control register (PLLCTL) |
||||
|
*/ |
||||
|
/* Lockup wait counter setting value */ |
||||
|
#define _00_CGC_LOCKUP_WAIT_7 (0x00U) /* 2^7/fMAIN */ |
||||
|
#define _40_CGC_LOCKUP_WAIT_8 (0x40U) /* 2^8/fMAIN */ |
||||
|
#define _80_CGC_LOCKUP_WAIT_9 (0x80U) /* 2^9/fMAIN */ |
||||
|
/* PLL output clock selection (PLLDIV1) */ |
||||
|
#define _00_CGC_PLL_BELOW_32MHZ (0x00U) /* when fMAIN <= 32 MHz */ |
||||
|
#define _20_CGC_PLL_ABOVE_32MHZ (0x20U) /* when fMAIN > 32 MHz */ |
||||
|
/* PLL output clock division selection (PLLDIV0) */ |
||||
|
#define _00_CGC_PLL_DIVISION_2 (0x00U) /* divides the clock frequency by 2 */ |
||||
|
#define _10_CGC_PLL_DIVISION_4 (0x10U) /* divides the clock frequency by 4 */ |
||||
|
/* Clock mode selection (SELPLL) */ |
||||
|
#define _00_CGC_NOSEL_PLL (0x00U) /* clock through mode */ |
||||
|
#define _04_CGC_SEL_PLL (0x04U) /* PLL clock select mode */ |
||||
|
/* PLL output clock (fPLLO) multiplier selection (PLLMUL) */ |
||||
|
#define _00_CGC_PLL_MULTIPLY_X12 (0x00U) /* clock through mode */ |
||||
|
#define _02_CGC_PLL_MULTIPLY_X16 (0x02U) /* PLL clock select mode */ |
||||
|
/* Operating or stopping PLL function (PLLON) */ |
||||
|
#define _00_CGC_PLL_STOP (0x00U) /* PLL operating stopped */ |
||||
|
#define _01_CGC_PLL_ENABLE (0x01U) /* PLL operating */ |
||||
|
|
||||
|
/*
|
||||
|
PLL status register (PLLSTS) |
||||
|
*/ |
||||
|
/* PLL lock state */ |
||||
|
#define _00_CGC_PLL_UNLOCKED (0x00U) /* Unlocked state */ |
||||
|
#define _80_CGC_PLL_LOCKED (0x80U) /* Locked state */ |
||||
|
|
||||
|
/*
|
||||
|
FMP clock selection division register (MDIV) |
||||
|
*/ |
||||
|
/* Division of PLL clock (fMP) */ |
||||
|
#define _00_CGC_FMP_DIV_DEFAULT (0x00U) /* fMP (default) */ |
||||
|
#define _01_CGC_FMP_DIV_1 (0x01U) /* fMP/2^1 */ |
||||
|
#define _02_CGC_FMP_DIV_2 (0x02U) /* fMP/2^2 */ |
||||
|
#define _03_CGC_FMP_DIV_3 (0x03U) /* fMP/2^3 */ |
||||
|
#define _04_CGC_FMP_DIV_4 (0x04U) /* fMP/2^4 */ |
||||
|
#define _05_CGC_FMP_DIV_5 (0x05U) /* fMP/2^5 */ |
||||
|
#define _06_CGC_FMP_DIV_6 (0x06U) /* fMP/2^6 */ |
||||
|
|
||||
|
/*
|
||||
|
System clock control register (CKC) |
||||
|
*/ |
||||
|
/* Status of CPU/peripheral hardware clock fCLK (CLS) */ |
||||
|
#define _00_CGC_CPUCLK_MAIN (0x00U) /* main system clock (fMAIN) */ |
||||
|
#define _80_CGC_CPUCLK_SUB (0x80U) /* subsystem clock (fSUB) */ |
||||
|
/* Selection of CPU/peripheral hardware clock fCLK (CSS) */ |
||||
|
#define _00_CGC_CPUCLK_SELMAIN (0x00U) /* main system clock (fMAIN) */ |
||||
|
#define _40_CGC_CPUCLK_SELSUB (0x40U) /* subsystem clock (fSUB) */ |
||||
|
/* Status of Main system clock fMAIN (MCS) */ |
||||
|
#define _00_CGC_MAINCLK_HIO (0x00U) /* high-speed OCO clock (fIH) */ |
||||
|
#define _20_CGC_MAINCLK_HISYS (0x20U) /* high-speed system clock (fMX) */ |
||||
|
/* Selection of Main system clock fMAIN (MCM0) */ |
||||
|
#define _00_CGC_MAINCLK_SELHIO (0x00U) /* high-speed OCO clock (fIH) */ |
||||
|
#define _10_CGC_MAINCLK_SELHISYS (0x10U) /* high-speed system clock (fMX) */ |
||||
|
|
||||
|
/*
|
||||
|
Operation speed mode control register (OSMC) |
||||
|
*/ |
||||
|
/* Setting in subsystem clock HALT mode (RTCLPC) */ |
||||
|
#define _00_CGC_SUBINHALT_ON (0x00U) /* enables supply of subsystem clock to peripheral functions */ |
||||
|
#define _80_CGC_SUBINHALT_OFF (0x80U) /* stops supply to peripheral functions other than RTC and interval timer */ |
||||
|
/* RTC macro operation clock (WUTMMCK0) */ |
||||
|
#define _00_CGC_RTC_CLK_OTHER (0x00U) /* Other than fIL */ |
||||
|
#define _10_CGC_RTC_CLK_FIL (0x10U) /* use fIL clock */ |
||||
|
|
||||
|
/*
|
||||
|
Illegal memory access detection control register (IAWCTL) |
||||
|
*/ |
||||
|
/* Illegal memory access detection control (IAWEN) */ |
||||
|
#define _00_CGC_ILLEGAL_ACCESS_OFF (0x00U) /* disables illegal memory access detection */ |
||||
|
#define _80_CGC_ILLEGAL_ACCESS_ON (0x80U) /* enables illegal memory access detection */ |
||||
|
/* RAM guard area (GRAM1, GRAM0) */ |
||||
|
#define _00_CGC_RAM_GUARD_OFF (0x00U) /* invalid, it is possible to write RAM */ |
||||
|
#define _10_CGC_RAM_GUARD_AREA0 (0x10U) /* 128 bytes from RAM bottom address */ |
||||
|
#define _20_CGC_RAM_GUARD_AREA1 (0x20U) /* 256 bytes from RAM bottom address */ |
||||
|
#define _30_CGC_RAM_GUARD_AREA2 (0x30U) /* 512 bytes from RAM bottom address */ |
||||
|
/* PORT register guard (GPORT) */ |
||||
|
#define _00_CGC_PORT_GUARD_OFF (0x00U) /* invalid, it is possible to write PORT register */ |
||||
|
#define _04_CGC_PORT_GUARD_ON (0x04U) /* valid, it is impossible to write PORT register, but possible for read */ |
||||
|
/* Interrupt register guard (GINT) */ |
||||
|
#define _00_CGC_INT_GUARD_OFF (0x00U) /* invalid, it is possible to write interrupt register */ |
||||
|
#define _02_CGC_INT_GUARD_ON (0x02U) /* valid, it is impossible to write , but possible for read */ |
||||
|
/* CSC register guard (GCSC) */ |
||||
|
#define _00_CGC_CSC_GUARD_OFF (0x00U) /* invalid, it is possible to write CSC register */ |
||||
|
#define _01_CGC_CSC_GUARD_ON (0x01U) /* valid, it is impossible to write CSC register, but possible for read */ |
||||
|
|
||||
|
/*
|
||||
|
RTC clock selection register (RTCCL) |
||||
|
*/ |
||||
|
/* Operation clock source selection for RTC (RTCCL7) */ |
||||
|
#define _00_CGC_RTC_FMX (0x00U) /* RTC uses External Main clock (fMX) */ |
||||
|
#define _80_CGC_RTC_FIH (0x80U) /* RTC uses Internal high speed clock (fIH) */ |
||||
|
/* Operation selection of RTC macro (RTCCL6,RTCCKS1 - RTCCKS0) */ |
||||
|
#define _00_CGC_RTC_FSUB (0x00U) /* RTC uses sub clock */ |
||||
|
#define _02_CGC_RTC_DIV128 (0x02U) /* RTC uses high-speed clock / 128 */ |
||||
|
#define _03_CGC_RTC_DIV256 (0x03U) /* RTC uses high-speed clock / 256 */ |
||||
|
#define _42_CGC_RTC_DIV122 (0x42U) /* RTC uses high-speed clock / 122 */ |
||||
|
#define _43_CGC_RTC_DIV244 (0x43U) /* RTC uses high-speed clock / 244 */ |
||||
|
|
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Macro definitions |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Typedef definitions |
||||
|
***********************************************************************************************************************/ |
||||
|
typedef enum |
||||
|
{ |
||||
|
HIOCLK, |
||||
|
SYSX1CLK, |
||||
|
SYSEXTCLK, |
||||
|
SUBXT1CLK, |
||||
|
SUBEXTCLK |
||||
|
} clock_mode_t; |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global functions |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_CGC_Create(void); |
||||
|
void R_CGC_Get_ResetSource(void); |
||||
|
|
||||
|
/* Start user code for function. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#endif |
||||
@ -0,0 +1,64 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_cgc_user.c |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements device driver for CGC module. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Includes |
||||
|
***********************************************************************************************************************/ |
||||
|
#include "r_cg_macrodriver.h" |
||||
|
#include "r_cg_cgc.h" |
||||
|
/* Start user code for include. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#include "r_cg_userdefine.h" |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Pragma directive |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for pragma. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global variables and functions |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for global. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_CGC_Get_ResetSource |
||||
|
* Description : This function process of Reset. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_CGC_Get_ResetSource(void) |
||||
|
{ |
||||
|
uint8_t reset_flag = RESF; |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/* Start user code for adding. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
@ -0,0 +1,89 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_macrodriver.h |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements general head file. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
#ifndef STATUS_H |
||||
|
#define STATUS_H |
||||
|
/***********************************************************************************************************************
|
||||
|
Includes |
||||
|
***********************************************************************************************************************/ |
||||
|
#include "iodefine.h" |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Macro definitions (Register bit) |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Macro definitions |
||||
|
***********************************************************************************************************************/ |
||||
|
#ifndef __TYPEDEF__ |
||||
|
#define DI __DI |
||||
|
#define EI __EI |
||||
|
#define HALT __halt |
||||
|
#define NOP __nop |
||||
|
#define STOP __stop |
||||
|
#define BRK __brk |
||||
|
|
||||
|
/* Status list definition */ |
||||
|
#define MD_STATUSBASE 0x00U |
||||
|
#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */ |
||||
|
#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */ |
||||
|
#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */ |
||||
|
#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */ |
||||
|
#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */ |
||||
|
#define MD_OVERRUN (MD_STATUSBASE + 0x05U) /* IIC OVERRUN occur */ |
||||
|
|
||||
|
/* Error list definition */ |
||||
|
#define MD_ERRORBASE 0x80U |
||||
|
#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */ |
||||
|
#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error agrument input error */ |
||||
|
#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */ |
||||
|
#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */ |
||||
|
#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */ |
||||
|
#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */ |
||||
|
#define MD_DATAEXISTS (MD_ERRORBASE + 0x06U) /* data to be transferred next exists in TXBn register */ |
||||
|
#endif |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Typedef definitions |
||||
|
***********************************************************************************************************************/ |
||||
|
#ifndef __TYPEDEF__ |
||||
|
typedef signed char int8_t; |
||||
|
typedef unsigned char uint8_t; |
||||
|
typedef signed short int16_t; |
||||
|
typedef unsigned short uint16_t; |
||||
|
typedef signed long int32_t; |
||||
|
typedef unsigned long uint32_t; |
||||
|
typedef unsigned short MD_STATUS; |
||||
|
#define __TYPEDEF__ |
||||
|
#endif |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global functions |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
#endif |
||||
@ -0,0 +1,530 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_serial.c |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements device driver for Serial module. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Includes |
||||
|
***********************************************************************************************************************/ |
||||
|
#include "r_cg_macrodriver.h" |
||||
|
#include "r_cg_serial.h" |
||||
|
/* Start user code for include. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#include "r_cg_userdefine.h" |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Pragma directive |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for pragma. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global variables and functions |
||||
|
***********************************************************************************************************************/ |
||||
|
volatile uint8_t * gp_uart0_tx_address; /* uart0 transmit buffer address */ |
||||
|
volatile uint16_t g_uart0_tx_count; /* uart0 transmit data number */ |
||||
|
volatile uint8_t * gp_uart0_rx_address; /* uart0 receive buffer address */ |
||||
|
volatile uint16_t g_uart0_rx_count; /* uart0 receive data number */ |
||||
|
volatile uint16_t g_uart0_rx_length; /* uart0 receive data length */ |
||||
|
volatile uint8_t * gp_uart1_tx_address; /* uart1 transmit buffer address */ |
||||
|
volatile uint16_t g_uart1_tx_count; /* uart1 transmit data number */ |
||||
|
volatile uint8_t * gp_uart1_rx_address; /* uart1 receive buffer address */ |
||||
|
volatile uint16_t g_uart1_rx_count; /* uart1 receive data number */ |
||||
|
volatile uint16_t g_uart1_rx_length; /* uart1 receive data length */ |
||||
|
volatile uint8_t g_iica0_master_status_flag; /* iica0 master flag */ |
||||
|
volatile uint8_t g_iica0_slave_status_flag; /* iica0 slave flag */ |
||||
|
volatile uint8_t * gp_iica0_rx_address; /* iica0 receive buffer address */ |
||||
|
volatile uint16_t g_iica0_rx_len; /* iica0 receive data length */ |
||||
|
volatile uint16_t g_iica0_rx_cnt; /* iica0 receive data count */ |
||||
|
volatile uint8_t * gp_iica0_tx_address; /* iica0 send buffer address */ |
||||
|
volatile uint16_t g_iica0_tx_cnt; /* iica0 send data count */ |
||||
|
/* Start user code for global. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_SAU0_Create |
||||
|
* Description : This function initializes the SAU0 module. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_SAU0_Create(void) |
||||
|
{ |
||||
|
SAU0EN = 1U; /* supply SAU0 clock */ |
||||
|
NOP(); |
||||
|
NOP(); |
||||
|
NOP(); |
||||
|
NOP(); |
||||
|
SPS0 = _0004_SAU_CK00_FCLK_4 | _0040_SAU_CK01_FCLK_4; |
||||
|
R_UART0_Create(); |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART0_Create |
||||
|
* Description : This function initializes the UART0 module. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_UART0_Create(void) |
||||
|
{ |
||||
|
ST0 |= _0002_SAU_CH1_STOP_TRG_ON | _0001_SAU_CH0_STOP_TRG_ON; /* disable UART0 receive and transmit */ |
||||
|
STMK0 = 1U; /* disable INTST0 interrupt */ |
||||
|
STIF0 = 0U; /* clear INTST0 interrupt flag */ |
||||
|
SRMK0 = 1U; /* disable INTSR0 interrupt */ |
||||
|
SRIF0 = 0U; /* clear INTSR0 interrupt flag */ |
||||
|
/* Set INTST0 low priority */ |
||||
|
STPR10 = 1U; |
||||
|
STPR00 = 1U; |
||||
|
/* Set INTSR0 low priority */ |
||||
|
SRPR10 = 1U; |
||||
|
SRPR00 = 1U; |
||||
|
SMR00 = _0020_SAU_SMRMN_INITIALVALUE | _0000_SAU_CLOCK_SELECT_CK00 | _0000_SAU_TRIGGER_SOFTWARE | |
||||
|
_0002_SAU_MODE_UART | _0000_SAU_TRANSFER_END; |
||||
|
SCR00 = _8000_SAU_TRANSMISSION | _0000_SAU_PARITY_NONE | _0080_SAU_LSB | _0010_SAU_STOP_1 | _0007_SAU_LENGTH_8; |
||||
|
SDR00 = _CE00_UART0_TRANSMIT_DIVISOR; |
||||
|
NFEN0 |= _01_SAU_RXD0_FILTER_ON; |
||||
|
SIR01 = _0004_SAU_SIRMN_FECTMN | _0002_SAU_SIRMN_PECTMN | _0001_SAU_SIRMN_OVCTMN; /* clear error flag */ |
||||
|
SMR01 = _0020_SAU_SMRMN_INITIALVALUE | _0000_SAU_CLOCK_SELECT_CK00 | _0100_SAU_TRIGGER_RXD | _0000_SAU_EDGE_FALL | |
||||
|
_0002_SAU_MODE_UART | _0000_SAU_TRANSFER_END; |
||||
|
SCR01 = _4000_SAU_RECEPTION | _0000_SAU_PARITY_NONE | _0080_SAU_LSB | _0010_SAU_STOP_1 | _0007_SAU_LENGTH_8; |
||||
|
SDR01 = _CE00_UART0_RECEIVE_DIVISOR; |
||||
|
SO0 |= _0001_SAU_CH0_DATA_OUTPUT_1; |
||||
|
SOL0 |= _0000_SAU_CHANNEL0_NORMAL; /* output level normal */ |
||||
|
SOE0 |= _0001_SAU_CH0_OUTPUT_ENABLE; /* enable UART0 output */ |
||||
|
/* Set RxD0 pin */ |
||||
|
PM1 |= 0x40U; |
||||
|
/* Set TxD0 pin */ |
||||
|
P1 |= 0x20U; |
||||
|
PM1 &= 0xDFU; |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART0_Start |
||||
|
* Description : This function starts the UART0 module operation. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_UART0_Start(void) |
||||
|
{ |
||||
|
SO0 |= _0001_SAU_CH0_DATA_OUTPUT_1; /* output level normal */ |
||||
|
SOE0 |= _0001_SAU_CH0_OUTPUT_ENABLE; /* enable UART0 output */ |
||||
|
SS0 |= _0002_SAU_CH1_START_TRG_ON | _0001_SAU_CH0_START_TRG_ON; /* enable UART0 receive and transmit */ |
||||
|
STIF0 = 0U; /* clear INTST0 interrupt flag */ |
||||
|
SRIF0 = 0U; /* clear INTSR0 interrupt flag */ |
||||
|
STMK0 = 0U; /* enable INTST0 interrupt */ |
||||
|
SRMK0 = 0U; /* enable INTSR0 interrupt */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART0_Stop |
||||
|
* Description : This function stops the UART0 module operation. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_UART0_Stop(void) |
||||
|
{ |
||||
|
STMK0 = 1U; /* disable INTST0 interrupt */ |
||||
|
SRMK0 = 1U; /* disable INTSR0 interrupt */ |
||||
|
ST0 |= _0002_SAU_CH1_STOP_TRG_ON | _0001_SAU_CH0_STOP_TRG_ON; /* disable UART0 receive and transmit */ |
||||
|
SOE0 &= ~_0001_SAU_CH0_OUTPUT_ENABLE; /* disable UART0 output */ |
||||
|
STIF0 = 0U; /* clear INTST0 interrupt flag */ |
||||
|
SRIF0 = 0U; /* clear INTSR0 interrupt flag */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART0_Receive |
||||
|
* Description : This function receives UART0 data. |
||||
|
* Arguments : rx_buf - |
||||
|
* receive buffer pointer |
||||
|
* rx_num - |
||||
|
* buffer size |
||||
|
* Return Value : status - |
||||
|
* MD_OK or MD_ARGERROR |
||||
|
***********************************************************************************************************************/ |
||||
|
MD_STATUS R_UART0_Receive(uint8_t * const rx_buf, uint16_t rx_num) |
||||
|
{ |
||||
|
MD_STATUS status = MD_OK; |
||||
|
|
||||
|
if (rx_num < 1U) |
||||
|
{ |
||||
|
status = MD_ARGERROR; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
g_uart0_rx_count = 0U; |
||||
|
g_uart0_rx_length = rx_num; |
||||
|
gp_uart0_rx_address = rx_buf; |
||||
|
} |
||||
|
|
||||
|
return (status); |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART0_Send |
||||
|
* Description : This function sends UART0 data. |
||||
|
* Arguments : tx_buf - |
||||
|
* transfer buffer pointer |
||||
|
* tx_num - |
||||
|
* buffer size |
||||
|
* Return Value : status - |
||||
|
* MD_OK or MD_ARGERROR |
||||
|
***********************************************************************************************************************/ |
||||
|
MD_STATUS R_UART0_Send(uint8_t * const tx_buf, uint16_t tx_num) |
||||
|
{ |
||||
|
MD_STATUS status = MD_OK; |
||||
|
|
||||
|
if (tx_num < 1U) |
||||
|
{ |
||||
|
status = MD_ARGERROR; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
gp_uart0_tx_address = tx_buf; |
||||
|
g_uart0_tx_count = tx_num; |
||||
|
STMK0 = 1U; /* disable INTST0 interrupt */ |
||||
|
SDR00L = *gp_uart0_tx_address; |
||||
|
gp_uart0_tx_address++; |
||||
|
g_uart0_tx_count--; |
||||
|
STMK0 = 0U; /* enable INTST0 interrupt */ |
||||
|
} |
||||
|
|
||||
|
return (status); |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_SAU1_Create |
||||
|
* Description : This function initializes the SAU1 module. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_SAU1_Create(void) |
||||
|
{ |
||||
|
SAU1EN = 1U; /* supply SAU1 clock */ |
||||
|
NOP(); |
||||
|
NOP(); |
||||
|
NOP(); |
||||
|
NOP(); |
||||
|
SPS1 = _0004_SAU_CK00_FCLK_4 | _0040_SAU_CK01_FCLK_4; |
||||
|
R_UART1_Create(); |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART1_Create |
||||
|
* Description : This function initializes the UART1 module. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_UART1_Create(void) |
||||
|
{ |
||||
|
ST1 |= _0002_SAU_CH1_STOP_TRG_ON | _0001_SAU_CH0_STOP_TRG_ON; /* disable UART1 receive and transmit */ |
||||
|
STMK1 = 1U; /* disable INTST1 interrupt */ |
||||
|
STIF1 = 0U; /* clear INTST1 interrupt flag */ |
||||
|
SRMK1 = 1U; /* disable INTSR1 interrupt */ |
||||
|
SRIF1 = 0U; /* clear INTSR1 interrupt flag */ |
||||
|
/* Set INTST1 low priority */ |
||||
|
STPR11 = 1U; |
||||
|
STPR01 = 1U; |
||||
|
/* Set INTSR1 low priority */ |
||||
|
SRPR11 = 1U; |
||||
|
SRPR01 = 1U; |
||||
|
SMR10 = _0020_SAU_SMRMN_INITIALVALUE | _0000_SAU_CLOCK_SELECT_CK00 | _0000_SAU_TRIGGER_SOFTWARE | |
||||
|
_0002_SAU_MODE_UART | _0000_SAU_TRANSFER_END; |
||||
|
SCR10 = _8000_SAU_TRANSMISSION | _0000_SAU_PARITY_NONE | _0080_SAU_LSB | _0010_SAU_STOP_1 | _0007_SAU_LENGTH_8; |
||||
|
SDR10 = _CE00_UART1_TRANSMIT_DIVISOR; |
||||
|
NFEN0 |= _04_SAU_RXD1_FILTER_ON; |
||||
|
SIR11 = _0004_SAU_SIRMN_FECTMN | _0002_SAU_SIRMN_PECTMN | _0001_SAU_SIRMN_OVCTMN; /* clear error flag */ |
||||
|
SMR11 = _0020_SAU_SMRMN_INITIALVALUE | _0000_SAU_CLOCK_SELECT_CK00 | _0100_SAU_TRIGGER_RXD | _0000_SAU_EDGE_FALL | |
||||
|
_0002_SAU_MODE_UART | _0000_SAU_TRANSFER_END; |
||||
|
SCR11 = _4000_SAU_RECEPTION | _0000_SAU_PARITY_NONE | _0080_SAU_LSB | _0010_SAU_STOP_1 | _0007_SAU_LENGTH_8; |
||||
|
SDR11 = _CE00_UART1_RECEIVE_DIVISOR; |
||||
|
SO1 |= _0001_SAU_CH0_DATA_OUTPUT_1; |
||||
|
SOL1 |= _0000_SAU_CHANNEL0_NORMAL; /* output level normal */ |
||||
|
SOE1 |= _0001_SAU_CH0_OUTPUT_ENABLE; /* enable UART1 output */ |
||||
|
/* Set RxD1 pin */ |
||||
|
PM1 |= 0x02U; |
||||
|
/* Set TxD1 pin */ |
||||
|
P1 |= 0x04U; |
||||
|
PM1 &= 0xFBU; |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART1_Start |
||||
|
* Description : This function starts the UART1 module operation. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_UART1_Start(void) |
||||
|
{ |
||||
|
SO1 |= _0001_SAU_CH0_DATA_OUTPUT_1; /* output level normal */ |
||||
|
SOE1 |= _0001_SAU_CH0_OUTPUT_ENABLE; /* enable UART1 output */ |
||||
|
SS1 |= _0002_SAU_CH1_START_TRG_ON | _0001_SAU_CH0_START_TRG_ON; /* enable UART1 receive and transmit */ |
||||
|
STIF1 = 0U; /* clear INTST1 interrupt flag */ |
||||
|
SRIF1 = 0U; /* clear INTSR1 interrupt flag */ |
||||
|
STMK1 = 0U; /* enable INTST1 interrupt */ |
||||
|
SRMK1 = 0U; /* enable INTSR1 interrupt */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART1_Stop |
||||
|
* Description : This function stops the UART1 module operation. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_UART1_Stop(void) |
||||
|
{ |
||||
|
STMK1 = 1U; /* disable INTST1 interrupt */ |
||||
|
SRMK1 = 1U; /* disable INTSR1 interrupt */ |
||||
|
ST1 |= _0002_SAU_CH1_STOP_TRG_ON | _0001_SAU_CH0_STOP_TRG_ON; /* disable UART1 receive and transmit */ |
||||
|
SOE1 &= ~_0001_SAU_CH0_OUTPUT_ENABLE; /* disable UART1 output */ |
||||
|
STIF1 = 0U; /* clear INTST1 interrupt flag */ |
||||
|
SRIF1 = 0U; /* clear INTSR1 interrupt flag */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART1_Receive |
||||
|
* Description : This function receives UART1 data. |
||||
|
* Arguments : rx_buf - |
||||
|
* receive buffer pointer |
||||
|
* rx_num - |
||||
|
* buffer size |
||||
|
* Return Value : status - |
||||
|
* MD_OK or MD_ARGERROR |
||||
|
***********************************************************************************************************************/ |
||||
|
MD_STATUS R_UART1_Receive(uint8_t * const rx_buf, uint16_t rx_num) |
||||
|
{ |
||||
|
MD_STATUS status = MD_OK; |
||||
|
|
||||
|
if (rx_num < 1U) |
||||
|
{ |
||||
|
status = MD_ARGERROR; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
g_uart1_rx_count = 0U; |
||||
|
g_uart1_rx_length = rx_num; |
||||
|
gp_uart1_rx_address = rx_buf; |
||||
|
} |
||||
|
|
||||
|
return (status); |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_UART1_Send |
||||
|
* Description : This function sends UART1 data. |
||||
|
* Arguments : tx_buf - |
||||
|
* transfer buffer pointer |
||||
|
* tx_num - |
||||
|
* buffer size |
||||
|
* Return Value : status - |
||||
|
* MD_OK or MD_ARGERROR |
||||
|
***********************************************************************************************************************/ |
||||
|
MD_STATUS R_UART1_Send(uint8_t * const tx_buf, uint16_t tx_num) |
||||
|
{ |
||||
|
MD_STATUS status = MD_OK; |
||||
|
|
||||
|
if (tx_num < 1U) |
||||
|
{ |
||||
|
status = MD_ARGERROR; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
gp_uart1_tx_address = tx_buf; |
||||
|
g_uart1_tx_count = tx_num; |
||||
|
STMK1 = 1U; /* disable INTST1 interrupt */ |
||||
|
SDR10L = *gp_uart1_tx_address; |
||||
|
gp_uart1_tx_address++; |
||||
|
g_uart1_tx_count--; |
||||
|
STMK1 = 0U; /* enable INTST1 interrupt */ |
||||
|
} |
||||
|
|
||||
|
return (status); |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_IICA0_Create |
||||
|
* Description : This function initializes the IICA0 module. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_IICA0_Create(void) |
||||
|
{ |
||||
|
IICA0EN = 1U; /* supply IICA0 clock */ |
||||
|
IICE0 = 0U; /* disable IICA0 operation */ |
||||
|
IICAMK0 = 1U; /* disable INTIICA0 interrupt */ |
||||
|
IICAIF0 = 0U; /* clear INTIICA0 interrupt flag */ |
||||
|
/* Set INTIICA0 low priority */ |
||||
|
IICAPR10 = 1U; |
||||
|
IICAPR00 = 1U; |
||||
|
/* Set SCLA0, SDAA0 pin */ |
||||
|
P6 &= 0xF3U; |
||||
|
PM6 |= 0x0CU; |
||||
|
SMC0 = 0U; |
||||
|
IICWL0 = _4C_IICA0_IICWL_VALUE; |
||||
|
IICWH0 = _55_IICA0_IICWH_VALUE; |
||||
|
IICCTL01 |= _01_IICA_fCLK_HALF; |
||||
|
SVA0 = _10_IICA0_MASTERADDRESS; |
||||
|
STCEN0 = 1U; |
||||
|
IICRSV0 = 1U; |
||||
|
SPIE0 = 0U; |
||||
|
WTIM0 = 1U; |
||||
|
ACKE0 = 1U; |
||||
|
IICAMK0 = 0U; |
||||
|
IICE0 = 1U; |
||||
|
LREL0 = 1U; |
||||
|
/* Set SCLA0, SDAA0 pin */ |
||||
|
PM6 &= 0xF3U; |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_IICA0_Stop |
||||
|
* Description : This function stops IICA0 module operation. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_IICA0_Stop(void) |
||||
|
{ |
||||
|
IICE0 = 0U; /* disable IICA0 operation */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_IICA0_StopCondition |
||||
|
* Description : This function sets IICA0 stop condition flag. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_IICA0_StopCondition(void) |
||||
|
{ |
||||
|
SPT0 = 1U; /* set stop condition flag */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_IICA0_Master_Send |
||||
|
* Description : This function starts to send data as master mode. |
||||
|
* Arguments : adr - |
||||
|
* send address |
||||
|
* tx_buf - |
||||
|
* transfer buffer pointer |
||||
|
* tx_num - |
||||
|
* buffer size |
||||
|
* wait - |
||||
|
* wait for start condition |
||||
|
* Return Value : status - |
||||
|
* MD_OK or MD_ERROR1 or MD_ERROR2 |
||||
|
***********************************************************************************************************************/ |
||||
|
MD_STATUS R_IICA0_Master_Send(uint8_t adr, uint8_t * const tx_buf, uint16_t tx_num, uint8_t wait) |
||||
|
{ |
||||
|
MD_STATUS status = MD_OK; |
||||
|
|
||||
|
IICAMK0 = 1U; /* disable INTIICA0 interrupt */ |
||||
|
|
||||
|
if ((1U == IICBSY0) && (0U == MSTS0)) |
||||
|
{ |
||||
|
/* Check bus busy */ |
||||
|
IICAMK0 = 0U; /* enable INTIICA0 interrupt */ |
||||
|
status = MD_ERROR1; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
STT0 = 1U; /* send IICA0 start condition */ |
||||
|
IICAMK0 = 0U; /* enable INTIICA0 interrupt */ |
||||
|
|
||||
|
/* Wait */ |
||||
|
while (wait--) |
||||
|
{ |
||||
|
; |
||||
|
} |
||||
|
|
||||
|
if (0U == STD0) |
||||
|
{ |
||||
|
status = MD_ERROR2; |
||||
|
} |
||||
|
|
||||
|
/* Set parameter */ |
||||
|
g_iica0_tx_cnt = tx_num; |
||||
|
gp_iica0_tx_address = tx_buf; |
||||
|
g_iica0_master_status_flag = _00_IICA_MASTER_FLAG_CLEAR; |
||||
|
adr &= (uint8_t)~0x01U; /* set send mode */ |
||||
|
IICA0 = adr; /* send address */ |
||||
|
} |
||||
|
|
||||
|
return (status); |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_IICA0_Master_Receive |
||||
|
* Description : This function starts to receive IICA0 data as master mode. |
||||
|
* Arguments : adr - |
||||
|
* receive address |
||||
|
* rx_buf - |
||||
|
* receive buffer pointer |
||||
|
* rx_num - |
||||
|
* buffer size |
||||
|
* wait - |
||||
|
* wait for start condition |
||||
|
* Return Value : status - |
||||
|
* MD_OK or MD_ERROR1 or MD_ERROR2 |
||||
|
***********************************************************************************************************************/ |
||||
|
MD_STATUS R_IICA0_Master_Receive(uint8_t adr, uint8_t * const rx_buf, uint16_t rx_num, uint8_t wait) |
||||
|
{ |
||||
|
MD_STATUS status = MD_OK; |
||||
|
|
||||
|
IICAMK0 = 1U; /* disable INTIIA0 interrupt */ |
||||
|
|
||||
|
if ((1U == IICBSY0) && (0U == MSTS0)) |
||||
|
{ |
||||
|
/* Check bus busy */ |
||||
|
IICAMK0 = 0U; /* enable INTIIA0 interrupt */ |
||||
|
status = MD_ERROR1; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
STT0 = 1U; /* set IICA0 start condition */ |
||||
|
IICAMK0 = 0U; /* enable INTIIA0 interrupt */ |
||||
|
|
||||
|
/* Wait */ |
||||
|
while (wait--) |
||||
|
{ |
||||
|
; |
||||
|
} |
||||
|
|
||||
|
if (0U == STD0) |
||||
|
{ |
||||
|
status = MD_ERROR2; |
||||
|
} |
||||
|
|
||||
|
/* Set parameter */ |
||||
|
g_iica0_rx_len = rx_num; |
||||
|
g_iica0_rx_cnt = 0U; |
||||
|
gp_iica0_rx_address = rx_buf; |
||||
|
g_iica0_master_status_flag = _00_IICA_MASTER_FLAG_CLEAR; |
||||
|
adr |= 0x01U; /* set receive mode */ |
||||
|
IICA0 = adr; /* receive address */ |
||||
|
} |
||||
|
|
||||
|
return (status); |
||||
|
} |
||||
|
|
||||
|
/* Start user code for adding. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
@ -0,0 +1,399 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_serial.h |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements device driver for Serial module. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
#ifndef SERIAL_H |
||||
|
#define SERIAL_H |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Macro definitions (Register bit) |
||||
|
***********************************************************************************************************************/ |
||||
|
/*
|
||||
|
Serial Clock Select Register m (SPSm) |
||||
|
*/ |
||||
|
/* Section of operation clock (CKm0) (PRSm03 - PRSm00) */ |
||||
|
#define _0000_SAU_CK00_FCLK_0 (0x0000U) /* ck00 - fCLK */ |
||||
|
#define _0001_SAU_CK00_FCLK_1 (0x0001U) /* ck00 - fCLK/2^1 */ |
||||
|
#define _0002_SAU_CK00_FCLK_2 (0x0002U) /* ck00 - fCLK/2^2 */ |
||||
|
#define _0003_SAU_CK00_FCLK_3 (0x0003U) /* ck00 - fCLK/2^3 */ |
||||
|
#define _0004_SAU_CK00_FCLK_4 (0x0004U) /* ck00 - fCLK/2^4 */ |
||||
|
#define _0005_SAU_CK00_FCLK_5 (0x0005U) /* ck00 - fCLK/2^5 */ |
||||
|
#define _0006_SAU_CK00_FCLK_6 (0x0006U) /* ck00 - fCLK/2^6 */ |
||||
|
#define _0007_SAU_CK00_FCLK_7 (0x0007U) /* ck00 - fCLK/2^7 */ |
||||
|
#define _0008_SAU_CK00_FCLK_8 (0x0008U) /* ck00 - fCLK/2^8 */ |
||||
|
#define _0009_SAU_CK00_FCLK_9 (0x0009U) /* ck00 - fCLK/2^9 */ |
||||
|
#define _000A_SAU_CK00_FCLK_10 (0x000AU) /* ck00 - fCLK/2^10 */ |
||||
|
#define _000B_SAU_CK00_FCLK_11 (0x000BU) /* ck00 - fCLK/2^11 */ |
||||
|
#define _000C_SAU_CK00_FCLK_12 (0x000CU) /* ck00 - fCLK/2^12 */ |
||||
|
#define _000D_SAU_CK00_FCLK_13 (0x000DU) /* ck00 - fCLK/2^13 */ |
||||
|
#define _000E_SAU_CK00_FCLK_14 (0x000EU) /* ck00 - fCLK/2^14 */ |
||||
|
#define _000F_SAU_CK00_FCLK_15 (0x000FU) /* ck00 - fCLK/2^15 */ |
||||
|
/* Section of operation clock (CKm1) (PRSm13 - PRSm10) */ |
||||
|
#define _0000_SAU_CK01_FCLK_0 (0x0000U) /* ck01 - fCLK */ |
||||
|
#define _0010_SAU_CK01_FCLK_1 (0x0010U) /* ck01 - fCLK/2^1 */ |
||||
|
#define _0020_SAU_CK01_FCLK_2 (0x0020U) /* ck01 - fCLK/2^2 */ |
||||
|
#define _0030_SAU_CK01_FCLK_3 (0x0030U) /* ck01 - fCLK/2^3 */ |
||||
|
#define _0040_SAU_CK01_FCLK_4 (0x0040U) /* ck01 - fCLK/2^4 */ |
||||
|
#define _0050_SAU_CK01_FCLK_5 (0x0050U) /* ck01 - fCLK/2^5 */ |
||||
|
#define _0060_SAU_CK01_FCLK_6 (0x0060U) /* ck01 - fCLK/2^6 */ |
||||
|
#define _0070_SAU_CK01_FCLK_7 (0x0070U) /* ck01 - fCLK/2^7 */ |
||||
|
#define _0080_SAU_CK01_FCLK_8 (0x0080U) /* ck01 - fCLK/2^8 */ |
||||
|
#define _0090_SAU_CK01_FCLK_9 (0x0090U) /* ck01 - fCLK/2^9 */ |
||||
|
#define _00A0_SAU_CK01_FCLK_10 (0x00A0U) /* ck01 - fCLK/2^10 */ |
||||
|
#define _00B0_SAU_CK01_FCLK_11 (0x00B0U) /* ck01 - fCLK/2^11 */ |
||||
|
#define _00C0_SAU_CK01_FCLK_12 (0x00C0U) /* ck01 - fCLK/2^12 */ |
||||
|
#define _00D0_SAU_CK01_FCLK_13 (0x00D0U) /* ck01 - fCLK/2^13 */ |
||||
|
#define _00E0_SAU_CK01_FCLK_14 (0x00E0U) /* ck01 - fCLK/2^14 */ |
||||
|
#define _00F0_SAU_CK01_FCLK_15 (0x00F0U) /* ck01 - fCLK/2^15 */ |
||||
|
|
||||
|
/*
|
||||
|
Serial Mode Register mn (SMRmn) |
||||
|
*/ |
||||
|
#define _0020_SAU_SMRMN_INITIALVALUE (0x0020U) |
||||
|
/* Selection of macro clock (MCK) of channel n (CKSmn) */ |
||||
|
#define _0000_SAU_CLOCK_SELECT_CK00 (0x0000U) /* operation clock CK0 set by PRS register */ |
||||
|
#define _8000_SAU_CLOCK_SELECT_CK01 (0x8000U) /* operation clock CK1 set by PRS register */ |
||||
|
/* Selection of transfer clock (TCLK) of channel n (CCSmn) */ |
||||
|
#define _0000_SAU_CLOCK_MODE_CKS (0x0000U) /* divided operation clock MCK specified by CKSmn bit */ |
||||
|
#define _4000_SAU_CLOCK_MODE_TI0N (0x4000U) /* clock input from SCK pin (slave transfer in CSI mode) */ |
||||
|
/* Selection of start trigger source (STSmn) */ |
||||
|
#define _0000_SAU_TRIGGER_SOFTWARE (0x0000U) /* only software trigger is valid */ |
||||
|
#define _0100_SAU_TRIGGER_RXD (0x0100U) /* valid edge of RXD pin */ |
||||
|
/* Controls inversion of level of receive data of channel n in UART mode (SISmn0) */ |
||||
|
#define _0000_SAU_EDGE_FALL (0x0000U) /* falling edge is detected as the start bit */ |
||||
|
#define _0040_SAU_EDGE_RISING (0x0040U) /* rising edge is detected as the start bit */ |
||||
|
/* Setting of operation mode of channel n (MDmn2, MDmn1) */ |
||||
|
#define _0000_SAU_MODE_CSI (0x0000U) /* CSI mode */ |
||||
|
#define _0002_SAU_MODE_UART (0x0002U) /* UART mode */ |
||||
|
#define _0004_SAU_MODE_IIC (0x0004U) /* simplified IIC mode */ |
||||
|
/* Selection of interrupt source of channel n (MDmn0) */ |
||||
|
#define _0000_SAU_TRANSFER_END (0x0000U) /* transfer end interrupt */ |
||||
|
#define _0001_SAU_BUFFER_EMPTY (0x0001U) /* buffer empty interrupt */ |
||||
|
|
||||
|
/*
|
||||
|
Serial Communication Operation Setting Register mn (SCRmn) |
||||
|
*/ |
||||
|
/* Setting of operation mode of channel n (TXEmn, RXEmn) */ |
||||
|
#define _0000_SAU_NOT_COMMUNICATION (0x0000U) /* does not start communication */ |
||||
|
#define _4000_SAU_RECEPTION (0x4000U) /* reception only */ |
||||
|
#define _8000_SAU_TRANSMISSION (0x8000U) /* transmission only */ |
||||
|
#define _C000_SAU_RECEPTION_TRANSMISSION (0xC000U) /* reception and transmission */ |
||||
|
/* Selection of data and clock phase in CSI mode (DAPmn, CKPmn) */ |
||||
|
#define _0000_SAU_TIMING_1 (0x0000U) /* type 1 */ |
||||
|
#define _1000_SAU_TIMING_2 (0x1000U) /* type 2 */ |
||||
|
#define _2000_SAU_TIMING_3 (0x2000U) /* type 3 */ |
||||
|
#define _3000_SAU_TIMING_4 (0x3000U) /* type 4 */ |
||||
|
/* Setting of parity bit in UART mode (PTCmn1 - PTCmn0) */ |
||||
|
#define _0000_SAU_PARITY_NONE (0x0000U) /* none parity */ |
||||
|
#define _0100_SAU_PARITY_ZERO (0x0100U) /* zero parity */ |
||||
|
#define _0200_SAU_PARITY_EVEN (0x0200U) /* even parity */ |
||||
|
#define _0300_SAU_PARITY_ODD (0x0300U) /* odd parity */ |
||||
|
/* Selection of data transfer sequence in CSI and UART modes (DIRmn) */ |
||||
|
#define _0000_SAU_MSB (0x0000U) /* MSB */ |
||||
|
#define _0080_SAU_LSB (0x0080U) /* LSB */ |
||||
|
/* Setting of stop bit in UART mode (SLCmn1, SLCmn0) */ |
||||
|
#define _0000_SAU_STOP_NONE (0x0000U) /* none stop bit */ |
||||
|
#define _0010_SAU_STOP_1 (0x0010U) /* 1 stop bit */ |
||||
|
#define _0020_SAU_STOP_2 (0x0020U) /* 2 stop bits */ |
||||
|
/* Setting of data length in CSI and UART modes (DLSmn3 - DLSmn0) (m = 0, 1) */ |
||||
|
#define _0006_SAU_LENGTH_7 (0x0006U) /* 07-bit data length */ |
||||
|
#define _0007_SAU_LENGTH_8 (0x0007U) /* 08-bit data length */ |
||||
|
#define _0008_SAU_LENGTH_9 (0x0008U) /* 09-bit data length */ |
||||
|
#define _0009_SAU_LENGTH_10 (0x0009U) /* 10-bit data length */ |
||||
|
#define _000A_SAU_LENGTH_11 (0x000AU) /* 11-bit data length */ |
||||
|
#define _000B_SAU_LENGTH_12 (0x000BU) /* 12-bit data length */ |
||||
|
#define _000C_SAU_LENGTH_13 (0x000CU) /* 13-bit data length */ |
||||
|
#define _000D_SAU_LENGTH_14 (0x000DU) /* 14-bit data length */ |
||||
|
#define _000E_SAU_LENGTH_15 (0x000EU) /* 15-bit data length */ |
||||
|
#define _000F_SAU_LENGTH_16 (0x000FU) /* 16-bit data length */ |
||||
|
|
||||
|
/*
|
||||
|
Serial Output Level Register m (SOLm) |
||||
|
*/ |
||||
|
/* Selects inversion of the level of the transmit data of channel n in UART mode */ |
||||
|
#define _0000_SAU_CHANNEL0_NORMAL (0x0000U) /* normal bit level */ |
||||
|
#define _0001_SAU_CHANNEL0_INVERTED (0x0001U) /* inverted bit level */ |
||||
|
|
||||
|
/*
|
||||
|
Noise Filter Enable Register 0 (NFEN0) |
||||
|
*/ |
||||
|
/* Use of noise filter */ |
||||
|
#define _00_SAU_RXD1_FILTER_OFF (0x00U) /* noise filter off */ |
||||
|
#define _04_SAU_RXD1_FILTER_ON (0x04U) /* noise filter on */ |
||||
|
#define _00_SAU_RXD0_FILTER_OFF (0x00U) /* noise filter off */ |
||||
|
#define _01_SAU_RXD0_FILTER_ON (0x01U) /* noise filter on */ |
||||
|
|
||||
|
/*
|
||||
|
Format of Serial Status Register mn (SSRmn) |
||||
|
*/ |
||||
|
/* Communication status indication flag of channel n (TSFmn) */ |
||||
|
#define _0040_SAU_UNDER_EXECUTE (0x0040U) /* communication is under execution */ |
||||
|
/* Buffer register status indication flag of channel n (BFFmn) */ |
||||
|
#define _0020_SAU_VALID_STORED (0x0020U) /* valid data is stored in the SDRmn register */ |
||||
|
/* Framing error detection flag of channel n (FEFmn) */ |
||||
|
#define _0004_SAU_FRAM_ERROR (0x0004U) /* a framing error occurs during UART reception */ |
||||
|
/* Parity error detection flag of channel n (PEFmn) */ |
||||
|
#define _0002_SAU_PARITY_ERROR (0x0002U) /* a parity error occurs or ACK is not detected */ |
||||
|
/* Overrun error detection flag of channel n (OVFmn) */ |
||||
|
#define _0001_SAU_OVERRUN_ERROR (0x0001U) /* an overrun error occurs */ |
||||
|
|
||||
|
/*
|
||||
|
Serial Channel Start Register m (SSm) |
||||
|
*/ |
||||
|
/* Operation start trigger of channel 0 (SSm0) */ |
||||
|
#define _0000_SAU_CH0_START_TRG_OFF (0x0000U) /* no trigger operation */ |
||||
|
#define _0001_SAU_CH0_START_TRG_ON (0x0001U) /* sets SEm0 to 1 and enters the communication wait status */ |
||||
|
/* Operation start trigger of channel 1 (SSm1) */ |
||||
|
#define _0000_SAU_CH1_START_TRG_OFF (0x0000U) /* no trigger operation */ |
||||
|
#define _0002_SAU_CH1_START_TRG_ON (0x0002U) /* sets SEm1 to 1 and enters the communication wait status */ |
||||
|
|
||||
|
/*
|
||||
|
Serial Channel Stop Register m (STm) |
||||
|
*/ |
||||
|
/* Operation stop trigger of channel 0 (STm0) */ |
||||
|
#define _0000_SAU_CH0_STOP_TRG_OFF (0x0000U) /* no trigger operation */ |
||||
|
#define _0001_SAU_CH0_STOP_TRG_ON (0x0001U) /* operation is stopped (stop trigger is generated) */ |
||||
|
/* Operation stop trigger of channel 1 (STm1) */ |
||||
|
#define _0000_SAU_CH1_STOP_TRG_OFF (0x0000U) /* no trigger operation */ |
||||
|
#define _0002_SAU_CH1_STOP_TRG_ON (0x0002U) /* operation is stopped (stop trigger is generated) */ |
||||
|
|
||||
|
/*
|
||||
|
Format of Serial Flag Clear Trigger Register mn (SIRmn) |
||||
|
*/ |
||||
|
/* Clear trigger of overrun error flag of channel n (OVCTmn) */ |
||||
|
#define _0001_SAU_SIRMN_OVCTMN (0x0001U) |
||||
|
/* Clear trigger of parity error flag of channel n (PECTmn) */ |
||||
|
#define _0002_SAU_SIRMN_PECTMN (0x0002U) |
||||
|
/* Clear trigger of framing error of channel n (FECTMN) */ |
||||
|
#define _0004_SAU_SIRMN_FECTMN (0x0004U) |
||||
|
|
||||
|
/*
|
||||
|
Serial Output Enable Register m (SOEm) |
||||
|
*/ |
||||
|
/* Serial output enable/disable of channel 0 (SOEm0) */ |
||||
|
#define _0001_SAU_CH0_OUTPUT_ENABLE (0x0001U) /* enables output by serial communication operation */ |
||||
|
#define _0000_SAU_CH0_OUTPUT_DISABLE (0x0000U) /* stops output by serial communication operation */ |
||||
|
/* Serial output enable/disable of channel 1 (SOEm1) */ |
||||
|
#define _0002_SAU_CH1_OUTPUT_ENABLE (0x0002U) /* enables output by serial communication operation */ |
||||
|
#define _0000_SAU_CH1_OUTPUT_DISABLE (0x0000U) /* stops output by serial communication operation */ |
||||
|
|
||||
|
/*
|
||||
|
Serial Output Register m (SOm) |
||||
|
*/ |
||||
|
/* Serial data output of channel 0 (SOm0) */ |
||||
|
#define _0000_SAU_CH0_DATA_OUTPUT_0 (0x0000U) /* Serial data output value is "0" */ |
||||
|
#define _0001_SAU_CH0_DATA_OUTPUT_1 (0x0001U) /* Serial data output value is "1" */ |
||||
|
/* Serial data output of channel 1 (SOm1) */ |
||||
|
#define _0000_SAU_CH1_DATA_OUTPUT_0 (0x0000U) /* Serial data output value is "0" */ |
||||
|
#define _0002_SAU_CH1_DATA_OUTPUT_1 (0x0002U) /* Serial data output value is "1" */ |
||||
|
/* Serial clock output of channel 0 (CKOm0) */ |
||||
|
#define _0000_SAU_CH0_CLOCK_OUTPUT_0 (0x0000U) /* Serial clock output value is "0" */ |
||||
|
#define _0100_SAU_CH0_CLOCK_OUTPUT_1 (0x0100U) /* Serial clock output value is "1" */ |
||||
|
/* Serial clock output of channel 1 (CKOm1) */ |
||||
|
#define _0000_SAU_CH1_CLOCK_OUTPUT_0 (0x0000U) /* Serial clock output value is "0" */ |
||||
|
#define _0200_SAU_CH1_CLOCK_OUTPUT_1 (0x0200U) /* Serial clock output value is "1" */ |
||||
|
|
||||
|
/*
|
||||
|
SAU Standby Control Register m (SSCm) |
||||
|
*/ |
||||
|
/* SAU Standby Wakeup Control Bit (SWC) */ |
||||
|
#define _0000_SAU_CH0_SNOOZE_OFF (0x0000U) /* disable start function from STOP state of chip */ |
||||
|
#define _0001_SAU_CH0_SNOOZE_ON (0x0001U) /* enable start function from STOP state of chip */ |
||||
|
|
||||
|
/*
|
||||
|
Serial slave select enable register m (SSEmn) |
||||
|
*/ |
||||
|
/* SAU0 Channel 0 SSI00 input setting in CSI communication and slave mode (SSE00) */ |
||||
|
#define _00_SAU_CH0_SSI00_UNUSED (0x00U) /* disables SSI00 pin input */ |
||||
|
#define _01_SAU_CH0_SSI00_USED (0x01U) /* enables SSI00 pin input */ |
||||
|
/* SAU0 Channel 1 SSI01 input setting in CSI communication and slave mode (SSE01) */ |
||||
|
#define _00_SAU_CH1_SSI01_UNUSED (0x00U) /* disables SSI01 pin input */ |
||||
|
#define _02_SAU_CH1_SSI01_USED (0x02U) /* enables SSI01 pin input */ |
||||
|
/* SAU1 Channel 0 SSI10 input setting in CSI communication and slave mode (SSE10) */ |
||||
|
#define _00_SAU_CH0_SSI10_UNUSED (0x00U) /* disables SSI10 pin input */ |
||||
|
#define _01_SAU_CH0_SSI10_USED (0x01U) /* enables SSI10 pin input */ |
||||
|
/* SAU1 Channel 1 SSI11 input setting in CSI communication and slave mode (SSE11) */ |
||||
|
#define _00_SAU_CH1_SSI11_UNUSED (0x00U) /* disables SSI11 pin input */ |
||||
|
#define _02_SAU_CH1_SSI11_USED (0x02U) /* enables SSI11 pin input */ |
||||
|
|
||||
|
/* SAU used flag */ |
||||
|
#define _00_SAU_IIC_MASTER_FLAG_CLEAR (0x00U) |
||||
|
#define _01_SAU_IIC_SEND_FLAG (0x01U) |
||||
|
#define _02_SAU_IIC_RECEIVE_FLAG (0x02U) |
||||
|
#define _04_SAU_IIC_SENDED_ADDRESS_FLAG (0x04U) |
||||
|
|
||||
|
|
||||
|
/*
|
||||
|
IICA Control Register (IICCTLn0) |
||||
|
*/ |
||||
|
/* IIC operation enable (IICEn) */ |
||||
|
#define _00_IICA_OPERATION_DISABLE (0x00U) /* stop operation */ |
||||
|
#define _80_IICA_OPERATION_ENABLE (0x80U) /* enable operation */ |
||||
|
/* Exit from communications (LRELn) */ |
||||
|
#define _00_IICA_COMMUNICATION_NORMAL (0x00U) /* normal operation */ |
||||
|
#define _40_IICA_COMMUNICATION_EXIT (0x40U) /* exit from current communication */ |
||||
|
/* Wait cancellation (WRELn) */ |
||||
|
#define _00_IICA_WAIT_NOTCANCEL (0x00U) /* do not cancel wait */ |
||||
|
#define _20_IICA_WAIT_CANCEL (0x20U) /* cancel wait */ |
||||
|
/* Generation of interrupt when stop condition (SPIEn) */ |
||||
|
#define _00_IICA_STOPINT_DISABLE (0x00U) /* disable */ |
||||
|
#define _10_IICA_STOPINT_ENABLE (0x10U) /* enable */ |
||||
|
/* Wait and interrupt generation (WTIMn) */ |
||||
|
#define _00_IICA_WAITINT_CLK8FALLING (0x00U) /* generated at the eighth clock's falling edge */ |
||||
|
#define _08_IICA_WAITINT_CLK9FALLING (0x08U) /* generated at the ninth clock's falling edge */ |
||||
|
/* Acknowledgement control (ACKEn) */ |
||||
|
#define _00_IICA_ACK_DISABLE (0x00U) /* disable acknowledgement */ |
||||
|
#define _04_IICA_ACK_ENABLE (0x04U) /* enable acknowledgement */ |
||||
|
/* Start condition trigger (STTn) */ |
||||
|
#define _00_IICA_START_NOTGENERATE (0x00U) /* do not generate start condition */ |
||||
|
#define _02_IICA_START_GENERATE (0x02U) /* generate start condition */ |
||||
|
/* Stop condition trigger (SPTn) */ |
||||
|
#define _00_IICA_STOP_NOTGENERATE (0x00U) /* do not generate stop condition */ |
||||
|
#define _01_IICA_STOP_GENERATE (0x01U) /* generate stop condition */ |
||||
|
|
||||
|
/*
|
||||
|
IICA Status Register (IICSn) |
||||
|
*/ |
||||
|
/* Master device status (MSTSn) */ |
||||
|
#define _00_IICA_STATUS_NOTMASTER (0x00U) /* slave device status or communication standby status */ |
||||
|
#define _80_IICA_STATUS_MASTER (0x80U) /* master device communication status */ |
||||
|
/* Detection of arbitration loss (ALDn) */ |
||||
|
#define _00_IICA_ARBITRATION_NO (0x00U) /* arbitration win or no arbitration */ |
||||
|
#define _40_IICA_ARBITRATION_LOSS (0x40U) /* arbitration loss */ |
||||
|
/* Detection of extension code reception (EXCn) */ |
||||
|
#define _00_IICA_EXTCODE_NOT (0x00U) /* extension code not received */ |
||||
|
#define _20_IICA_EXTCODE_RECEIVED (0x20U) /* extension code received */ |
||||
|
/* Detection of matching addresses (COIn) */ |
||||
|
#define _00_IICA_ADDRESS_NOTMATCH (0x00U) /* addresses do not match */ |
||||
|
#define _10_IICA_ADDRESS_MATCH (0x10U) /* addresses match */ |
||||
|
/* Detection of transmit/receive status (TRCn) */ |
||||
|
#define _00_IICA_STATUS_RECEIVE (0x00U) /* receive status */ |
||||
|
#define _08_IICA_STATUS_TRANSMIT (0x08U) /* transmit status */ |
||||
|
/* Detection of acknowledge signal (ACKDn) */ |
||||
|
#define _00_IICA_ACK_NOTDETECTED (0x00U) /* ACK signal was not detected */ |
||||
|
#define _04_IICA_ACK_DETECTED (0x04U) /* ACK signal was detected */ |
||||
|
/* Detection of start condition (STDn) */ |
||||
|
#define _00_IICA_START_NOTDETECTED (0x00U) /* start condition not detected */ |
||||
|
#define _02_IICA_START_DETECTED (0x02U) /* start condition detected */ |
||||
|
/* Detection of stop condition (SPDn) */ |
||||
|
#define _00_IICA_STOP_NOTDETECTED (0x00U) /* stop condition not detected */ |
||||
|
#define _01_IICA_STOP_DETECTED (0x01U) /* stop condition detected */ |
||||
|
|
||||
|
/*
|
||||
|
IICA Flag Register (IICFn) |
||||
|
*/ |
||||
|
/* STT clear flag (STCFn) */ |
||||
|
#define _00_IICA_STARTFLAG_GENERATE (0x00U) /* generate start condition */ |
||||
|
#define _80_IICA_STARTFLAG_UNSUCCESSFUL (0x80U) /* start condition generation unsuccessful */ |
||||
|
/* IIC bus status flag (IICBSYn) */ |
||||
|
#define _00_IICA_BUS_RELEASE (0x00U) /* bus release status */ |
||||
|
#define _40_IICA_BUS_COMMUNICATION (0x40U) /* bus communication status */ |
||||
|
/* Initial start enable trigger (STCENn) */ |
||||
|
#define _00_IICA_START_WITHSTOP (0x00U) /* generate start upon detecting stop condition */ |
||||
|
#define _02_IICA_START_WITHOUTSTOP (0x02U) /* generate start without detecting stop condition */ |
||||
|
/* Communication reservation function disable bit (IICRSVn) */ |
||||
|
#define _00_IICA_RESERVATION_ENABLE (0x00U) /* enable communication reservation */ |
||||
|
#define _01_IICA_RESERVATION_DISABLE (0x01U) /* disable communication reservation */ |
||||
|
|
||||
|
/*
|
||||
|
IICA Control Register 1 (IICCTLn1) |
||||
|
*/ |
||||
|
/* Control of address match wakeup (WUPn) */ |
||||
|
#define _00_IICA_WAKEUP_STOP (0x00U) /* stop address match wakeup function in STOP mode */ |
||||
|
#define _80_IICA_WAKEUP_ENABLE (0x80U) /* enable address match wakeup function in STOP mode */ |
||||
|
/* Detection of SCL0 pin level (CLDn) */ |
||||
|
#define _00_IICA_SCL_LOW (0x00U) /* detect clock line at low level */ |
||||
|
#define _20_IICA_SCL_HIGH (0x20U) /* detect clock line at high level */ |
||||
|
/* Detection of SDA0 pin level (DADn) */ |
||||
|
#define _00_IICA_SDA_LOW (0x00U) /* detect data line at low level */ |
||||
|
#define _10_IICA_SDA_HIGH (0x10U) /* detect data line at high level */ |
||||
|
/* Operation mode switching (SMCn) */ |
||||
|
#define _00_IICA_MODE_STANDARD (0x00U) /* operates in standard mode */ |
||||
|
#define _08_IICA_MODE_HIGHSPEED (0x08U) /* operates in high-speed mode */ |
||||
|
/* Digital filter operation control (DFCn) */ |
||||
|
#define _00_IICA_FILTER_OFF (0x00U) /* digital filter off */ |
||||
|
#define _04_IICA_FILTER_ON (0x04U) /* digital filter on */ |
||||
|
/* Operation of clock dividing frequency permission (PRSn) */ |
||||
|
#define _00_IICA_fCLK (0x00U) /* clock of dividing frequency operation (fCLK) */ |
||||
|
#define _01_IICA_fCLK_HALF (0x01U) /* 2 clock of dividing frequency operation (fCLK/2) */ |
||||
|
|
||||
|
/* IICA used flag */ |
||||
|
#define _80_IICA_ADDRESS_COMPLETE (0x80U) |
||||
|
#define _00_IICA_MASTER_FLAG_CLEAR (0x00U) |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Macro definitions |
||||
|
***********************************************************************************************************************/ |
||||
|
#define _CE00_UART0_RECEIVE_DIVISOR (0xCE00U) |
||||
|
#define _CE00_UART0_TRANSMIT_DIVISOR (0xCE00U) |
||||
|
#define _CE00_UART1_RECEIVE_DIVISOR (0xCE00U) |
||||
|
#define _CE00_UART1_TRANSMIT_DIVISOR (0xCE00U) |
||||
|
#define _10_IICA0_MASTERADDRESS (0x10U) |
||||
|
#define _55_IICA0_IICWH_VALUE (0x55U) |
||||
|
#define _4C_IICA0_IICWL_VALUE (0x4CU) |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Typedef definitions |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global functions |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_SAU0_Create(void); |
||||
|
void R_UART0_Create(void); |
||||
|
void R_UART0_Start(void); |
||||
|
void R_UART0_Stop(void); |
||||
|
MD_STATUS R_UART0_Send(uint8_t * const tx_buf, uint16_t tx_num); |
||||
|
MD_STATUS R_UART0_Receive(uint8_t * const rx_buf, uint16_t rx_num); |
||||
|
static void r_uart0_callback_error(uint8_t err_type); |
||||
|
static void r_uart0_callback_receiveend(void); |
||||
|
static void r_uart0_callback_sendend(void); |
||||
|
static void r_uart0_callback_softwareoverrun(uint16_t rx_data); |
||||
|
void R_SAU1_Create(void); |
||||
|
void R_UART1_Create(void); |
||||
|
void R_UART1_Start(void); |
||||
|
void R_UART1_Stop(void); |
||||
|
MD_STATUS R_UART1_Send(uint8_t * const tx_buf, uint16_t tx_num); |
||||
|
MD_STATUS R_UART1_Receive(uint8_t * const rx_buf, uint16_t rx_num); |
||||
|
static void r_uart1_callback_error(uint8_t err_type); |
||||
|
static void r_uart1_callback_receiveend(void); |
||||
|
static void r_uart1_callback_sendend(void); |
||||
|
static void r_uart1_callback_softwareoverrun(uint16_t rx_data); |
||||
|
void R_IICA0_Create(void); |
||||
|
MD_STATUS R_IICA0_Master_Send(uint8_t adr, uint8_t * const tx_buf, uint16_t tx_num, uint8_t wait); |
||||
|
MD_STATUS R_IICA0_Master_Receive(uint8_t adr, uint8_t * const rx_buf, uint16_t rx_num, uint8_t wait); |
||||
|
void R_IICA0_Stop(void); |
||||
|
void R_IICA0_StopCondition(void); |
||||
|
static void r_iica0_callback_master_sendend(void); |
||||
|
static void r_iica0_callback_master_receiveend(void); |
||||
|
static void r_iica0_callback_master_error(MD_STATUS flag); |
||||
|
static void iica0_masterhandler(void); |
||||
|
static void iica0_slavehandler(void); |
||||
|
|
||||
|
/* Start user code for function. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#endif |
||||
@ -0,0 +1,442 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_serial_user.c |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements device driver for Serial module. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Includes |
||||
|
***********************************************************************************************************************/ |
||||
|
#include "r_cg_macrodriver.h" |
||||
|
#include "r_cg_serial.h" |
||||
|
/* Start user code for include. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#include "r_cg_userdefine.h" |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Pragma directive |
||||
|
***********************************************************************************************************************/ |
||||
|
#pragma interrupt r_uart0_interrupt_send(vect=INTST0) |
||||
|
#pragma interrupt r_uart0_interrupt_receive(vect=INTSR0) |
||||
|
#pragma interrupt r_uart1_interrupt_send(vect=INTST1) |
||||
|
#pragma interrupt r_uart1_interrupt_receive(vect=INTSR1) |
||||
|
#pragma interrupt r_iica0_interrupt(vect=INTIICA0) |
||||
|
/* Start user code for pragma. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global variables and functions |
||||
|
***********************************************************************************************************************/ |
||||
|
extern volatile uint8_t * gp_uart0_tx_address; /* uart0 send buffer address */ |
||||
|
extern volatile uint16_t g_uart0_tx_count; /* uart0 send data number */ |
||||
|
extern volatile uint8_t * gp_uart0_rx_address; /* uart0 receive buffer address */ |
||||
|
extern volatile uint16_t g_uart0_rx_count; /* uart0 receive data number */ |
||||
|
extern volatile uint16_t g_uart0_rx_length; /* uart0 receive data length */ |
||||
|
extern volatile uint8_t * gp_uart1_tx_address; /* uart1 send buffer address */ |
||||
|
extern volatile uint16_t g_uart1_tx_count; /* uart1 send data number */ |
||||
|
extern volatile uint8_t * gp_uart1_rx_address; /* uart1 receive buffer address */ |
||||
|
extern volatile uint16_t g_uart1_rx_count; /* uart1 receive data number */ |
||||
|
extern volatile uint16_t g_uart1_rx_length; /* uart1 receive data length */ |
||||
|
extern volatile uint8_t g_iica0_master_status_flag; /* iica0 master flag */ |
||||
|
extern volatile uint8_t g_iica0_slave_status_flag; /* iica0 slave flag */ |
||||
|
extern volatile uint8_t * gp_iica0_rx_address; /* iica0 receive buffer address */ |
||||
|
extern volatile uint16_t g_iica0_rx_cnt; /* iica0 receive data length */ |
||||
|
extern volatile uint16_t g_iica0_rx_len; /* iica0 receive data count */ |
||||
|
extern volatile uint8_t * gp_iica0_tx_address; /* iica0 send buffer address */ |
||||
|
extern volatile uint16_t g_iica0_tx_cnt; /* iica0 send data count */ |
||||
|
/* Start user code for global. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart0_interrupt_receive |
||||
|
* Description : This function is INTSR0 interrupt service routine. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void __near r_uart0_interrupt_receive(void) |
||||
|
{ |
||||
|
volatile uint8_t rx_data; |
||||
|
volatile uint8_t err_type; |
||||
|
|
||||
|
err_type = (uint8_t)(SSR01 & 0x0007U); |
||||
|
SIR01 = (uint16_t)err_type; |
||||
|
|
||||
|
if (err_type != 0U) |
||||
|
{ |
||||
|
r_uart0_callback_error(err_type); |
||||
|
} |
||||
|
|
||||
|
rx_data = SDR01L; |
||||
|
|
||||
|
if (g_uart0_rx_length > g_uart0_rx_count) |
||||
|
{ |
||||
|
*gp_uart0_rx_address = rx_data; |
||||
|
gp_uart0_rx_address++; |
||||
|
g_uart0_rx_count++; |
||||
|
|
||||
|
if (g_uart0_rx_length == g_uart0_rx_count) |
||||
|
{ |
||||
|
r_uart0_callback_receiveend(); |
||||
|
} |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
r_uart0_callback_softwareoverrun(rx_data); |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart0_interrupt_send |
||||
|
* Description : This function is INTST0 interrupt service routine. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void __near r_uart0_interrupt_send(void) |
||||
|
{ |
||||
|
if (g_uart0_tx_count > 0U) |
||||
|
{ |
||||
|
SDR00L = *gp_uart0_tx_address; |
||||
|
gp_uart0_tx_address++; |
||||
|
g_uart0_tx_count--; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
r_uart0_callback_sendend(); |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart0_callback_receiveend |
||||
|
* Description : This function is a callback function when UART0 finishes reception. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_uart0_callback_receiveend(void) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart0_callback_softwareoverrun |
||||
|
* Description : This function is a callback function when UART0 receives an overflow data. |
||||
|
* Arguments : rx_data - |
||||
|
* receive data |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_uart0_callback_softwareoverrun(uint16_t rx_data) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart0_callback_sendend |
||||
|
* Description : This function is a callback function when UART0 finishes transmission. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_uart0_callback_sendend(void) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart0_callback_error |
||||
|
* Description : This function is a callback function when UART0 reception error occurs. |
||||
|
* Arguments : err_type - |
||||
|
* error type value |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_uart0_callback_error(uint8_t err_type) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart1_interrupt_receive |
||||
|
* Description : This function is INTSR1 interrupt service routine. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void __near r_uart1_interrupt_receive(void) |
||||
|
{ |
||||
|
volatile uint8_t rx_data; |
||||
|
volatile uint8_t err_type; |
||||
|
|
||||
|
err_type = (uint8_t)(SSR11 & 0x0007U); |
||||
|
SIR11 = (uint16_t)err_type; |
||||
|
|
||||
|
if (err_type != 0U) |
||||
|
{ |
||||
|
r_uart1_callback_error(err_type); |
||||
|
} |
||||
|
|
||||
|
rx_data = SDR11L; |
||||
|
|
||||
|
if (g_uart1_rx_length > g_uart1_rx_count) |
||||
|
{ |
||||
|
*gp_uart1_rx_address = rx_data; |
||||
|
gp_uart1_rx_address++; |
||||
|
g_uart1_rx_count++; |
||||
|
|
||||
|
if (g_uart1_rx_length == g_uart1_rx_count) |
||||
|
{ |
||||
|
r_uart1_callback_receiveend(); |
||||
|
} |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
r_uart1_callback_softwareoverrun(rx_data); |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart1_interrupt_send |
||||
|
* Description : This function is INTST1 interrupt service routine. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void __near r_uart1_interrupt_send(void) |
||||
|
{ |
||||
|
if (g_uart1_tx_count > 0U) |
||||
|
{ |
||||
|
SDR10L = *gp_uart1_tx_address; |
||||
|
gp_uart1_tx_address++; |
||||
|
g_uart1_tx_count--; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
r_uart1_callback_sendend(); |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart1_callback_receiveend |
||||
|
* Description : This function is a callback function when UART1 finishes reception. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_uart1_callback_receiveend(void) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart1_callback_softwareoverrun |
||||
|
* Description : This function is a callback function when UART1 receives an overflow data. |
||||
|
* Arguments : rx_data - |
||||
|
* receive data |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_uart1_callback_softwareoverrun(uint16_t rx_data) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart1_callback_sendend |
||||
|
* Description : This function is a callback function when UART1 finishes transmission. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_uart1_callback_sendend(void) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_uart1_callback_error |
||||
|
* Description : This function is a callback function when UART1 reception error occurs. |
||||
|
* Arguments : err_type - |
||||
|
* error type value |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_uart1_callback_error(uint8_t err_type) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_iica0_interrupt |
||||
|
* Description : This function is INTIICA0 interrupt service routine. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void __near r_iica0_interrupt(void) |
||||
|
{ |
||||
|
if ((IICS0 & _80_IICA_STATUS_MASTER) == 0x80U) |
||||
|
{ |
||||
|
iica0_masterhandler(); |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: iica0_masterhandler |
||||
|
* Description : This function is IICA0 master handler. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void iica0_masterhandler(void) |
||||
|
{ |
||||
|
/* Detection of stop condition handling */ |
||||
|
if ((0U == IICBSY0) && (g_iica0_tx_cnt != 0U)) |
||||
|
{ |
||||
|
r_iica0_callback_master_error(MD_SPT); |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
/* Control for sended address */ |
||||
|
if ((g_iica0_master_status_flag & _80_IICA_ADDRESS_COMPLETE) == 0U) |
||||
|
{ |
||||
|
if (1U == ACKD0) |
||||
|
{ |
||||
|
g_iica0_master_status_flag |= _80_IICA_ADDRESS_COMPLETE; |
||||
|
|
||||
|
if (1U == TRC0) |
||||
|
{ |
||||
|
WTIM0 = 1U; |
||||
|
|
||||
|
if (g_iica0_tx_cnt > 0U) |
||||
|
{ |
||||
|
IICA0 = *gp_iica0_tx_address; |
||||
|
gp_iica0_tx_address++; |
||||
|
g_iica0_tx_cnt--; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
r_iica0_callback_master_sendend(); |
||||
|
} |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
ACKE0 = 1U; |
||||
|
WTIM0 = 0U; |
||||
|
WREL0 = 1U; |
||||
|
} |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
r_iica0_callback_master_error(MD_NACK); |
||||
|
} |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
/* Master send control */ |
||||
|
if (1U == TRC0) |
||||
|
{ |
||||
|
if ((0U == ACKD0) && (g_iica0_tx_cnt != 0U)) |
||||
|
{ |
||||
|
r_iica0_callback_master_error(MD_NACK); |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
if (g_iica0_tx_cnt > 0U) |
||||
|
{ |
||||
|
IICA0 = *gp_iica0_tx_address; |
||||
|
gp_iica0_tx_address++; |
||||
|
g_iica0_tx_cnt--; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
r_iica0_callback_master_sendend(); |
||||
|
} |
||||
|
} |
||||
|
} |
||||
|
/* Master receive control */ |
||||
|
else |
||||
|
{ |
||||
|
if (g_iica0_rx_cnt < g_iica0_rx_len) |
||||
|
{ |
||||
|
*gp_iica0_rx_address = IICA0; |
||||
|
gp_iica0_rx_address++; |
||||
|
g_iica0_rx_cnt++; |
||||
|
|
||||
|
if (g_iica0_rx_cnt == g_iica0_rx_len) |
||||
|
{ |
||||
|
ACKE0 = 0U; |
||||
|
WTIM0 = 1U; |
||||
|
WREL0 = 1U; |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
WREL0 = 1U; |
||||
|
} |
||||
|
} |
||||
|
else |
||||
|
{ |
||||
|
r_iica0_callback_master_receiveend(); |
||||
|
} |
||||
|
} |
||||
|
} |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_iica0_callback_master_error |
||||
|
* Description : This function is a callback function when IICA0 master error occurs. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_iica0_callback_master_error(MD_STATUS flag) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_iica0_callback_master_receiveend |
||||
|
* Description : This function is a callback function when IICA0 finishes master reception. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_iica0_callback_master_receiveend(void) |
||||
|
{ |
||||
|
SPT0 = 1U; |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_iica0_callback_master_sendend |
||||
|
* Description : This function is a callback function when IICA0 finishes master transmission. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void r_iica0_callback_master_sendend(void) |
||||
|
{ |
||||
|
SPT0 = 1U; |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/* Start user code for adding. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
@ -0,0 +1,38 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_userdefine.h |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file includes user definition. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
#ifndef _USER_DEF_H |
||||
|
#define _USER_DEF_H |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
User definitions |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/* Start user code for function. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#endif |
||||
@ -0,0 +1,78 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_wdt.c |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements device driver for WDT module. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Includes |
||||
|
***********************************************************************************************************************/ |
||||
|
#include "r_cg_macrodriver.h" |
||||
|
#include "r_cg_wdt.h" |
||||
|
/* Start user code for include. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#include "r_cg_userdefine.h" |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Pragma directive |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for pragma. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global variables and functions |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for global. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_WDT_Create |
||||
|
* Description : This function initializes the watchdogtimer. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_WDT_Create(void) |
||||
|
{ |
||||
|
WDTIMK = 1U; /* disable INTWDTI interrupt */ |
||||
|
WDTIIF = 0U; /* clear INTWDTI interrupt flag */ |
||||
|
/* Set INTWDTI low priority */ |
||||
|
WDTIPR1 = 1U; |
||||
|
WDTIPR0 = 1U; |
||||
|
WDTIMK = 0U; /* enable INTWDTI interrupt */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_WDT_Restart |
||||
|
* Description : This function restarts the watchdog timer. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_WDT_Restart(void) |
||||
|
{ |
||||
|
WDTE = 0xACU; /* restart watchdog timer */ |
||||
|
} |
||||
|
|
||||
|
/* Start user code for adding. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
@ -0,0 +1,52 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_wdt.h |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements device driver for WDT module. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
#ifndef WDT_H |
||||
|
#define WDT_H |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Macro definitions (Register bit) |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Macro definitions |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Typedef definitions |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global functions |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_WDT_Create(void); |
||||
|
void R_WDT_Restart(void); |
||||
|
|
||||
|
/* Start user code for function. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#endif |
||||
@ -0,0 +1,64 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_cg_wdt_user.c |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements device driver for WDT module. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Includes |
||||
|
***********************************************************************************************************************/ |
||||
|
#include "r_cg_macrodriver.h" |
||||
|
#include "r_cg_wdt.h" |
||||
|
/* Start user code for include. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#include "r_cg_userdefine.h" |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Pragma directive |
||||
|
***********************************************************************************************************************/ |
||||
|
#pragma interrupt r_wdt_interrupt(vect=INTWDTI) |
||||
|
/* Start user code for pragma. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global variables and functions |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for global. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: r_wdt_interrupt |
||||
|
* Description : This function is INTWDTI interrupt service routine. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
static void __near r_wdt_interrupt(void) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/* Start user code for adding. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
@ -0,0 +1,84 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_main.c |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements main function. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Includes |
||||
|
***********************************************************************************************************************/ |
||||
|
#include "r_cg_macrodriver.h" |
||||
|
#include "r_cg_cgc.h" |
||||
|
#include "r_cg_serial.h" |
||||
|
#include "r_cg_wdt.h" |
||||
|
/* Start user code for include. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#include "r_cg_userdefine.h" |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Pragma directive |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for pragma. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global variables and functions |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for global. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
void R_MAIN_UserInit(void); |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: main |
||||
|
* Description : This function implements main function. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void main(void) |
||||
|
{ |
||||
|
R_MAIN_UserInit(); |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
while (1U) |
||||
|
{ |
||||
|
; |
||||
|
} |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_MAIN_UserInit |
||||
|
* Description : This function adds user code before implementing main function. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_MAIN_UserInit(void) |
||||
|
{ |
||||
|
/* Start user code. Do not edit comment generated here */ |
||||
|
EI(); |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
} |
||||
|
|
||||
|
/* Start user code for adding. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
@ -0,0 +1,95 @@ |
|||||
|
/***********************************************************************************************************************
|
||||
|
* DISCLAIMER |
||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. |
||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
* applicable laws, including copyright laws. |
||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED |
||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY |
||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, |
||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR |
||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability |
||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
* following link: |
||||
|
* http://www.renesas.com/disclaimer
|
||||
|
* |
||||
|
* Copyright (C) 2012, 2021 Renesas Electronics Corporation. All rights reserved. |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* File Name : r_systeminit.c |
||||
|
* Version : CodeGenerator for RL78/F14 V2.03.07.02 [08 Nov 2021] |
||||
|
* Device(s) : R5F10PPJ |
||||
|
* Tool-Chain : CCRL |
||||
|
* Description : This file implements system initializing function. |
||||
|
* Creation Date: 2026-01-12 |
||||
|
***********************************************************************************************************************/ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Includes |
||||
|
***********************************************************************************************************************/ |
||||
|
#include "r_cg_macrodriver.h" |
||||
|
#include "r_cg_cgc.h" |
||||
|
#include "r_cg_serial.h" |
||||
|
#include "r_cg_wdt.h" |
||||
|
/* Start user code for include. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
#include "r_cg_userdefine.h" |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Pragma directive |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for pragma. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
Global variables and functions |
||||
|
***********************************************************************************************************************/ |
||||
|
/* Start user code for global. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: R_Systeminit |
||||
|
* Description : This function initializes every macro. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void R_Systeminit(void) |
||||
|
{ |
||||
|
/* Set periperal I/O redirection */ |
||||
|
PIOR0 = 0x00U; |
||||
|
PIOR1 = 0x00U; |
||||
|
PIOR2 = 0x00U; |
||||
|
PIOR3 = 0x00U; |
||||
|
PIOR4 = 0x00U; |
||||
|
PIOR5 = 0x00U; |
||||
|
PIOR6 = 0x00U; |
||||
|
PIOR7 = 0x00U; |
||||
|
PIOR8 = 0x00U; |
||||
|
R_CGC_Get_ResetSource(); |
||||
|
R_CGC_Create(); |
||||
|
R_SAU0_Create(); |
||||
|
R_SAU1_Create(); |
||||
|
R_IICA0_Create(); |
||||
|
R_WDT_Create(); |
||||
|
|
||||
|
/* Set invalid memory access detection control */ |
||||
|
IAWCTL = 0x00U; |
||||
|
} |
||||
|
|
||||
|
|
||||
|
/***********************************************************************************************************************
|
||||
|
* Function Name: hdwinit |
||||
|
* Description : This function initializes hardware setting. |
||||
|
* Arguments : None |
||||
|
* Return Value : None |
||||
|
***********************************************************************************************************************/ |
||||
|
void hdwinit(void) |
||||
|
{ |
||||
|
DI(); |
||||
|
R_Systeminit(); |
||||
|
} |
||||
|
|
||||
|
/* Start user code for adding. Do not edit comment generated here */ |
||||
|
/* End user code. Do not edit comment generated here */ |
||||
@ -0,0 +1,77 @@ |
|||||
|
;/********************************************************************************************************************** |
||||
|
; * DISCLAIMER |
||||
|
; * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No |
||||
|
; * other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all |
||||
|
; * applicable laws, including copyright laws. |
||||
|
; * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
||||
|
; * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, |
||||
|
; * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM |
||||
|
; * EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES |
||||
|
; * SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO |
||||
|
; * THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
||||
|
; * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of |
||||
|
; * this software. By using this software, you agree to the additional terms and conditions found by accessing the |
||||
|
; * following link: |
||||
|
; * http://www.renesas.com/disclaimer |
||||
|
; * |
||||
|
; * Copyright (C) 2020 Renesas Electronics Corporation. All rights reserved. |
||||
|
; *********************************************************************************************************************/;--------------------------------------------------------------------- |
||||
|
; _stkinit |
||||
|
; |
||||
|
; void _stkinit(void __near * stackbss); |
||||
|
; |
||||
|
; input: |
||||
|
; stackbss = AX (#LOWW(_stackend)) |
||||
|
; output: |
||||
|
; NONE |
||||
|
;--------------------------------------------------------------------- |
||||
|
|
||||
|
; NOTE : THIS IS A TYPICAL EXAMPLE. |
||||
|
|
||||
|
.PUBLIC _stkinit |
||||
|
|
||||
|
.textf .CSEG TEXTF |
||||
|
_stkinit: |
||||
|
MOVW HL,AX ; stack_end_addr |
||||
|
MOV [SP+3],#0x00 ; [SP+0]-[SP+2] for return address |
||||
|
MOVW AX,SP |
||||
|
SUBW AX,HL ; SUBW AX,#LOWW _@STEND |
||||
|
BNH $LSTINIT3 ; goto end |
||||
|
SHRW AX,5 ; loop count for 32 byte transfer |
||||
|
MOVW BC,AX |
||||
|
CLRW AX |
||||
|
LSTINIT1: |
||||
|
CMPW AX,BC |
||||
|
BZ $LSTINIT2 |
||||
|
MOVW [HL],AX |
||||
|
MOVW [HL+2],AX |
||||
|
MOVW [HL+4],AX |
||||
|
MOVW [HL+6],AX |
||||
|
MOVW [HL+8],AX |
||||
|
MOVW [HL+10],AX |
||||
|
MOVW [HL+12],AX |
||||
|
MOVW [HL+14],AX |
||||
|
MOVW [HL+16],AX |
||||
|
MOVW [HL+18],AX |
||||
|
MOVW [HL+20],AX |
||||
|
MOVW [HL+22],AX |
||||
|
MOVW [HL+24],AX |
||||
|
MOVW [HL+26],AX |
||||
|
MOVW [HL+28],AX |
||||
|
MOVW [HL+30],AX |
||||
|
XCHW AX,HL |
||||
|
ADDW AX,#0x20 |
||||
|
XCHW AX,HL |
||||
|
DECW BC |
||||
|
BR $LSTINIT1 |
||||
|
LSTINIT2: |
||||
|
MOVW AX,SP |
||||
|
CMPW AX,HL |
||||
|
BZ $LSTINIT3 ; goto end |
||||
|
CLRW AX |
||||
|
MOVW [HL],AX |
||||
|
INCW HL |
||||
|
INCW HL |
||||
|
BR $LSTINIT2 |
||||
|
LSTINIT3: |
||||
|
RET |
||||
Loading…
Reference in new issue